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1. 发明专利

DE10109256A1 未知
公开(公告)号：DE10109256A1
公开(公告)日：2001-09-20
申请号：DE10109256
申请日：2001-02-26
申请人： HITACHI LTD
发明人： OHKURA YOSHINORI , TAKAHASHI MASAHIRO , MASUKO HIDEAKI , UEDA SHINICHI , HAMADA TAKUJI
IPC分类号： H04B7/15 , H04B7/26 , H04L12/28 , H04L12/42
摘要： A plurality of radio relay stations 1 are connected so that bi-directional ring-like paths are made up of radio transmission paths. The respective radio relay stations 1 bidirectionally transmit data inputted from terminals placed thereunder onto the bidirectional ring-like paths respectively. The respective data are respectively received by radio relay stations 2 having data destination terminals placed thereunder along the bidirectional ring-like paths. Each radio relay station, which has received the data destined for the terminals placed thereunder from both directions, transmits earlier incoming data to each terminal placed thereunder and discards later incoming data. Thus, a radio relay system can be implemented which is capable of relaying data with a high degree of reliability.

2. 发明专利

JP2000278735A MOBILE RADIO UNIT 失效
公开(公告)号：JP2000278735A
公开(公告)日：2000-10-06
申请号：JP7927199
申请日：1999-03-24
申请人： HITACHI LTD
发明人： ISHIDA KAZUTO , AZEDAKA TOSHIHIRO , TANJI MASAYUKI , NAKAZAWA HIDEO , MASUKO HIDEAKI , UEDA SHINICHI , ONO TOMOAKI
IPC分类号： H04M15/00 , H04W48/08 , H04W48/16 , H04W64/00 , H04W88/02 , H04W88/06 , H04Q7/22 , H04Q7/28 , H04Q7/38
摘要： PROBLEM TO BE SOLVED: To obtain a mobile radio unit that can select a desired communication service. SOLUTION: The mobile radio unit 1 is provided with a plurality of interface circuits 11-1 to 11-n provided corresponding to a plurality of base stations. A control circuit 16 selects an optimum base station among a plurality of communication available base stations on the basis of external information from a GPS circuit 151, an acceleration measurement circuit 152 or an external I/F circuit 153 and information stored internally and relating to the base stations and conducts communication by using any of the interface circuits 11-1 to 11-n corresponding to the selected base station.

3. 发明专利

JP2000022618A BASE STATION AND CONTROL METHOD FOR ANTENNA BEAM 失效
公开(公告)号：JP2000022618A
公开(公告)日：2000-01-21
申请号：JP18880798
申请日：1998-07-03
申请人： HITACHI LTD
发明人： UEDA SHINICHI , ISHIDA KAZUTO , HAMADA TAKUSHI , AZEDAKA TOSHIHIRO , MASUKO HIDEAKI
IPC分类号： H04B7/26
摘要： PROBLEM TO BE SOLVED: To allow the base station to set up a radio link according to a position of a mobile terminal between the mobile terminal and the base station. SOLUTION: The base station 300 is provided with a plurality of beam antennas 1, 2, 3 to set up a radio link with each of a plurality of mobile terminals, an antenna control 200 that controls each beam direction and beam angle of the beam antennas, a reception information processing circuit 402 that acquires position information of the mobile terminals during communication and a control circuit 400 that decides the direction and the angle of the beam antennas according to the acquired position information and instructs them to the antenna control 200.

4. 发明专利

JP2001244864A RADIO REPEATING SYSTEM 失效
公开(公告)号：JP2001244864A
公开(公告)日：2001-09-07
申请号：JP2000054959
申请日：2000-02-29
申请人： HITACHI LTD
发明人： OKURA TAKANORI , TAKAHASHI MASAHIRO , MASUKO HIDEAKI , UEDA SHINICHI , HAMADA TAKUSHI
IPC分类号： H04B7/15 , H04B7/26 , H04L12/28 , H04L12/42
摘要： PROBLEM TO BE SOLVED: To realize a radio repeating system which relays data with high reliability. SOLUTION: Radio repeating stations 1 are connected by a radio transmission path so as to constitute a two-way ring path. Each radio repeating station 1 sends data inputted from a terminal under its control to the two-way ring- shaped path. Respective data are received by the radio repeating station 2 including the destination terminal of the data under its control through the two-way ring path. The radio repeating station receiving data addressed to the terminal under the control sends the first arrival data to the terminal under the control and discards the data arriving later.

5. 发明专利

JPH09304562A GPS STANDARD TIMEPIECE AND CORRECTION METHOD OF THE TIMEPIECE 失效
公开(公告)号：JPH09304562A
公开(公告)日：1997-11-28
申请号：JP12434396
申请日：1996-05-20
申请人： HITACHI LTD
发明人： UEDA SHINICHI , TAGIRI KATSUNORI , ARAOKA MANABU
IPC分类号： G09B29/14 , G01S19/14 , G01S19/20 , G04G5/00 , G04R20/00 , G04R20/02 , G06F1/14 , G01S5/14 , G04G7/02
摘要： PROBLEM TO BE SOLVED: To supply accurate time data for time request from a business processor by judging a time obtained from GPS effective when difference between a position at which a timepiece is set and another position obtained by GPS measurement is within an allowable range. SOLUTION: The geodetic coordinate of a present GPS antenna is made an initial value at device startup, and set and stored in a present position storage circuit 202 in a processing circuit. GPS measured data out of transmitted GPS data are transmitted to a GPS present position storage circuit 201 through an internal transmission line 1101 and GPS time data are stored to be transmitted to a GPS time storage circuit 205. A comparator 203 compares data differences between the circuits 201, 202 with each other, and in the case where the GPS measured data coincide with each other, the GPS time data are judged correct. In the case where they do not coincide with each other, RTC time data are output to a display or an input and output interface circuit 108. Next, the GPS time data are compared with the RTC time data by an error judgement circuit 206.

6. 发明专利

JPH08152942A ELECTRONIC COMPUTER SYSTEM 失效
公开(公告)号：JPH08152942A
公开(公告)日：1996-06-11
申请号：JP29423294
申请日：1994-11-29
申请人： HITACHI LTD , HITACHI PROCESS COMPUTER ENG
发明人： UEDA SHINICHI , YAMAGUCHI SHOJI , SUENAGA MASASHI , WATANABE HIROSHI , FURUYA MASAYOSHI , YOKOYAMA KAZUHARU , SUZUKI KUNIO , SHIMIZU HISHIYUKI , OTANI KOICHI
IPC分类号： G06F1/26 , G06F1/00
摘要： PURPOSE: To perform the protection of a computer and the improvement of operability for turning on/off a power source including a peripheral device easily with an existent computer when it is possible for the computer to relax or get out of the conditions for continuing its operation. CONSTITUTION: A CPU 2 equipped with a means for inputting a power source ON/OFF command from an uninterruptible power supply(UPS) and a means for outputting the stop command signal of the UPS 60 at the time of completely turning off the power source of this CPU 2, a fan 4 for cooling, and a control circuit 10 for turning on/off the power source of the CPU 2 and a peripheral device 3 corresponding to the output of a stop sensor for the fan 4 and a command from the outside or an operator, is housed in a housing 1. When the fan 4 is stopped, the control circuit 10 shuts down the CPU 2 and when the CPU 2 is completely shut down, the power source of the peripheral device 3 is turned off.

7. 发明专利

JP2004213412A Duplex controller 审中-公开
标题翻译：双控制器
公开(公告)号：JP2004213412A
公开(公告)日：2004-07-29
申请号：JP2003000401
申请日：2003-01-06
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： UEDA SHINICHI , TOMIZAWA HIROSHI , INADA SHUNJI , MASUKO HIDEAKI
IPC分类号： G05B9/03
摘要： PROBLEM TO BE SOLVED: To provide a duplex controller capable of performing control whose reliability is high without damaging the stable operation of the duplex controller.
SOLUTION: A main system controller 1 and a stand-by system controller 2 are provided with arithmetic processing means 10 and 20 for executing the arithmetic operation of control data and information data, control system communicating means 12 and 22 for communicating the control data through a control system line 4, information system communicating means 13 and 23 for communicating the information data through an information system line 5, storage means 11, 15, 21, and 25 for storing data necessary for the arithmetic processing of the arithmetic processing means 10 and 20, and state monitoring means 14 and 24 for monitoring the state of the other system controller. When any abnormality is caused in the information system communicating means 13, the main system controller 1 switches it to the stand-by system information system communicating means 23 to continue the operation.
COPYRIGHT: (C)2004,JPO&NCIPI
摘要翻译：要解决的问题：提供能够执行可靠性高的控制的双工控制器，而不损害双工控制器的稳定操作。解决方案：主系统控制器1和备用系统控制器2设置有用于执行控制数据和信息数据的算术运算的算术处理装置10和20，用于传送控制数据的控制系统通信装置12和22 通过控制系统线路4的数据，用于通过信息系统线路5传送信息数据的信息系统通信装置13和23，用于存储运算处理装置的算术处理所必需的数据的存储装置11,15,21和25 10和20以及用于监视其他系统控制器的状态的状态监视装置14和24。当在信息系统通信装置13中发生任何异常时，主系统控制器1将其切换到备用系统信息系统通信装置23以继续操作。版权所有（C）2004，JPO＆NCIPI

8. 发明专利

JP2002237774A RADIO REPEATER SYSTEM 失效
公开(公告)号：JP2002237774A
公开(公告)日：2002-08-23
申请号：JP2001034076
申请日：2001-02-09
申请人： HITACHI LTD
发明人： UEDA SHINICHI , HAMADA TAKUSHI , OKURA TAKANORI
IPC分类号： H01Q3/02 , H01Q3/26 , H04B7/15 , H04B7/26
摘要： PROBLEM TO BE SOLVED: To increase repeating paths between radio repeaters without causing a communication failure. SOLUTION: In a network to form a radio link between pieces of radio equipment with a plurality of antennas 201 to 203 having directivity by using the same frequency or the adjacent frequency, a radio repeater system is formed of a control circuit 210 to switch valid/invalid of the antennas, a communication time allocation information signal generator 110 to perform time synchronization between pieces of the equipment and a plurality of radio repeaters 101 to 104 having them. The repeater paths are increased and radio frequency is efficiently used by controlling the radio link to which the directivity of the antennas matches in time-division manner.

9. 发明专利

JPH09127274A TIME CORRECTION METHOD AND TIME CORRECTION SYSTEM 失效
公开(公告)号：JPH09127274A
公开(公告)日：1997-05-16
申请号：JP28315595
申请日：1995-10-31
申请人： HITACHI LTD
发明人： UEDA SHINICHI , TAGIRI KATSUNORI , ARAOKA MANABU
IPC分类号： G01S19/14 , G04G5/00 , G04G7/00 , G04R20/00 , G04R20/02 , G06F1/14 , G04G7/02 , G01S5/14
摘要： PROBLEM TO BE SOLVED: To eliminate the effects of transmission delay and processing delay included in standard time. SOLUTION: A task processor 110 transmits a time demand at time T0, which is received by a standard time device 100 at T1' after transmission delay of Δtd1. MPU 101 directs an interface circuit 104 to prohibit reception of demand from others and extracts the standard time T2 from a GPS signal through a time data extraction circuit 102 so that the processing delay time Δtd2 from the reception to the extraction becomes constant. The task processor 110 calculates the error ε=(T0+Δtd1)-(T2-Δtd2) of the internal clock 112 using T2 and Δtd2 included in the response signal, and corrects the present time.

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