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1. 发明专利

DE69528798D1 未知
公开(公告)号：DE69528798D1
公开(公告)日：2002-12-19
申请号：DE69528798
申请日：1995-06-23
申请人： HITACHI LTD
发明人： KAWAGOE HIROTO , SHIRASU TATSUMI , KIYOTA SHOGO , SUZUKI NORIO , YAMADA EIICHI , SUGINO YUJI , KITANO MANABU , SAKURAI YOSHIHIKO , NAGANUMA TAKASHI , ARAKAWA HISASHI
IPC分类号： H01L29/78 , H01L21/205 , H01L21/8238 , H01L27/092
摘要： Over the principal surface of a semiconductor substrate body containing an impurity of a predetermined conduction type, there is formed an epitaxial layer which contains an impurity of the same conduction type as that of the former impurity and the same concentration as the designed one of the former impurity. After this, there are formed a well region which has the same conduction type as that of said impurity and its impurity concentration gradually lowered depthwise of said epitaxial layer. The well region is formed with the gate insulating films of MIS.FETs.

2. 发明专利

HK1010768A1 CMOS SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 未知
公开(公告)号：HK1010768A1
公开(公告)日：1999-06-25
申请号：HK98111663
申请日：1998-10-30
申请人： HITACHI LTD
发明人： KAWAGOE HIROTO , SHIRASU TATSUMI , KIYOTA SHOGO , SUZUKI NORIO , YAMADA EIICHI , SUGINO YUJI , KITANO MANABU , SAKURAI YOSHIHIKO , NAGANUMA TAKASHI , ARAKAWA HISASHI
IPC分类号： H01L29/78 , H01L21/205 , H01L21/8238 , H01L27/092 , H01L
摘要： Over the principal surface of a semiconductor substrate body containing an impurity of a predetermined conduction type, there is formed an epitaxial layer which contains an impurity of the same conduction type as that of the former impurity and the same concentration as the designed one of the former impurity. After this, there are formed a well region which has the same conduction type as that of said impurity and its impurity concentration gradually lowered depthwise of said epitaxial layer. The well region is formed with the gate insulating films of MIS.FETs.

3. 发明专利

DE69528798T2 未知
公开(公告)号：DE69528798T2
公开(公告)日：2003-08-14
申请号：DE69528798
申请日：1995-06-23
申请人： HITACHI LTD
发明人： KAWAGOE HIROTO , SHIRASU TATSUMI , KIYOTA SHOGO , SUZUKI NORIO , YAMADA EIICHI , SUGINO YUJI , KITANO MANABU , SAKURAI YOSHIHIKO , NAGANUMA TAKASHI , ARAKAWA HISASHI
IPC分类号： H01L29/78 , H01L21/205 , H01L21/8238 , H01L27/092
摘要： Over the principal surface of a semiconductor substrate body containing an impurity of a predetermined conduction type, there is formed an epitaxial layer which contains an impurity of the same conduction type as that of the former impurity and the same concentration as the designed one of the former impurity. After this, there are formed a well region which has the same conduction type as that of said impurity and its impurity concentration gradually lowered depthwise of said epitaxial layer. The well region is formed with the gate insulating films of MIS.FETs.

4. 发明专利

DE2726003A1 未知
公开(公告)号：DE2726003A1
公开(公告)日：1977-12-29
申请号：DE2726003
申请日：1977-06-08
申请人： HITACHI LTD
发明人： YASUI TOKUMASA , FUKUDA MINORU , SHIRASU TATSUMI
IPC分类号： H01L21/033 , H01L21/266 , H01L21/336 , H01L29/78
摘要： An offset gate MIS device is fabricated by forming an insulating film with a gate insulator portion as a part thereof on the surface of a semiconductor substrate having one conductivity type, providing a gate electrode on a portion of the insulating film, using the gate electrode as a mask to apply impurities of the other conductivity type with a first impurity concentration to the surface of the semiconductor substrate through the insulating film, forming a shielding film on the surface of that portion of the insulating film which is near the gate insulator portion beneath the gate electrode, using the shielding film as a mask to remove an unmasked portion of the insulating film so as to selectively expose the surface of the semiconductor substrate, applying impurities of the other conductivity type with a second impurity concentration higher than the first impurity concentration to the exposed surface of the semiconductor substrate, and heating the resultant structure to diffuse the impurities into the semiconductor substrate to form source and drain regions therein.

5. 发明专利

SG70082A1 Semiconductor integrated circuit device and process for manufacturing the same 未知
公开(公告)号：SG70082A1
公开(公告)日：2000-01-25
申请号：SG1998001015
申请日：1995-12-07
申请人： HITACHI LTD
发明人： SUZUKI NORIO , KIYOTA SHOGO , KUBO MASAHARU , OKUYAMA KOUSUKE , SHIRASU TATSUMI
IPC分类号： H01L21/8247 , H01L21/336 , H01L21/8238 , H01L21/8242 , H01L21/8246 , H01L27/092 , H01L27/105 , H01L27/108 , H01L29/78 , H01L29/788 , H01L29/792

6. 发明专利

SG34323A1 Semiconductor integrated circuit device and process for manufacturing the same 未知
公开(公告)号：SG34323A1
公开(公告)日：1996-12-06
申请号：SG1995002061
申请日：1995-12-07
申请人： HITACHI LTD
发明人： OKUYAMA KOUSUKE , KUBO MASAHARU , SUZUKI NORIO , KIYOTA SHOGO , SHIRASU TATSUMI
IPC分类号： H01L27/092 , H01L29/78

7. 发明专利

DE2943150A1 MIS device prodn. with protective film formation on exposed metal - before doping by heat treatment of prevent oxidn. and evapn. of metal, pref. molybdenum 未知
公开(公告)号：DE2943150A1
公开(公告)日：1980-05-08
申请号：DE2943150
申请日：1979-10-25
申请人： HITACHI LTD
发明人： KOSA YASUNOBU , SHIRASU TATSUMI , TANIGAKI YUKIO
IPC分类号： H01L21/3205 , H01L21/768 , H01L29/49 , H01L29/78 , H01L21/18 , H01L21/72
摘要： Prodn. of a semiconductor device involves (a) forming an insulating film (of Si oxide) on a semiconductor substrate surface; (b) forming double conducting film, consisting of a semiconducting (polycrystalline Si) film and a metal (Mo, W, Tri or Cr) film, on selected regions of this; (c) providing a protective film (of phosphosilicate glass or polycrystalline Si) on the exposed metal surface; and (d) introducing a dopant of a specific conductivity type into the substrate from the surface of the points not covered by the double conducting film, using heat treatment. Rapid oxidn., e.g. of Mo, and evapn. from the gate electrode during heat treatment for the formation of the source and drain zones is avoided. MIS devices with stable properties and high packing density are obtd.

8. 发明专利

JPH08213478A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND ITS MANUFACTURE 失效
公开(公告)号：JPH08213478A
公开(公告)日：1996-08-20
申请号：JP8231595
申请日：1995-04-07
申请人： HITACHI LTD
发明人： SHIRASU TATSUMI , KIYOTA SHOGO , KUBO SEIJI , OKUYAMA KOSUKE , SUZUKI NORIO
IPC分类号： H01L21/8247 , H01L21/336 , H01L21/8238 , H01L21/8242 , H01L21/8246 , H01L27/092 , H01L27/105 , H01L27/108 , H01L29/78 , H01L29/788 , H01L29/792 , H01L21/205
摘要： PURPOSE: To improve setting accuracy in element characteristics by forming a specified element on an epitaxial layer of a low impurity concentration provided on the first and second semiconductor areas of high impurity concentration. CONSTITUTION: On wells 3a and 3b of high impurity concentration, an epitaxial layer 2E of low impurity concentration is provided, and on the epitaxial layers 2E1 and 2E2. pMOS5P and nMOS5N are formed. Into the epitaxial layer 2E1 on the well 3a, for example, phosphorus of n-type impurity, is introduced. Into the epitaxial layer 2E2 on the well 3b, for example, boron of p-type impurity, is introduced. By this, characteristics of the pNOS 5P and nMOS 5N (threshold voltage, substrate effect, etc.) are set with high accuracy without affected by impurities of the wells 3a and 3b and a semiconductor substrate body 2S, so setting accuracy of the characteristics is improved.

9. 发明专利

JPS6477148A SEMICONDUCTOR STORAGE DEVICE 失效
公开(公告)号：JPS6477148A
公开(公告)日：1989-03-23
申请号：JP21832688
申请日：1988-09-02
申请人： HITACHI LTD
发明人： SHIRASU TATSUMI , OSA YASUNOBU , KATO TOKIO
IPC分类号： H01L21/312 , H01L23/29 , H01L23/31 , H01L27/06
摘要： PURPOSE:To dissolve the generation of the erroneous operation of a memory circuit due to alpha rays by a method wherein alpha particles to come flying from impurities being contained in a package material are attenuated by a polyimide resin or a polyimide-isoindoloquinazolinedione resin (PII resin) and are absorbed in the resins. CONSTITUTION:A P-type Si semiconductor substrate 61 is die bonded at a prescribed position of a package and moreover, after bonding wires 62 are bonded to the substrate by wire bonding for performing an external connection, a PII resin or a polyimide resin 63 is potted and a heat treatment is performed. The content of such impurities as uranium and thorium, which are contained in the PII resin or the polyimide resin and are used as the generation source of alpha rays, is 0.1- several ppb or thereabouts and is very small. Accordingly, the PII resin or the polyimide resin the interrupts the alpha rays, which are radiated from a ceramic package material, and at the same time, as one of a very high purity is easy to be obtained as the resins, the amount of the alpha rays, which are generated from said resin themselves, is also a very small amount.

10. 发明专利

JPS6214095B2 失效
公开(公告)号：JPS6214095B2
公开(公告)日：1987-03-31
申请号：JP1982279
申请日：1979-02-23
申请人： HITACHI LTD
发明人： OSA YASUNOBU , TANIGAKI YUKIO , SHIRASU TATSUMI
IPC分类号： H01L23/522 , H01L21/306 , H01L21/768

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