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1. 发明专利

MY144640A SEMICONDUCTOR DEVICE WITH CMOS-FIELD-EFFECT TRANSISTORS HAVING IMPROVED DRAIN CURRENT CHARACTERISTICS 未知
公开(公告)号：MY144640A
公开(公告)日：2011-10-31
申请号：MYPI20015565
申请日：2001-12-06
申请人： HITACHI LTD
发明人： KUMAGAI YUKIHIRO , OHTA HIROYUKI , OOTSUKA FUMIO , IKEDA SHUJI , ONAI TAKAHIRO , MIURA HIDEO , ICHINOSE KATSUHIKO , TAKEDA TOSHIFUMI
IPC分类号： H01L21/28 , H01L29/76 , H01L21/318 , H01L21/768 , H01L21/8238 , H01L23/522 , H01L27/092
摘要： THE PRESENT INVENTION PROVIDES A SEMICONDUCTOR DEVICE INCLUDING N-CHANNEL FIELD EFFECT TRANSISTORS AND P-CHANNEL FIELD EFFECT TRANSISTORS ALL OF WHICH HAVE EXCELLENT DRAIN CURRENT CHARACTERISTICS. IN A SEMICONDUCTOR DEVICE INCLUDING AN N-CHANNEL FIELD EFFECT TRANSISTOR (10) AND A P-CHANNEL FIELD EFFECT TRANSISTOR (30), A STRESS CONTROL FILM (19) COVERING A GATE ELECTRODE (15) OF THE N-CHANNEL FIELD EFFECT TRANSISTOR (10) UNDERGOES FILM STRESS MAINLY COMPOSED OF TENSILE STRESS. A STRESS CONTROL FILM (39) COVERING A GATE ELECTRODE (15) OF THE P-CHANNEL FIELD EFFECT TRANSISTOR (30) UNDERGOES FILM STRESS MAINLY CAUSED BY COMPRESSION STRESS COMPARED TO THE FILM (19) OF THE N-CHANNEL FIELD EFFECT TRANSISTOR (10). ACCORDINGLY, DRAIN CURRENT IS EXPECTED TO BE IMPROVED IN BOTH THE N-CHANNEL FIELD EFFECT TRANSISTOR AND THE P-CHANNEL FIELD EFFECT TRANSISTOR. CONSEQUENTLY, THE CHARACTERISTICS CAN BE GENERALLY IMPROVED.FIGURE 1

2. 发明专利

JP2003203989A SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：JP2003203989A
公开(公告)日：2003-07-18
申请号：JP2002002919
申请日：2002-01-10
申请人： HITACHI LTD
发明人： OTA HIROYUKI , KUMAGAI YUKIHIRO , SONOBE YASUO , ISHIBASHI KYOSUKE , TAINAKA YASUSHI , MIYAMOTO MASABUMI , MIURA HIDEO
IPC分类号： H01L21/76 , H01L21/335 , H01L21/822 , H01L21/8234 , H01L21/8238 , H01L27/04 , H01L27/08 , H01L27/088 , H01L27/092 , H01L29/06 , H01L29/10 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which has superior drain current characteristics and is reliable as a semiconductor device, which has p-channel type field effect transistors connected in form of a grating. SOLUTION: A long active region, extending over a plurality of p-channel type field effect transistors is separated by gate electrodes and sufficiently thin STI is arranged between gates so that compressive stress is generated at channel parts of the p-channel type field effect transistors. COPYRIGHT: (C)2003,JPO

3. 发明专利

JP2001210641A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2001210641A
公开(公告)日：2001-08-03
申请号：JP2000024692
申请日：2000-01-28
申请人： HITACHI LTD
发明人： KUMAGAI YUKIHIRO , MIURA HIDEO
IPC分类号： H01L21/3205 , H01L23/52
摘要： PROBLEM TO BE SOLVED: To provide a reliable semiconductor device, having wiring whose main component is copper. SOLUTION: In the semiconductor device with wiring whose main component is copper, the wiring is made to contain copper dioxide.

4. 发明专利

JP2001144270A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2001144270A
公开(公告)日：2001-05-25
申请号：JP32711499
申请日：1999-11-17
申请人： HITACHI LTD
发明人： OTA HIROYUKI , KUMAGAI YUKIHIRO , ASANO ISAMU , OJI YUZURU , NAKAMURA YOSHITAKA
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8242 , H01L27/10 , H01L27/108
摘要： PROBLEM TO BE SOLVED: To realize a semiconductor device in which the fabrication yield and the product reliability can be enhanced without lowering the dielectric constant even when a capacitor having high profile is formed. SOLUTION: When a compressive stress is present in a dielectric film 9, extending in parallel with the surface of a silicon substrate 2, of a capacitor where the lower electrode 8 has a long length in the direction of central axis, the dielectric film 9 has a larger area at a part parallel with the substrate 2 than at a part perpendicular to the substrate 2 and since the area subjected to compressive stress is large, dielectric constant decreases abruptly. In the structure of a semiconductor device permitting high integration, a film having tensile stress in the direction of film thickness is employed in both upper and lower electrodes 10, 8. Since tensile stress is present in the direction of thickness of the dielectric film 9 perpendicular to the surface of the substrate 2, dielectric constant can be prevented from decreasing even when a capacitor having high profile is formed for the purpose of high integration.

5. 发明专利

JP2013089784A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2013089784A
公开(公告)日：2013-05-13
申请号：JP2011229341
申请日：2011-10-19
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： HARUBEPPU YU , KUMAGAI YUKIHIRO , KUSHIMA TAKAYUKI , TANIE HISAFUMI
IPC分类号： H01L23/48 , H01L25/07 , H01L25/18
CPC分类号： H01L2224/32225 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/73265 , H01L2924/1305 , H01L2924/13055 , H01L2924/00014 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a power semiconductor device which has high degree of freedom in layout of a circuit wiring pattern and high assemblability, and maintains connection reliability of components even under a severe temperature environment.SOLUTION: A semiconductor device comprises an AC terminal and DC terminals. A board connection end of the AC terminal and board connection ends of the DC terminals are arranged on a periphery of a case so as to face each other. The AC terminal and the DC terminals have plane parts (130b, 131b, 132b) each being substantially parallel with a principal surface of the board between the board connection ends and external device connection end. The AC terminal and the DC terminals have connection parts (130c, 131c) each having a width narrower than the plane part. The AC terminal and the DC terminals are connected by the connection parts on the board connection end side of the AC terminal.
摘要翻译：要解决的问题：提供一种功率半导体器件，其在电路布线图案的布局方面具有高自由度和高的组装性，并且即使在严酷的温度环境下也能保持部件的连接可靠性。解决方案：半导体器件包括AC端子和DC端子。 AC端子的板连接端和DC端子的板连接端部布置在壳体的外围以彼此面对。 AC端子和DC端子具有平板部分（130b，131b，132b），每个平面部分基本上平行于板连接端和外部设备连接端之间的板的主表面。 AC端子和DC端子具有宽度比平面部分窄的连接部分（130c，131c）。 AC端子和DC端子通过AC端子的板连接端侧的连接部分连接。版权所有（C）2013，JPO＆INPIT

6. 发明专利

JP2005291999A Strain gauge mounted with chip with radio function 审中-公开
标题翻译：应变片用无线电功能安装在芯片上
公开(公告)号：JP2005291999A
公开(公告)日：2005-10-20
申请号：JP2004109167
申请日：2004-04-01
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： TANAKA TADAYOSHI , OTA HIROYUKI , SUMIKAWA TAKASHI , KUMAGAI YUKIHIRO
IPC分类号： G01B7/16 , G08C17/00
摘要： PROBLEM TO BE SOLVED: To realize a strain gauge mounted with a chip with radio functions, capable of executing accurately a deformation condition of a large structure and building, and a deformation condition under rotation of a high-speed rotary structure, without requiring complicated wiring handling. SOLUTION: This strain gauge is provided with a strain sensitive gauge part 1, a radio transmission antenna 4, and the chip 3 with the radio functions for radio-transmitting a strain value of the object detected by the strain-sensitive gauge part 1 via the antenna part 4. Since deformation information of the measuring object is transmitted by radio waves, the deformation condition of the large structure, and the deformation condition under the rotation of the high-speed rotary structure are executed accurately, without requiring the complicated wiring handling. The strain gauges having the chip 3 with the radio functions are provided in a plurality of portions of the structure, such as a bridge; the deformation information of the structure is obtained from the plurality of portions; a deformation amount and a deformation portion under vibration is compared with a deformation amount and a deformation portion under no vibration; and safety confirmation of the structure, prediction of strength lowering thereof and the like are carried out by analysis therein. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了实现安装有具有无线功能的芯片的应变仪，能够精确地执行大型结构和建筑物的变形状态以及高速旋转结构的旋转下的变形状态，而没有需要复杂的接线处理。解决方案：该应变仪设有应变敏感测量部件1，无线电传输天线4和具有射频功能的芯片3，用于无线电传输由应变敏感测量部件检测到的物体的应变值由于测量对象的变形信息通过无线电波发送，因此能够精确地执行大型结构的变形状态和高速旋转体的旋转下的变形状态，而不需要复杂的接线处理。具有无线电功能的芯片3的应变仪设置在诸如桥的结构的多个部分中; 从多个部分获得结构的变形信息; 将变形量和振动下的变形部与无振动的变形量和变形部进行比较; 通过分析进行结构的安全确认，强度降低的预测等。版权所有（C）2006，JPO＆NCIPI

7. 发明专利

JP2004335904A Semiconductor device 有权
公开(公告)号：JP2004335904A
公开(公告)日：2004-11-25
申请号：JP2003132458
申请日：2003-05-12
申请人： Hitachi Ltd , Trecenti Technologies Inc , トレセンティテクノロジーズ株式会社 , 株式会社日立製作所
发明人： NASU SHINGO , IWASAKI TOMIO , OTA HIROYUKI , KUMAGAI YUKIHIRO , IKEDA SHUJI
IPC分类号： H01L29/423 , H01L21/28 , H01L21/331 , H01L21/336 , H01L29/10 , H01L29/167 , H01L29/49 , H01L29/732 , H01L29/737 , H01L29/78 , H01L29/786
CPC分类号： H01L29/167 , H01L21/2807 , H01L29/1004 , H01L29/1054 , H01L29/4966 , H01L29/7378
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor, where the characteristic change of the threshold, etc. is suppressed, with high reliability. SOLUTION: A semiconductor is provided with a gate insulating film on a semiconductor substrate and a gate electrode film made principally of a silicon germanium on the gate insulating film, or a semiconductor is provided with a channel made principally of a silicon under the gate insulating film and a channel base film made principally of the silicon germanium under the channel. A cobalt, a carbon, or nitrogen is added to the gate electrode and the channel base film as a means for suppressing a diffusion of a germanium in the gate electrode or the channel base film. COPYRIGHT: (C)2005,JPO&NCIPI

8. 发明专利

JP2008085126A Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008085126A
公开(公告)日：2008-04-10
申请号：JP2006264244
申请日：2006-09-28
申请人： Elpida Memory Inc , Hitachi Ltd , エルピーダメモリ株式会社 , 株式会社日立製作所
发明人： NISHIMORI HITOSHI , OTA HIROYUKI , KUMAGAI YUKIHIRO , UCHIYAMA SHIRO
IPC分类号： H01L21/3205 , H01L23/12 , H01L23/52
CPC分类号： H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which can suppress an increase in stress generated by thermal treatment on a semiconductor substrate with a through electrode at high reliability. SOLUTION: As a conductive film material used for the through electrode, there is use a material in which film stress changes once to a tensile stress side by thermal treatment to have a peak, and further changes to a compressive stress side by high temperature thermal treatment. A through conductive film 12 in a through electrode 15 penetrating a semiconductor substrate 11 is formed through a plurality of stages. For example, after a conductive film 12a of a first layer is formed, a temperature is raised up to a thermal treatment temperature or higher in which the film stress has a peak for thermal treatment to mitigate the stress of the conductive film of the first layer. Further, a through hole is embedded with a conductive film. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：解决的问题：提供一种半导体器件，其能够以高可靠性抑制通孔电极对半导体衬底的热处理产生的应力的增加。＆lt; P＆gt;解决方案：作为用于贯通电极的导电膜材料，使用通过热处理使薄膜应力一次变形到拉伸应力侧的材料，使其具有峰值，并进一步变形为压应力侧高温度热处理。穿过半导体衬底11的贯通电极15中的贯通导电膜12通过多个级形成。例如，在形成第一层的导电膜12a之后，将温度提高到热处理温度以上，其中膜应力具有用于热处理的峰值，以减轻第一层的导电膜的应力。此外，通孔内嵌有导电膜。版权所有（C）2008，JPO＆INPIT

9. 发明专利

JP2002324892A FERROELECTRIC MEMORY 失效
公开(公告)号：JP2002324892A
公开(公告)日：2002-11-08
申请号：JP2001127086
申请日：2001-04-25
申请人： HITACHI LTD
发明人： SHIMAZU HIROMI , KUMAGAI YUKIHIRO , MIURA HIDEO
IPC分类号： H01L27/105 , H01L21/8246
摘要： PROBLEM TO BE SOLVED: To provide a ferroelectric memory that operates stably without deteriorating the residual polarization characteristics of ferroelectric-materials even when a capacitor area is reduced. SOLUTION: This memory has a capacitor 18 that comprises a lower electrode 17, a ferroelectric film 14 formed on the top surface of the lower electrode 17, and an upper electrode 15 consisting of a conductive film formed on the top surface of the ferroelectric film 14. In the upper part electrode 15, the conductive film having compressive stress at a room temperature is used, which causes tensile-stress occurring in the ferroelectric film 14 in a direction perpendicular to an electrode plane to be directed to a direction of compressive stress.

10. 发明专利

JP2002176174A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2002176174A
公开(公告)日：2002-06-21
申请号：JP2000379786
申请日：2000-12-08
申请人： HITACHI LTD
发明人： OTA HIROYUKI , KUMAGAI YUKIHIRO , ANDO TOSHIO , SATO HIDENORI , SHIMIZU AKIHIRO
IPC分类号： H01L21/768 , H01L21/205 , H01L21/31 , H01L21/318 , H01L21/60 , H01L21/8234 , H01L21/8238 , H01L27/092 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide a highly reliable and high-speed semiconductor device by preventing the reduction of the source/drain current of a p-channel type transistor even in the case of forming a silicon nitride film for self-aligned contact by using the single wafer type heat CVD system of a cold wall type so as to cope with the micronization of a transistor. SOLUTION: In the case of forming the silicon nitride film for the self-aligned contact, a side wall is formed by the single wafer type heat CVD system of the cold wall type and the inner wall temperature of the chamber of the CVD system is turned to 30 deg.C or lower.

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