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    • 7. 发明专利
    • SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
    • JP2000269403A
    • 2000-09-29
    • JP6834499
    • 1999-03-15
    • HITACHI LTD
    • HIRASHIMA TOSHINORI
    • H01L25/00
    • PROBLEM TO BE SOLVED: To provide a semiconductor device capable of high density mounting with high adhesion and high durability. SOLUTION: For this semiconductor device, transistor chips 26 and 27, chip capacitors 28 and 29 and chip resistors 30 and 31 are fixed to a wiring board 10, and a wire 33 is bonded on the chips 26-31. Then, a resin sealing body 34 is molded on the wiring board 10 to expose the other end of a wire 33 group, and an electrical wiring 35 is laid on the exposed surface of the wire 33 group of the resin sealing body 34. To the electric wiring 35, an SOP.IC 39 is surface mounted. The SOP.IC 39 is electrically connected to the transistor chips 26 and 27, the chip capacitors 28 and 29 and the chip resistors 30 and 31 with the wire 33 group. Since a controller can be laminated on the resin sealing body, for which the transistor chips, the chip capacitors and the chip resistors are resin sealed, the high density mounting is realized.
    • 9. 发明专利
    • SEMICONDUCTOR DEVICE
    • JPH0521692A
    • 1993-01-29
    • JP32197891
    • 1991-12-05
    • HITACHI LTD
    • HIRASHIMA TOSHINORI
    • H01L21/60H01L23/04H01L23/50
    • PURPOSE:To obtain a semiconductor device high in heat dissipating efficiency by a method wherein a part of a package is interposed between the outer periphery of a semiconductor chip and the ends of leads, and a conductor layer smaller in thermal conductivity than a package is formed. CONSTITUTION:Inner leads used in common are arranged between an IC chip 51 and the ends of input-output signal inner leads 24-28 and 30-38 connected to wires. The surface of the inner leads concerned is set nearly level with that of the other lead 24 or the like. The inner leads are used in common as conductor layers arranged in radial paths to the semiconductor chip 1, a part of a package, the input-output signal inner lead 24 and the like, whereby the heat dissipating path of a semiconductor device of this design can be lessened in thermal resistance as the device is small in thermal conductivity as compared with a conventional resin package.
    • 10. 发明专利
    • SEMICONDUCTOR DEVICE AND ASSEMBLING METHOD THEREOF
    • JPH0521691A
    • 1993-01-29
    • JP32197791
    • 1991-12-05
    • HITACHI LTD
    • HIRASHIMA TOSHINORI
    • H01L23/50
    • PURPOSE:To enable a common electric path such as a power supply or the like to be lessened in resistance by a method wherein a second lead is arranged in parallel with one of the sides of a semiconductor chip, and the lead is connected to a pad through the intermediary of a wire. CONSTITUTION:In a lead frame 100, grounding inner leads 23, 29, and 39 are connected in one piece as shown by slant lines. All inner leads 25, 27, 31, 33, 35, and 37 used as grounding inner leads can be disused, so that the space where inner leads were is to be open. Inner leads used in common are made to extend along the end of a region where inner leads 30-38 are connected to the pads of an IC chip 51 and apart from it by a prescribed distance, the end of this inner lead is formed into one piece with a GND inner lead 29 on an arrangement first stage side, and the other end of the lead is formed into one piece with a GND inner lead 39 on an arrangement final stage side. The inner lead can be connected to a pad with a wire or the like, they can be connected to each other at the shortest distance.