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1. 发明专利

JPH0447827A ABNORMAL DATA COMMUNICATING PREVENTING SYSTEM FOR LOOP NETWORK 失效
公开(公告)号：JPH0447827A
公开(公告)日：1992-02-18
申请号：JP15671690
申请日：1990-06-15
申请人： HITACHI CABLE , HITACHI LTD
发明人： KURIYAMA MASARU , HAYAMA HIROYUKI , TOMIZAWA HIROSHI
IPC分类号： H04L12/42
摘要： PURPOSE:To prevent an abnormal data from flowing to a terminal by stopping transmitting a data received from a channel to the terminal by each node executing fully duplex communication in the case of generating abnormality in the node connected to the terminal as a communicating party. CONSTITUTION:Assuming that a node 1d on a terminal A side breaks down, a monitoring cycle is not t1 for a bit monitoring part 65 for monitoring a node 1b on a terminal B side. Assuming that the bit monitoring part 65 for monitor turns the output to '1'. Consequently, the output to the terminal B at a reception part 64 of the node 1b is turned to a Mark state ('1' at all times), and the transmission of the data received from the channel to the terminal B is stopped. Thus, at the terminal B, the data transmitted by the terminal itself is not returned as it is. Similarly, even when the abnormality is generated at the node 1b, the output is turned to '1' and the output to the terminal A is turned to the Mark state. Therefore, for the terminal A, the data transmitted by the terminal itself is not returned as it is.

2. 发明专利

JPH0368236A SYSTEM FOR PREVENTING ABNORMAL DATA COMMUNICATION IN LOOP NETWORK 失效
公开(公告)号：JPH0368236A
公开(公告)日：1991-03-25
申请号：JP20286389
申请日：1989-08-07
申请人： HITACHI CABLE , HITACHI LTD
发明人： HAYAMA HIROYUKI , TOMIZAWA HIROSHI
IPC分类号： H04L12/42
摘要： PURPOSE:To prevent abnormal data communication to a receiving terminal by providing a one-bit area for monitor in a channel and quickly detecting abnormality in a node at the receiving terminal side in case of the occurrence of the abnormality in a node on the transmitting terminal side. CONSTITUTION:At the time of sending data from a terminal A to a terminal B, a bit transmitting part 52 for monitor transmits a signal, which is repeatedly turned on and off at intervals of a certain time, to a bit 23 for monitor in the channel during data transmission. A bit non-change detecting part 55 for monitor in a receiving part 54 monitors contents of the received bit 23 and sets the detected output to '0' during the change of turning-on/off, and the detected output is set to '1' when the change of turning-on/off is not detected for a certain time or longer. That is, the output of the detecting part 55 is set to '1' and the output to the terminal B is set to the mark state when the bit 23 is not turned on/off because of the occurrence of abnormality in the node. Thus, abnormal data in the channel is prevented from flowing to the terminal B to improve the reliability of a system.

3. 发明专利

JPH1188397A SWITCHING HUB 失效
公开(公告)号：JPH1188397A
公开(公告)日：1999-03-30
申请号：JP23719997
申请日：1997-09-02
申请人： HITACHI CABLE
发明人： HAYAMA HIROYUKI
IPC分类号： H04L12/28 , H04L12/46
摘要： PROBLEM TO BE SOLVED: To provide a switching hub provided with a high-speed network interface part without enlarging a data transfer capacity. SOLUTION: This switching hub is provided with serial/parallel conversion parts 141 -144 between the high speed network I/F parts 111 -114 and low-speed switching parts 131 -134 and performs transfer by serial data with the high-speed network I/F parts 111 -114 . Then, the transfer is performed by parallel data with the low-speed switching parts 131 -134 and a data transfer speed is switched on the side of the high-speed network I/F parts 111 -114 and on the side of the low-speed switching parts 131 -134 .

4. 发明专利

JPH10150459A SWITCHING HUB WITH VIRTUAL LAN FUNCTION 失效
公开(公告)号：JPH10150459A
公开(公告)日：1998-06-02
申请号：JP30770896
申请日：1996-11-19
申请人： HITACHI CABLE
发明人： ANZAI YUICHI , HAYAMA HIROYUKI
IPC分类号： H04L12/46 , H04L12/44
摘要： PROBLEM TO BE SOLVED: To increase the number of maximum virtual LAN groups without reducing the number of entries by providing a plurality of areas storing identification information of virtual LAN for a filtering table and representing the virtual LAN group by means of the combination of identification information stored in the respective areas. SOLUTION: The MAC address 301 of a terminal, the port number 302 of a port to which the terminal is connected and the virtual LAN group 303 to which the terminal belongs are made to correspond and they are registered in the entry of the filtering table. The two areas for storing identification information of virtual LAN are provided for a virtual LAN group 303. In such a case, the bit width of the whole storage areas of virtual LAN identification is 16 bits. Identification information are stored in a higher four bits area 304 and the lower eight bits area 305. The virtual LAN group is displayed by the combination of two pieces of identification information. Thus, the number of maximum LAN groups becomes 2 ×12=192.

5. 发明专利

JPH1091302A SETTING DATA INFORMING CIRCUIT 失效
公开(公告)号：JPH1091302A
公开(公告)日：1998-04-10
申请号：JP24180996
申请日：1996-09-12
申请人： HITACHI CABLE
发明人： HAYAMA HIROYUKI , ANZAI YUICHI
IPC分类号： G06F3/00 , G06F13/36
摘要： PROBLEM TO BE SOLVED: To provide the setting data informing circuit which can reduce the number of signal lines. SOLUTION: The circuit which informs a control part 13, performing specific operation, bit by bit, according to setting data consisting of plural bits, of pieces of setting data from a CPU 11 is provided with a memory 14 with specific-bit width which have data storage areas where the CPU 11 can write the setting data and the control part 13 can read them. Then the CPU 11 outputs indication signals (setting data read indication signal lines 15a and 15b) by the setting data to the control part 13, which reads the contents of the memory 14 by the setting data according to the indication signals.

6. 发明专利

JPH08195759A MULTI-PORT BRIDGE 失效
公开(公告)号：JPH08195759A
公开(公告)日：1996-07-30
申请号：JP544795
申请日：1995-01-18
申请人： HITACHI CABLE
发明人： HAYAMA HIROYUKI
IPC分类号： H04L12/40
摘要： PURPOSE: To allow a multi-port bridge to attain high speed transmission/ reception processing. CONSTITUTION: A CPU 1 and interface sections 3-1 -3- N are connected via a common bus 2 and a CPU 8 controls the interface sections 3-1 3- N to conduct frame transmission and reception in the multi-port bridge, in which a register 10 connecting to the CPU 8 and a CPU 9 being a 2nd CPU writing interrupt information relating to normal transmission reception end to the register 10 and executing processing relating to occurrence of an error and the CPU 8 is used exclusively for transmission reception processing.

7. 发明专利

JPH08166917A INTER-NETWORK CONNECTION DEVICE 失效
公开(公告)号：JPH08166917A
公开(公告)日：1996-06-25
申请号：JP30932194
申请日：1994-12-13
申请人： HITACHI CABLE
发明人： HAYAMA HIROYUKI , NITANI MICHIO
IPC分类号： G06F15/16 , G06F13/00 , G06F15/173
摘要： PURPOSE: To recognize the mounting number of memories for address registration without executing software exchange and the setting operation of a switch. CONSTITUTION: An inter-network connection device is provided between networks which are mutually independent, and the memory for address registration 7 recognizing the address of a terminal equipment connected to the respective-networks is mounted on it and it can extend an extension memory 10 in accordance with the scale of the network. A status register 16 for reading the state of Full signal showing the full of respective capacities of the memory for address registration 7 and the extension memory 10 is provided. The content of the status register 16 is read and the mounting number of the memory for address registration 7 is judged.

8. 发明专利

JPH0553969A DMA CONTROL CIRCUIT 失效
公开(公告)号：JPH0553969A
公开(公告)日：1993-03-05
申请号：JP21212891
申请日：1991-08-23
申请人： HITACHI CABLE
发明人： ASANO MITSUHARU , SOAN HIDEO , HAYAMA HIROYUKI , TANNO KAZUHIKO
IPC分类号： G06F13/28
摘要： PURPOSE:To provide the DMA control circuit which can reduce an influence exerted upon the performance of a microprocessor and can transfer data at a high speed. CONSTITUTION:A DMA control circuit 2 is provided with a means to calculate average time for acquiring a bus from a microprocessor 1, the average time for acquiring buses 5-7 from the microprocessor 1 is calculated, and the relevant time is compared with time for continuously transferring data or for transferring data specified times. When the average time for acquiring the buses 5-7 from the microprocessor 1 is longer, time for acquiring the buses 5-7 and for continuously transferring time is increased and when the average time for acquiring the buses from the microprocessor 1 is shorter, time for acquiring the buses 5-7 and for continuously transferring data is decreased.

9. 发明专利

JPH04172033A OPTICAL CONCENTRATOR 失效
公开(公告)号：JPH04172033A
公开(公告)日：1992-06-19
申请号：JP29906290
申请日：1990-11-06
申请人： HITACHI CABLE
发明人： KURIYAMA MASARU , AOKI TERUAKI , IMAI YASUMASA , HAYAMA HIROYUKI , NITANI MICHIO
IPC分类号： H04B10/27 , H04B10/035 , H04B10/079 , H04B10/275 , H04B10/29 , H04L12/42
摘要： PURPOSE:To save the labor of receiving both a subscription control signal and a withdrawal control signal from a station by detecting the presence or absence of lights demultiplexed by an optical demultiplexer, and controlling an optical switch so that the station can be allowed to subscribe for a loop when receiving an optical signal from the station, and to withdraw from the loop when not receiving the optical signal from the station. CONSTITUTION:This device is equipped with an optical switch 43 which operates the subscription and withdrawal of a station 13 to and from a loop 11, and an optical demultiplexer 41 which is provided on the optical path of the optical signal from the station. And also, this device is equipped with a monitor circuit 42 which detects the presence or absence of the demultiplexed lights, and controls the optical switch 43 so that the station 13 can be allowed to subscribe for the loop 11 when receiving the optical signal from the station 13, and to withdraw from the loop 11 when not receiving the optical signal from the station 13. Thus, an optical concentrator in which it is not necessary to receive both the subscription control signal and the withdrawal control signal, and to receive more than the number of the station times of the O/E (optical/electric) conversion and E/O(electric/optical) conversion of the signal, can be obtained.

10. 发明专利

JPH02252337A LOOP NETWORK 失效
公开(公告)号：JPH02252337A
公开(公告)日：1990-10-11
申请号：JP7180989
申请日：1989-03-27
申请人： HITACHI CABLE
发明人： HAYAMA HIROYUKI
IPC分类号： H04L12/42
摘要： PURPOSE:To attain the transmission between terminal equipments belonging to a low speed network without a gate way or a PBX by assigning plural low speed network assignment areas so that parts of them are overlapped with each other. CONSTITUTION:In the case of building up a loop network 15 by connecting two low speed networks A, B to a high speed network, a high speed network node 12 and nodes 30a, 30b of the low speed networks A, B are provided to the network 15. In this case, a low speed network A use area 23 and B use area 24 are provided to a transmission frame 20 of the high speed network and an area 25 is assigned so that parts of them are overlapped with each other. Then a transmission frame of the two low speed networks A, B is given to the areas 23, 24, the frame is actually sent onto the loop by the high speed network and the communication between the terminal equipments of the networks A, B is implemented by using the area 25. Thus, the transmission between terminal equipments belonging to the low speed network is attained without a gateway or a PBX.

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