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1. 发明授权

US08187918B2 Methods of forming multi-level cell of semiconductor memory 有权
标题翻译：形成半导体存储器多级单元的方法
公开(公告)号：US08187918B2
公开(公告)日：2012-05-29
申请号：US12587772
申请日：2009-10-13
申请人： Gyu-Hwan Oh , Hyeung-Geun An , Soon-Oh Park , Dong-Ho Ahn , Young-Lim Park
发明人： Gyu-Hwan Oh , Hyeung-Geun An , Soon-Oh Park , Dong-Ho Ahn , Young-Lim Park
IPC分类号： H01L21/06
CPC分类号： H01L45/141 , H01L27/2409 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/144 , H01L45/1666 , H01L45/1683
摘要： Provided is a method of forming a semiconductor memory cell in which in order to store two bits or more data in a memory cell, three or more bottom electrode contacts (BECs) and phase-change materials (GST) have a parallel structure on a single contact plug (CP) and set resistances are changed depending on thicknesses (S), lengths (L) or resistivities (ρ) of the three or more bottom electrode contacts, so that a reset resistance and three different set resistances enable data other than in set and reset states to be stored. Also, a method of forming a memory cell in which three or more phase-change materials (GST) have a parallel structure on a single bottom electrode contact, and the phase-change materials have different set resistances depending on composition ratio or type, so that four or more different resistances can be implemented is provided.
摘要翻译：提供了一种形成半导体存储单元的方法，其中为了在存储单元中存储两个或更多个数据，三个或更多个底部电极触点（BEC）和相变材料（GST）在单个存储单元上具有并联结构接触插头（CP）和设定电阻根据三个或更多个底部电极触点的厚度（S），长度（L）或电阻率（＆rgr）而改变，因此复位电阻和三种不同的设定电阻使数据不能在设置和复位状态下存储。此外，形成其中三个或更多个相变材料（GST）在单个底部电极接触上具有平行结构的存储单元的方法，并且相变材料根据组成比或类型具有不同的设定电阻，因此可以实现四个或更多个不同的电阻。

2. 发明申请

US20100093130A1 Methods of forming multi-level cell of semiconductor memory 有权
标题翻译：形成半导体存储器多级单元的方法
公开(公告)号：US20100093130A1
公开(公告)日：2010-04-15
申请号：US12587772
申请日：2009-10-13
申请人： Gyu-Hwan Oh , Hyeong-Geun An , Soon-Oh Park , Dong-Ho Ahn , Young-Lim Park
发明人： Gyu-Hwan Oh , Hyeong-Geun An , Soon-Oh Park , Dong-Ho Ahn , Young-Lim Park
IPC分类号： H01L21/06
CPC分类号： H01L45/141 , H01L27/2409 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/144 , H01L45/1666 , H01L45/1683
摘要： Provided is a method of forming a semiconductor memory cell in which in order to store two bits or more data in a memory cell, three or more bottom electrode contacts (BECs) and phase-change materials (GST) have a parallel structure on a single contact plug (CP) and set resistances are changed depending on thicknesses (S), lengths (L) or resistivities (ρ) of the three or more bottom electrode contacts, so that a reset resistance and three different set resistances enable data other than in set and reset states to be stored. Also, a method of forming a memory cell in which three or more phase-change materials (GST) have a parallel structure on a single bottom electrode contact, and the phase-change materials have different set resistances depending on composition ratio or type, so that four or more different resistances can be implemented is provided.
摘要翻译：提供了一种形成半导体存储单元的方法，其中为了在存储单元中存储两个或更多个数据，三个或更多个底部电极触点（BEC）和相变材料（GST）在单个存储单元上具有并联结构接触插头（CP）和设定电阻根据三个或更多个底部电极触点的厚度（S），长度（L）或电阻率（＆rgr）而改变，因此复位电阻和三种不同的设定电阻使数据不能在设置和复位状态下存储。此外，形成其中三个或更多个相变材料（GST）在单个底部电极接触上具有平行结构的存储单元的方法，并且相变材料根据组成比或类型具有不同的设定电阻，因此可以实现四个或更多个不同的电阻。

3. 发明授权

US08133758B2 Method of fabricating phase-change memory device having TiC layer 有权
标题翻译：具有TiC层的相变存储器件的制造方法
公开(公告)号：US08133758B2
公开(公告)日：2012-03-13
申请号：US12623513
申请日：2009-11-23
申请人： Gyu-Hwan Oh , Young-Lim Park , Soon-Oh Park , Jin-Il Lee , Chang-Su Kim
发明人： Gyu-Hwan Oh , Young-Lim Park , Soon-Oh Park , Jin-Il Lee , Chang-Su Kim
IPC分类号： H01L21/00
CPC分类号： H01L45/124 , C23C16/32 , C23C16/45523 , H01L27/2409 , H01L27/2463 , H01L45/06 , H01L45/126 , H01L45/144 , H01L45/148 , H01L45/16 , H01L45/1666
摘要： Provided is a method of fabricating a phase-change memory device. The phase-change memory device includes a memory cell having a switching device and a phase change pattern. The method includes; forming a TiC layer on a contact electrically connecting the switching device using a plasma enhanced cyclic chemical vapor deposition (PE-cyclic CVD) process, patterning the TiC layer to form a lower electrode on the contact, and forming the phase-change pattern on the lower electrode.
摘要翻译：提供一种制造相变存储器件的方法。相变存储器件包括具有开关器件和相变模式的存储器单元。该方法包括：在使用等离子体增强循环化学气相沉积（PE循环CVD）工艺电连接开关装置的触点上形成TiC层，图案化TiC层以在触点上形成下电极，并在下电极。

4. 发明授权

US08021977B2 Methods of forming contact structures and semiconductor devices fabricated using contact structures 有权
标题翻译：形成接触结构的方法和使用接触结构制造的半导体器件
公开(公告)号：US08021977B2
公开(公告)日：2011-09-20
申请号：US12627810
申请日：2009-11-30
申请人： Young-Lim Park , Hyeong-Geun An , Gyu-Hwan Oh , Dong-Ho Ahn , Jin-Il Lee
发明人： Young-Lim Park , Hyeong-Geun An , Gyu-Hwan Oh , Dong-Ho Ahn , Jin-Il Lee
IPC分类号： H01L21/4763 , H01L21/768
CPC分类号： H01L21/76816 , H01L27/24
摘要： Provided are methods of forming contact structures and semiconductor devices fabricated using the contact structures. The formation of a contact structure can include forming a first molding pattern on a substrate, forming an insulating layer to cover at least a sidewall of the first molding pattern, forming a second molding pattern to cover a sidewall of the insulating layer and spaced apart from the first molding pattern, removing a portion of the insulating layer between the first and second molding patterns to form a hole, and forming an insulating pattern between the first and second molding patterns, and forming a contact pattern in the hole.
摘要翻译：提供了形成使用接触结构制造的接触结构和半导体器件的方法。接触结构的形成可以包括在基底上形成第一模制图案，形成绝缘层以覆盖至少第一模制图案的侧壁，形成第二模制图案以覆盖绝缘层的侧壁并与第一模制图案，去除第一和第二模制图案之间的绝缘层的一部分以形成孔，并且在第一和第二模制图案之间形成绝缘图案，并在孔中形成接触图案。

5. 发明申请

US20100144138A1 METHODS OF FORMING CONTACT STRUCTURES AND SEMICONDUCTOR DEVICES FABRICATED USING CONTACT STRUCTURES 有权
标题翻译：形成接触结构的方法和使用接触结构织造的半导体器件
公开(公告)号：US20100144138A1
公开(公告)日：2010-06-10
申请号：US12627810
申请日：2009-11-30
申请人： Young-Lim Park , Hyeong-Geun An , Gyu-Hwan Oh , Dong-Ho Ahn , Jin-Il Lee
发明人： Young-Lim Park , Hyeong-Geun An , Gyu-Hwan Oh , Dong-Ho Ahn , Jin-Il Lee
IPC分类号： H01L21/768
CPC分类号： H01L21/76816 , H01L27/24
摘要： Provided are methods of forming contact structures and semiconductor devices fabricated using the contact structures. The formation of a contact structure can include forming a first molding pattern on a substrate, forming an insulating layer to cover at least a sidewall of the first molding pattern, forming a second molding pattern to cover a sidewall of the insulating layer and spaced apart from the first molding pattern, removing a portion of the insulating layer between the first and second molding patterns to form a hole, and forming an insulating pattern between the first and second molding patterns, and forming a contact pattern in the hole.
摘要翻译：提供了形成使用接触结构制造的接触结构和半导体器件的方法。接触结构的形成可以包括在基底上形成第一模制图案，形成绝缘层以覆盖至少第一模制图案的侧壁，形成第二模制图案以覆盖绝缘层的侧壁并与第一模制图案，去除第一和第二模制图案之间的绝缘层的一部分以形成孔，并且在第一和第二模制图案之间形成绝缘图案，并在孔中形成接触图案。

6. 发明申请

US20090017577A1 Methods of Forming Phase Change Memory Devices Having Bottom Electrodes 有权
标题翻译：形成具有底部电极的相变存储器件的方法
公开(公告)号：US20090017577A1
公开(公告)日：2009-01-15
申请号：US12170038
申请日：2008-07-09
申请人： Hyeong-Geun An , Dong-Ho Ahn , Young-Soo Lim , Yong-Ho Ha , Jun-Young Jang , Dong-Won Lim , Gyeo-Re Lee , Joon-Sang Park , Han-Bong Ko , Young-Lim Park
发明人： Hyeong-Geun An , Dong-Ho Ahn , Young-Soo Lim , Yong-Ho Ha , Jun-Young Jang , Dong-Won Lim , Gyeo-Re Lee , Joon-Sang Park , Han-Bong Ko , Young-Lim Park
IPC分类号： H01L45/00
CPC分类号： H01L45/1253 , H01L27/2409 , H01L27/2436 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/1273 , H01L45/141 , H01L45/16 , Y10S438/90
摘要： Phase change memory devices can have bottom patterns on a substrate. Line-shaped or L-shaped bottom electrodes can be formed in contact with respective bottom patterns on a substrate and to have top surfaces defined by dimensions in x and y axes directions on the substrate. The dimension along the x-axis of the top surface of the bottom electrodes has less width than a resolution limit of a photolithography process used to fabricate the phase change memory device. Phase change patterns can be formed in contact with the top surface of the bottom electrodes to have a greater width than each of the dimensions in the x and y axes directions of the top surface of the bottom electrodes and top electrodes can be formed on the phase change patterns, wherein the line shape or the L shape represents a sectional line shape or a sectional L shape of the bottom electrodes in the x-axis direction.
摘要翻译：相变存储器件可以在衬底上具有底部图案。线形或L形底部电极可以形成为与衬底上的相应底部图案接触并且具有由衬底上沿x和y轴方向的尺寸限定的顶表面。沿着底部电极的顶表面的x轴的尺寸比用于制造相变存储器件的光刻工艺的分辨率极限具有更小的宽度。相变图案可以形成为与底部电极的顶表面接触以具有比底部电极的顶表面的x和y轴方向上的每个尺寸更大的宽度，并且顶部电极可以形成在相位上其中线形或L形表示底部电极在x轴方向上的截面线形状或截面L形。

7. 发明申请

US20130234100A1 NONVOLATILE MEMORY CELLS HAVING PHASE CHANGEABLE PATTERNS THEREIN FOR DATA STORAGE 审中-公开
标题翻译：具有数据存储的相位可变图案的非易失性存储器单元
公开(公告)号：US20130234100A1
公开(公告)日：2013-09-12
申请号：US13860836
申请日：2013-04-11
申请人： Hyeong-Geun An , Dong-Ho Ahn , Young-Soo Lim , Yong-Ho Ha , Jun-Young Jang , Dong-Won Lim , Gyeo-Re Lee , Joon-Sang Park , Han-Bong Ko , Young-Lim Park
发明人： Hyeong-Geun An , Dong-Ho Ahn , Young-Soo Lim , Yong-Ho Ha , Jun-Young Jang , Dong-Won Lim , Gyeo-Re Lee , Joon-Sang Park , Han-Bong Ko , Young-Lim Park
IPC分类号： H01L45/00
CPC分类号： H01L45/1253 , H01L27/2409 , H01L27/2436 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/1273 , H01L45/141 , H01L45/16 , Y10S438/90
摘要： Phase change memory devices can have bottom patterns on a substrate. Line-shaped or L-shaped bottom electrodes can be formed in contact with respective bottom patterns on a substrate and to have top surfaces defined by dimensions in x and y axes directions on the substrate. The dimension along the x-axis of the top surface of the bottom electrodes has less width than a resolution limit of a photolithography process used to fabricate the phase change memory device. Phase change patterns can be formed in contact with the top surface of the bottom electrodes to have a greater width than each of the dimensions in the x and y axes directions of the top surface of the bottom electrodes and top electrodes can be formed on the phase change patterns, wherein the line shape or the L shape represents a sectional line shape or a sectional L shape of the bottom electrodes in the x-axis direction.
摘要翻译：相变存储器件可以在衬底上具有底部图案。线形或L形底部电极可以形成为与衬底上的相应底部图案接触并且具有由衬底上沿x和y轴方向的尺寸限定的顶表面。沿着底部电极的顶表面的x轴的尺寸比用于制造相变存储器件的光刻工艺的分辨率极限具有更小的宽度。相变图案可以形成为与底部电极的顶表面接触以具有比底部电极的顶表面的x和y轴方向上的每个尺寸更大的宽度，并且顶部电极可以形成在相位上其中线形或L形表示底部电极在x轴方向上的截面线形状或截面L形。

8. 发明授权

US08426840B2 Nonvolatile memory cells having phase changeable patterns therein for data storage 有权
标题翻译：其中具有用于数据存储的相变图案的非易失性存储单元
公开(公告)号：US08426840B2
公开(公告)日：2013-04-23
申请号：US12913099
申请日：2010-10-27
申请人： Hyeong-Geun An , Dong-Ho Ahn , Young-Soo Lim , Yong-Ho Ha , Jun-Young Jang , Dong-Won Lim , Gyeo-Re Lee , Joon-Sang Park , Han-Bong Ko , Young-Lim Park
发明人： Hyeong-Geun An , Dong-Ho Ahn , Young-Soo Lim , Yong-Ho Ha , Jun-Young Jang , Dong-Won Lim , Gyeo-Re Lee , Joon-Sang Park , Han-Bong Ko , Young-Lim Park
IPC分类号： H01L47/00
CPC分类号： H01L45/1253 , H01L27/2409 , H01L27/2436 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/1273 , H01L45/141 , H01L45/16 , Y10S438/90
摘要： A nonvolatile memory cell includes a substrate and a phase changeable pattern configured to retain a state of the memory cell, on the substrate. An electrically insulating layer is provided, which contains a first electrode therein in contact with the phase changeable pattern. The first electrode has at least one of an L-shape when viewed in cross section and an arcuate shape when viewed from a plan perspective. A lower portion of the first electrode may be ring-shaped when viewed from the plan perspective. The lower portion of the first electrode may also have a U-shaped cross-section. An upper portion of the first electrode may also have an arcuate shape that spans more than 180° of a circular arc.
摘要翻译：非易失性存储单元包括衬底和配置为将存储单元的状态保持在衬底上的相变图案。提供电绝缘层，其包含与相变图案接触的第一电极。第一电极在从横截面观察时具有L形中的至少一个，并且从平面图看为弧形。从平面图看，第一电极的下部可以是环状的。第一电极的下部也可以具有U形横截面。第一电极的上部也可以具有跨越180°以上圆弧的弓形形状。

9. 发明申请

US20110044098A1 Nonvolatile Memory Cells Having Phase Changeable Patterns Therein for Data Storage 有权
标题翻译：非易失性存储单元，具有数据存储的相变模式
公开(公告)号：US20110044098A1
公开(公告)日：2011-02-24
申请号：US12913099
申请日：2010-10-27
申请人： Hyeong-Geun An , Dong-Ho Ahn , Young-Soo Lim , Yong-Ho Ha , Jun-Young Jang , Dong-Won Lim , Gyeo-Re Lee , Joon-Sang Park , Han-Bong Ko , Young-Lim Park
发明人： Hyeong-Geun An , Dong-Ho Ahn , Young-Soo Lim , Yong-Ho Ha , Jun-Young Jang , Dong-Won Lim , Gyeo-Re Lee , Joon-Sang Park , Han-Bong Ko , Young-Lim Park
IPC分类号： G11C11/46
CPC分类号： H01L45/1253 , H01L27/2409 , H01L27/2436 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/1273 , H01L45/141 , H01L45/16 , Y10S438/90
摘要： A nonvolatile memory cell includes a substrate and a phase changeable pattern configured to retain a state of the memory cell, on the substrate. An electrically insulating layer is provided, which contains a first electrode therein in contact with the phase changeable pattern. The first electrode has at least one of an L-shape when viewed in cross section and an arcuate shape when viewed from a plan perspective. A lower portion of the first electrode may be ring-shaped when viewed from the plan perspective. The lower portion of the first electrode may also have a U-shaped cross-section. An upper portion of the first electrode may also have an arcuate shape that spans more than 180° of a circular arc.
摘要翻译：非易失性存储单元包括衬底和配置为将存储单元的状态保持在衬底上的相变图案。提供电绝缘层，其包含与相变图案接触的第一电极。第一电极在从横截面观察时具有L形中的至少一个，并且从平面图看为弧形。从平面图看，第一电极的下部可以是环状的。第一电极的下部也可以具有U形横截面。第一电极的上部也可以具有跨越180°以上圆弧的弓形形状。

10. 发明授权

US07824954B2 Methods of forming phase change memory devices having bottom electrodes 有权
标题翻译：形成具有底部电极的相变存储器件的方法
公开(公告)号：US07824954B2
公开(公告)日：2010-11-02
申请号：US12170038
申请日：2008-07-09
申请人： Hyeong-Geun An , Dong-Ho Ahn , Young-Soo Lim , Yong-Ho Ha , Jun-Young Jang , Dong-Won Lim , Gyeo-Re Lee , Joon-Sang Park , Han-Bong Ko , Young-Lim Park
发明人： Hyeong-Geun An , Dong-Ho Ahn , Young-Soo Lim , Yong-Ho Ha , Jun-Young Jang , Dong-Won Lim , Gyeo-Re Lee , Joon-Sang Park , Han-Bong Ko , Young-Lim Park
IPC分类号： H01L21/06
CPC分类号： H01L45/1253 , H01L27/2409 , H01L27/2436 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/1273 , H01L45/141 , H01L45/16 , Y10S438/90
摘要： Phase change memory devices can have bottom patterns on a substrate. Line-shaped or L-shaped bottom electrodes can be formed in contact with respective bottom patterns on a substrate and to have top surfaces defined by dimensions in x and y axes directions on the substrate. The dimension along the x-axis of the top surface of the bottom electrodes has less width than a resolution limit of a photolithography process used to fabricate the phase change memory device. Phase change patterns can be formed in contact with the top surface of the bottom electrodes to have a greater width than each of the dimensions in the x and y axes directions of the top surface of the bottom electrodes and top electrodes can be formed on the phase change patterns, wherein the line shape or the L shape represents a sectional line shape or a sectional L shape of the bottom electrodes in the x-axis direction.
摘要翻译：相变存储器件可以在衬底上具有底部图案。线形或L形底部电极可以形成为与衬底上的相应底部图案接触并且具有由衬底上沿x和y轴方向的尺寸限定的顶表面。沿着底部电极的顶表面的x轴的尺寸比用于制造相变存储器件的光刻工艺的分辨率极限具有更小的宽度。相变图案可以形成为与底部电极的顶表面接触以具有比底部电极的顶表面的x和y轴方向上的每个尺寸更大的宽度，并且顶部电极可以形成在相位上其中线形或L形表示底部电极在x轴方向上的截面线形状或截面L形。

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