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1. 发明授权

US5237218A Structure and method for multiplexing pins for in-system programming 失效
标题翻译：用于多系统编程的引脚的结构和方法
公开(公告)号：US5237218A
公开(公告)日：1993-08-17
申请号：US695356
申请日：1991-05-03
申请人： Gregg R. Josephson , Ju Shen , Roy D. Darling , Chan-Chi J. Cheng
发明人： Gregg R. Josephson , Ju Shen , Roy D. Darling , Chan-Chi J. Cheng
IPC分类号： G05B19/02 , G06F17/50 , H03K19/173 , H03K19/177
CPC分类号： H03K19/1737 , G06F17/5054
摘要： A structure and method for in-system programming of a programmable logic device are provided. The in-system programming structure provides one dedicated pin for in-system programming function, additional in-system programming pins are multiplexed with programmable input/output pins used in functional operations. When an enable signal is received at the dedicated pin, the multiplexed pins relinquish their roles as programmable input/output pin to become in-system programming pins. A state machine controls the programming steps. The in-system programming structure can be cascaded in a "daisy chain" fashion.
摘要翻译：提供了一种用于可编程逻辑器件的在系统编程的结构和方法。系统内编程结构为系统内编程功能提供了一个专用引脚，其他在系统编程引脚与功能操作中使用的可编程输入/输出引脚复用。当在专用引脚上接收到使能信号时，多路复用引脚放弃其作为可编程输入/输出引脚的作用，成为系统内编程引脚。状态机控制编程步骤。系统内编程结构可以以“菊花链”的方式进行级联。

2. 发明授权

US5336951A Structure and method for multiplexing pins for in-system programming 失效
标题翻译：用于在系统编程中复用引脚的结构和方法
公开(公告)号：US5336951A
公开(公告)日：1994-08-09
申请号：US106498
申请日：1993-08-13
申请人： Gregg R. Josephson , Ju Shen , Roy D. Darling , Chan-Chi J. Cheng
发明人： Gregg R. Josephson , Ju Shen , Roy D. Darling , Chan-Chi J. Cheng
IPC分类号： G05B19/02 , G06F17/50 , H03K19/173 , H03K19/177
CPC分类号： H03K19/1737 , G06F17/5054
摘要： A structure and method for in-system programming of a programmable logic device are provided. The in-system programming structure provides one dedicated pin for in-system programming function, additional in-system programming pins are multiplexed with programmable input/output pins used in functional operations. When an enable signal is received at the dedicated pin, the multiplexed pins relinquish their roles as programmable input/output pin to become in-system programming pins. A state machine controls the programming steps. The in-system programming structure can be cascaded in a "daisy chain" fashion.
摘要翻译：提供了一种用于可编程逻辑器件的在系统编程的结构和方法。系统内编程结构为系统内编程功能提供了一个专用引脚，其他在系统编程引脚与功能操作中使用的可编程输入/输出引脚复用。当在专用引脚上接收到使能信号时，多路复用引脚放弃其作为可编程输入/输出引脚的作用，成为系统内编程引脚。状态机控制编程步骤。系统内编程结构可以以“菊花链”的方式进行级联。

3. 发明授权

US5162679A Sense amplifier with depletion transistor feedback 失效
标题翻译：具有耗尽晶体管反馈的感应放大器
公开(公告)号：US5162679A
公开(公告)日：1992-11-10
申请号：US695181
申请日：1991-05-03
申请人： Ju Shen , Albert L. Chan , Chan-Chi J. Cheng
发明人： Ju Shen , Albert L. Chan , Chan-Chi J. Cheng
IPC分类号： H03K19/017 , H03K19/0944
CPC分类号： H03K19/09445 , H03K19/01721
摘要： A sense amplifier circuit is disclosed which utilizes a field effect transistor having a negative threshold voltage to provide a faster switching speed for a given current consumption. A depletion mode transistor is utilized as the feedback transistor, with the gate of the depletion mode transistor being coupled to the output of the second stage of the sense amplifier. The first stage of the sense amplifier includes in addition to the depletion mode transistor a second field effect transistor connected in series with said feedback transistor, with the gate and drain of the second transistor being commonly connected. The sense amplifier circuit also includes third and fourth stages providing inversion and amplification of the signal provided at the output of the second stage, with the third and fourth stages comprising a depletion load inverter and a CMOS inverter, respectively.
摘要翻译：公开了一种读出放大器电路，其利用具有负阈值电压的场效应晶体管来为给定的电流消耗提供更快的切换速度。耗尽型晶体管用作反馈晶体管，耗尽型晶体管的栅极耦合到读出放大器的第二级的输出端。读出放大器的第一级除了耗尽型晶体管之外还包括与所述反馈晶体管串联连接的第二场效应晶体管，第二晶体管的栅极和漏极共同连接。感测放大器电路还包括第三级和第四级，其提供在第二级的输出处提供的信号的反相和放大，其中第三级和第四级分别包括耗尽负载反相器和CMOS反相器。

4. 发明授权

US5138198A Integrated programmable logic device with control circuit to power down unused sense amplifiers 失效
标题翻译：具有控制电路的集成可编程逻辑器件，用于关闭未使用的读出放大器
公开(公告)号：US5138198A
公开(公告)日：1992-08-11
申请号：US695180
申请日：1991-05-03
申请人： Ju Shen , Albert L. Chan , Chan-Chi J. Cheng
发明人： Ju Shen , Albert L. Chan , Chan-Chi J. Cheng
IPC分类号： H03K19/00
CPC分类号： H03K19/0016
摘要： A programmable logic device is disclosed which includes sense amplifiers for determining the programmed/unprogrammed state of product terms coupled to respective ones of the sense amplifiers. A control circuit is provided for the sense amplifiers to permit, under control from a control signal, disabling sense amplifiers which are not being used in the achievement of the logical function of the programmable logic device to avoid unnecessary use of current by the sense amplifiers which are not operative for the function being implemented. In addition to eliminating current drain by the unused sense amplifier, the control circuit also ensures that a low output signal will always be provided at the output of the disabled sense amplifier to avoid potentially indicating an incorrect logical output from the sense amplifier which is connected to other devices in the programmable logic device.
摘要翻译：公开了一种可编程逻辑器件，其包括读出放大器，用于确定耦合到相应读出放大器的产品项的编程/未编程状态。提供了一种用于感测放大器的控制电路，以便在控制信号的控制下，禁止未被用于实现可编程逻辑器件的逻辑功能的读出放大器，以避免读出放大器不必要地使用电流对于正在执行的功能不起作用。除了消除未使用的读出放大器的电流消耗之外，控制电路还确保总是在禁用的读出放大器的输出处提供低输出信号，以避免潜在地指示来自读出放大器的不正确的逻辑输出，可编程逻辑器件中的其他器件。

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