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    • 1. 发明授权
    • Method and apparatus for indicating a duplication of entries in a
content addressable storage device
    • 用于指示内容可寻址存储设备中的条目的重复的方法和装置
    • US5220526A
    • 1993-06-15
    • US662610
    • 1991-03-01
    • Grady L. GilesYui K. HoRobert B. Cohen
    • Grady L. GilesYui K. HoRobert B. Cohen
    • G11C15/00
    • G11C15/00
    • An apparatus (10) indicates a duplication of information stored in a content addressable memory (CAM 12) system at the time the information is written to the system. In the CAM system, Match line signals (Match 0-Match (N-1) are asserted when information being written to a predetermined row is identical to information previously stored in the system. However, the Match line signal associated with the predetermined row is disabled by a predetermined transistor (14, 16, 18, 20) when the row is written. Because information is simultaneously presented in parallel to other rows in the CAM system, a Match line signal is asserted if the information currently written to the predetermined row is identical to information previously written to another row in the CAM system. Any asserted Match line signal which was not disabled indicates to the user of the CAM system that two or more entries are identical in the CAM array.
    • 当信息被写入系统时,装置(10)指示存储在内容可寻址存储器(CAM 12)系统中的信息的复制。 在CAM系统中,当写入预定行的信息与先前存储在系统中的信息相同时,匹配线信号(匹配0匹配(N-1))被置位,然而,与预定行相关联的匹配线信号是 当行被写入时由预定晶体管(14,16,18,20)禁止,因为与CAM系统中的其他行同时呈现信息,所以如果当前写入预定行的信息则匹配线信号被断言 与先前写入CAM系统中的另一行的信息相同,任何未被禁用的断言的匹配线信号向CAM系统的用户指示CAM阵列中两个或多个条目相同。
    • 2. 发明授权
    • Data processor with combined static and dynamic masking of operand for
breakpoint operation
    • 具有组合静态和动态屏蔽操作数​​的数据处理器,用于断点操作
    • US5341500A
    • 1994-08-23
    • US679478
    • 1991-04-02
    • William C. MoyerJoseph A. GutierrezYui K. Ho
    • William C. MoyerJoseph A. GutierrezYui K. Ho
    • G06F11/28G06F9/308G06F11/34
    • G06F9/30018
    • A data processing system (10) implements a combined static and a dynamic masking operation of a breakpoint address. A static mask implements a conditional mask of a predetermined number of bits specified by the user and is determined prior to a comparison operation between the breakpoint address stored in a breakpoint register (24) and a logical address transferred via a logical address bus (11). A dynamic mask value implements a variable mask which allows the data processing system to mask the breakpoint address according to the size of a breakpoint address access. The static mask value and the dynamic mask value are combined using the same circuitry to form a combined mask value (19). Breakpoint function and address translation are implemented in the system (10) by using the same drive and control circuitry (20, 44, 48) to accomplish both functions. The breakpoint register (24) is implemented as an entry in a CAM array (26).
    • 数据处理系统(10)实现断点地址的组合静态和动态屏蔽操作。 静态掩码实现由用户指定的预定数量的比特的条件掩码,并且在存储在断点寄存器(24)中的断点地址与通过逻辑地址总线(11)传送的逻辑地址之间的比较操作之前确定, 。 动态掩码值实现一个可变掩码,允许数据处理系统根据断点地址访问的大小屏蔽断点地址。 使用相同的电路组合静态屏蔽值和动态屏蔽值以形成组合屏蔽值(19)。 断点功能和地址转换在系统(10)中通过使用相同的驱动和控制电路(20,44,48)实现这两个功能来实现。 断点寄存器(24)被实现为CAM阵列(26)中的条目。
    • 3. 发明授权
    • Data processor with concurrent static and dynamic masking of operand
information and method therefor
    • 数据处理器具有并发静态和动态屏蔽的操作数信息及其方法
    • US5319763A
    • 1994-06-07
    • US679463
    • 1991-04-02
    • Yui K. HoWilliam C. MoyerJoseph A. Gutierrez
    • Yui K. HoWilliam C. MoyerJoseph A. Gutierrez
    • G06F7/00G06F7/76G06F9/308G06F11/28G06F15/82G06F9/22G06F9/26G06F11/18G06F13/30
    • G06F9/30018
    • A data processing system (10) implements a static and a dynamic masking operation of operand information concurrently. A static mask implements a conditional mask of a predetermined number of bits specified by the user and is determined prior to a comparison operation between the breakpoint address stored in a breakpoint register (24) and a logical address transferred via a logical address bus (11). A dynamic mask value implements a variable mask which allows the data processing system to mask the breakpoint address according to the size of a breakpoint address access. The static mask value and the dynamic mask value are concurrently implemented using a specialized bit cell (60) contained in both the breakpoint register (24) and the CAM array (26). The specialized bit cell (60) is comprised of two transistors (62 and 64) to concurrently mask a respective bit of operand information during a comparison operation.
    • 数据处理系统(10)同时实现操作数信息的静态和动态屏蔽操作。 静态掩码实现由用户指定的预定数量的比特的条件掩码,并且在存储在断点寄存器(24)中的断点地址与通过逻辑地址总线(11)传送的逻辑地址之间的比较操作之前确定, 。 动态掩码值实现一个可变掩码,允许数据处理系统根据断点地址访问的大小屏蔽断点地址。 使用包含在断点寄存器(24)和CAM阵列(26)中的专用位单元(60)同时实现静态掩码值和动态掩码值。 专用位单元(60)由两个晶体管(62和64)组成,以在比较操作期间同时屏蔽操作数​​信息的相应位。
    • 6. 发明授权
    • Data processor with shared control and drive circuitry for both
breakpoint and content addressable storage devices
    • 具有共享控制和驱动电路的数据处理器,用于断点和内容可寻址存储设备
    • US5239642A
    • 1993-08-24
    • US679477
    • 1991-04-02
    • Joseph A. GutierrezWilliam C. MoyerYui K. Ho
    • Joseph A. GutierrezWilliam C. MoyerYui K. Ho
    • G06F11/34G06F11/36G06F12/10G11C11/00
    • G06F11/362G06F11/3471G06F12/1027G11C11/005G06F2212/2515
    • A data processing system (10) implements a combined static and a dynamic masking operation of a breakpoint address. A static mask implements a conditional mask of a predetermined number of bits specified by the user and is determined prior to a comparison operation between the breakpoint address stored in a breakpoint register (24) and a logical address transferred via a logical address bus (11). A dynamic mask value implements a variable mask which allows the data processing system to mask the breakpoint address according to the size of a breakpoint address access. The static mask value and the dynamic mask value are combined using the same circuitry to form a combined mask value (19). Breakpoint function and address translation are implemented in the system (10) by using the same drive and control circuitry (20,44,48) to accomplish both functions. The breakpoint register (24) is implemented as an entry in a CAM array (26).
    • 数据处理系统(10)实现断点地址的组合静态和动态屏蔽操作。 静态掩码实现由用户指定的预定数量的比特的条件掩码,并且在存储在断点寄存器(24)中的断点地址与通过逻辑地址总线(11)传送的逻辑地址之间的比较操作之前确定, 。 动态掩码值实现一个可变掩码,允许数据处理系统根据断点地址访问的大小屏蔽断点地址。 使用相同的电路组合静态屏蔽值和动态屏蔽值以形成组合屏蔽值(19)。 断点功能和地址转换在系统(10)中通过使用相同的驱动和控制电路(20,44,48)实现这两个功能。 断点寄存器(24)被实现为CAM阵列(26)中的条目。