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1. 发明申请

US20130307097A1 Magnetoresistive random access memory cell design 审中-公开
标题翻译：磁阻随机存取存储单元设计
公开(公告)号：US20130307097A1
公开(公告)日：2013-11-21
申请号：US13472085
申请日：2012-05-15
申请人： Ge Yi , Shaoping Li , Yunjun Tang , Zongrong Liu , Dujiang Wan
发明人： Ge Yi , Shaoping Li , Yunjun Tang , Zongrong Liu , Dujiang Wan
IPC分类号： H01L29/82
CPC分类号： H01L43/08
摘要： A magnetic memory cell comprises in-plane anisotropy tunneling magnetic junction (TMJ) and two fixed in-plane storage-stabilized layers, which splits on the both side of the data storage layer of the TMJ. The magnetizations of the said fixed in-plane storage-stabilized layers are all normal to that of the reference layer of TMJ but point to opposite direction. The existing of the storage-stabilized layers not only enhances the stability of the data storage, but also can reduce the critical current needed to flip the data storage layer via some specially added features.
摘要翻译：磁存储单元包括面内各向异性隧道磁结（TMJ）和两个固定的面内存储稳定层，其分散在TMJ的数据存储层的两侧。所述固定的面内储存稳定层的磁化与TMJ的参考层的磁化正好相反，但指向相反的方向。现有的存储稳定层不仅增强了数据存储的稳定性，而且还可以通过一些特别添加的功能来减少翻转数据存储层所需的临界电流。

2. 发明申请

US20130270661A1 Magnetoresistive random access memory cell design 审中-公开
标题翻译：磁阻随机存取存储单元设计
公开(公告)号：US20130270661A1
公开(公告)日：2013-10-17
申请号：US13448133
申请日：2012-04-16
申请人： Ge Yi , Shaoping Li , Yunjun Tang , Zongrong Liu
发明人： Ge Yi , Shaoping Li , Yunjun Tang , Zongrong Liu
IPC分类号： H01L29/82
CPC分类号： H01L43/08 , G11C11/161
摘要： A new magnetic memory cell comprises a perpendicular-anisotropy tunneling magnetic junction (TMJ) and a fixed in-plane spin-polarizing layer, which is separated from the perpendicular-anisotropy data storage layer of tunneling magnetic junction by a non-magnetic layer. The non-magnetic layer can be made of metallic or dielectric materials.
摘要翻译：新的磁存储单元包括垂直各向异性隧道磁结（TMJ）和固定的面内自旋偏振层，其通过非磁性层与隧道磁结的垂直各向异性数据存储层分离。非磁性层可以由金属或介电材料制成。

3. 发明申请

US20130252375A1 Magnet Assisted Alignment Method for Wafer Bonding and Wafer Level Chip Scale Packaging 审中-公开
标题翻译：用于晶圆接合和晶圆级芯片级封装的磁辅助对准方法
公开(公告)号：US20130252375A1
公开(公告)日：2013-09-26
申请号：US13429440
申请日：2012-03-26
申请人： Ge Yi , Zongrong Liu , Yunjun Tang , Shaoping Li
发明人： Ge Yi , Zongrong Liu , Yunjun Tang , Shaoping Li
IPC分类号： H01L23/00
CPC分类号： H01L24/83 , H01L24/03 , H01L24/05 , H01L24/08 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/80 , H01L24/81 , H01L24/94 , H01L24/97 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/03612 , H01L2224/03614 , H01L2224/0362 , H01L2224/03826 , H01L2224/03827 , H01L2224/0401 , H01L2224/05009 , H01L2224/05073 , H01L2224/05082 , H01L2224/05083 , H01L2224/05084 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05157 , H01L2224/05547 , H01L2224/05576 , H01L2224/05578 , H01L2224/056 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05657 , H01L2224/08146 , H01L2224/1145 , H01L2224/11452 , H01L2224/11462 , H01L2224/1162 , H01L2224/13022 , H01L2224/13025 , H01L2224/131 , H01L2224/16146 , H01L2224/80121 , H01L2224/80143 , H01L2224/80169 , H01L2224/80801 , H01L2224/81121 , H01L2224/81143 , H01L2224/81169 , H01L2224/81801 , H01L2224/94 , H01L2224/97 , H01L2924/01322 , H01L2924/1461 , H01L2924/00015 , H01L2924/00014 , H01L2924/014 , H01L2924/01026 , H01L2924/01028 , H01L2924/01078 , H01L2924/01024 , H01L2224/80 , H01L2224/81 , H01L2224/03 , H01L2224/11 , H01L2924/00
摘要： A high-precision alignment method with high throughput is proposed, which can be used for wafer-to-wafer, chip-to-wafer or chip-to-chip bonding. The scheme implements pairing patterned magnets predetermined designed and made using wafer level process on two components (wafer or chip). The magnetization in patterned magnet can be set at predetermined configuration before bonding starts. When, the two components are bought to close proximity after a coarse alignment, the magnetic force will bring the magnet pairs together and aligned the patterned magnet on one component with its mirrored or complimentary patterned magnets on the other component to minimize the overall the magnetic energy of the pairing magnet. A few patterned magnet structures and materials, with their unique merits are proposed as examples for magnet pair for the self-alignment purpose. This method enables solid contact at the bonding interface via patterned magnets under the magnetic force, which avoid the wafer drafting due to the formation of the liquid phases.
摘要翻译：提出了一种高精度的高通量对准方法，可用于晶圆到晶圆，晶片到晶圆或芯片间的接合。该方案实现了使用晶片级处理在两个部件（晶片或芯片）上预先设计和制造的配对图案化磁体。在接合开始之前，图案化磁体中的磁化可以被设定为预定的配置。当两个部件在粗对准之后被购买成靠近时，磁力将使磁体对在一起，并将其上的图案化磁体与其另一部件上的镜像或互补的图案化磁体对准，以最小化整个磁能的配对磁铁。提出了一些具有独特优点的图案化磁体结构和材料作为用于自对准目的的磁体对的示例。该方法能够在磁力下通过图案化的磁体在接合界面处实现牢固的接触，从而避免由于液相的形成引起的晶片牵伸。

4. 发明申请

US20130114334A1 Magnetoresistive random access memory cell with independently operating read and write components 审中-公开
标题翻译：具有独立操作的读写组件的磁阻随机存取存储单元
公开(公告)号：US20130114334A1
公开(公告)日：2013-05-09
申请号：US13288860
申请日：2011-11-03
申请人： Ge Yi , Shaoping Li , Dong Li , Yunjun Tang , Zongrong Liu
发明人： Ge Yi , Shaoping Li , Dong Li , Yunjun Tang , Zongrong Liu
IPC分类号： G11C11/15
CPC分类号： H01L43/08 , G11C11/16 , G11C11/161 , G11C11/1675
摘要： A new class of the memory cell is proposed. There are two separated pulse data writing and sensing current paths. The in-plane pulse current is used to flip the magnetization direction of the perpendicular-anisotropy data storage layer sandwiched between a heavy metal writing current-carrying layer and a dielectric layer. The magnetization state within data storage layer is detected by the patterned perpendicular-anisotropy tunneling magnetoresistive (TMR) stack via the output potential of the stack. Two detailed memory cells are proposed: in one proposed cell, the data storage layer is independent from but kept close to the sensing TMR stack, whose magnetization orientation affects magnetization configuration within the free layer of the TMR stack, therefor ultimately affects the output potential of the stack; in the other proposed cell, the perpendicular-anisotropy data storage layer is the free layer of the sensing TMR stack, whose magnetization state will directly affect the output potential of the stack when sensing current passes through.
摘要翻译：提出了一类新的存储单元。有两个分离的脉冲数据写入和感测电流路径。面内脉冲电流用于翻转夹在重金属写入载流层和电介质层之间的垂直各向异性数据存储层的磁化方向。数据存储层内的磁化状态通过图案化的垂直各向异性隧道磁阻（TMR）堆叠通过堆叠的输出电位来检测。提出了两个详细的存储单元：在一个提出的单元中，数据存储层独立于但保持靠近感测TMR堆栈，其磁化方向影响TMR堆栈自由层内的磁化配置，从而最终影响堆栈在另一个提出的单元中，垂直各向异性数据存储层是感测TMR堆栈的自由层，当感测电流通过时，其磁化状态将直接影响堆叠的输出电位。

5. 发明授权

US09293694B2 Magnetoresistive random access memory cell with independently operating read and write components 有权
公开(公告)号：US09293694B2
公开(公告)日：2016-03-22
申请号：US13288860
申请日：2011-11-03
申请人： Ge Yi , Shaoping Li , Dong Li , Yunjun Tang , Zongrong Liu
发明人： Ge Yi , Shaoping Li , Dong Li , Yunjun Tang , Zongrong Liu
IPC分类号： G11C11/00 , H01L43/08 , G11C11/16
CPC分类号： H01L43/08 , G11C11/16 , G11C11/161 , G11C11/1675
摘要： A new class of the memory cell is proposed. There are two separated pulse data writing and sensing current paths. The in-plane pulse current is used to flip the magnetization direction of the perpendicular-anisotropy data storage layer sandwiched between a heavy metal writing current-carrying layer and a dielectric layer. The magnetization state within data storage layer is detected by the patterned perpendicular-anisotropy tunneling magnetoresistive (TMR) stack via the output potential of the stack. Two detailed memory cells are proposed: in one proposed cell, the data storage layer is independent from but kept close to the sensing TMR stack, whose magnetization orientation affects magnetization configuration within the free layer of the TMR stack, therefor ultimately affects the output potential of the stack; in the other proposed cell, the perpendicular-anisotropy data storage layer is the free layer of the sensing TMR stack, whose magnetization state will directly affect the output potential of the stack when sensing current passes through.

6. 发明授权

US09012265B2 Magnet assisted alignment method for wafer bonding and wafer level chip scale packaging 有权
标题翻译：用于晶片接合和晶圆级芯片级封装的磁铁辅助对准方法
公开(公告)号：US09012265B2
公开(公告)日：2015-04-21
申请号：US13429440
申请日：2012-03-26
申请人： Ge Yi , Zongrong Liu , Yunjun Tang , Shaoping Li
发明人： Ge Yi , Zongrong Liu , Yunjun Tang , Shaoping Li
IPC分类号： H01L21/68 , H01L23/00
CPC分类号： H01L24/83 , H01L24/03 , H01L24/05 , H01L24/08 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/80 , H01L24/81 , H01L24/94 , H01L24/97 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/03612 , H01L2224/03614 , H01L2224/0362 , H01L2224/03826 , H01L2224/03827 , H01L2224/0401 , H01L2224/05009 , H01L2224/05073 , H01L2224/05082 , H01L2224/05083 , H01L2224/05084 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05157 , H01L2224/05547 , H01L2224/05576 , H01L2224/05578 , H01L2224/056 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05657 , H01L2224/08146 , H01L2224/1145 , H01L2224/11452 , H01L2224/11462 , H01L2224/1162 , H01L2224/13022 , H01L2224/13025 , H01L2224/131 , H01L2224/16146 , H01L2224/80121 , H01L2224/80143 , H01L2224/80169 , H01L2224/80801 , H01L2224/81121 , H01L2224/81143 , H01L2224/81169 , H01L2224/81801 , H01L2224/94 , H01L2224/97 , H01L2924/01322 , H01L2924/1461 , H01L2924/00015 , H01L2924/00014 , H01L2924/014 , H01L2924/01026 , H01L2924/01028 , H01L2924/01078 , H01L2924/01024 , H01L2224/80 , H01L2224/81 , H01L2224/03 , H01L2224/11 , H01L2924/00
摘要： A high-precision alignment method with high throughput is proposed, which can be used for wafer-to-wafer, chip-to-wafer or chip-to-chip bonding. The scheme implements pairing patterned magnets predetermined designed and made using wafer level process on two components (wafer or chip). The magnetization in patterned magnet can be set at predetermined configuration before bonding starts. When, the two components are bought to close proximity after a coarse alignment, the magnetic force will bring the magnet pairs together and aligned the patterned magnet on one component with its mirrored or complimentary patterned magnets on the other component to minimize the overall the magnetic energy of the pairing magnet. A few patterned magnet structures and materials, with their unique merits are proposed as examples for magnet pair for the self-alignment purpose. This method enables solid contact at the bonding interface via patterned magnets under the magnetic force, which avoid the wafer drafting due to the formation of the liquid phases.
摘要翻译：提出了一种高精度的高通量对准方法，可用于晶圆到晶圆，晶片到晶圆或芯片间的接合。该方案实现了使用晶片级处理在两个部件（晶片或芯片）上预先设计和制造的配对图案化磁体。在接合开始之前，图案化磁体中的磁化可以被设定为预定的配置。当两个部件在粗对准之后被购买成靠近时，磁力将使磁体对在一起，并将其上的图案化磁体与其另一部件上的镜像或互补的图案化磁体对准，以最小化整个磁能的配对磁铁。提出了一些具有独特优点的图案化磁体结构和材料作为用于自对准目的的磁体对的示例。该方法能够在磁力下通过图案化的磁体在接合界面处实现牢固的接触，从而避免由于液相的形成引起的晶片牵伸。

7. 发明申请

US20210057242A1 Chip Front Surface Touchless Pick and Place Tool or Flip Chip Bonder 有权
公开(公告)号：US20210057242A1
公开(公告)日：2021-02-25
申请号：US16550109
申请日：2019-08-23
申请人： Yunjun Tang , Zongrong Liu , Ge Yi
发明人： Yunjun Tang , Zongrong Liu , Ge Yi
IPC分类号： H01L21/67 , H01L23/00 , H01L21/683
摘要： A piece of pick and place tool or a chip bonding equipment, which has innovative designs enabling chip(s) on a tape to get picked up without touching its front surface, is invented. The designs use levitation technologies to receive and hold the chips detached from the tape from a face-down position. A streamline design is also invented to provide better productivity. The invented pick and place tool or chip bonder is particularly useful for applications which require using chips with zero tolerance of particle and/or contamination on the chip front surfaces.

8. 发明授权

US11282722B2 Chip front surface touchless pick and place tool or flip chip bonder 有权
公开(公告)号：US11282722B2
公开(公告)日：2022-03-22
申请号：US16550109
申请日：2019-08-23
申请人： Yunjun Tang , Zongrong Liu , Ge Yi
发明人： Yunjun Tang , Zongrong Liu , Ge Yi
IPC分类号： H01L21/67 , H01L23/00 , H01L21/683
摘要： A piece of pick and place tool or a chip bonding equipment, which has innovative designs enabling chip(s) on a tape to get picked up without touching its front surface, is invented. The designs use levitation technologies to receive and hold the chips detached from the tape from a face-down position. A streamline design is also invented to provide better productivity. The invented pick and place tool or chip bonder is particularly useful for applications which require using chips with zero tolerance of particle and/or contamination on the chip front surfaces.

9. 发明申请

US20200382092A1 METHODS OF MAKING ACOUSTIC WAVE DEVICES 审中-公开
公开(公告)号：US20200382092A1
公开(公告)日：2020-12-03
申请号：US16428860
申请日：2019-05-31
申请人： Dong Li , Ying Ma , Ge Yi , Zongrong Liu
发明人： Dong Li , Ying Ma , Ge Yi , Zongrong Liu
IPC分类号： H03H9/02 , H03H9/17
摘要： An acoustic wave device system with its piezoelectric layer originating from a single crystal piezoelectric wafer/substrate is invented along with sets of detailed process steps to fabricate such a device using wafer-to-wafer and/or die-to-wafer bonding technologies. The proposed device system is particularly good to make bulk acoustic wave (BAW) devices. Methods allowing the single crystal piezoelectric wafer/substrate to be re-used are also given. The proposed methods include detailed process steps to allow heterogeneous integration of electrical chips into the system in a very cost efficient manner. The invention provides a practical and low-cost approach to fabricate the radio frequency (RF) front end chip incorporating RF filters and electronic components integrated into a small footprint which is particularly useful for mobile device and RF stations.

10. 发明申请

US20210005572A1 CHIP FRONT SURFACE TOUCHLESS FLIP CHIP BONDERS 有权
公开(公告)号：US20210005572A1
公开(公告)日：2021-01-07
申请号：US16504271
申请日：2019-07-07
申请人： Dong Li , Ying Ma , Ge Yi , Zongrong Liu
发明人： Dong Li , Ying Ma , Ge Yi , Zongrong Liu
IPC分类号： H01L23/00 , H01L21/56 , H01L21/683
摘要： A piece of chip-to-wafer and chip-to-chip bonding equipment, which has innovative designs enabling chip(s) from either a diamagnetic carrier or a diced wafer to expose the chip back side surface for pickup, is invented. The designs either use a levitation technology, or air dynamic, or a novel mechanical design to fulfill the chip front surfaces touchless requirement to avoid the chip surface contamination. The invented chip bonder is particularly useful for bonding applications which require using chips with zero tolerance of particle and/or contamination on the chip front surfaces or bonding surfaces.

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