专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20060026299A1 Communication among partitioned devices 有权
标题翻译：分区设备之间的通信
公开(公告)号：US20060026299A1
公开(公告)日：2006-02-02
申请号：US10902341
申请日：2004-07-29
申请人： Gary Gostin , Larry McMahan , Michael Schroeder , Craig Warner , Richard Adkisson , Huai-Ter Chong , David Binford , Mark Shaw , Joe Cowan , Thierry Fevrier , Arad Rostampour
发明人： Gary Gostin , Larry McMahan , Michael Schroeder , Craig Warner , Richard Adkisson , Huai-Ter Chong , David Binford , Mark Shaw , Joe Cowan , Thierry Fevrier , Arad Rostampour
IPC分类号： G06F15/16
CPC分类号： G06F9/5077 , G06F9/544 , G06F15/167
摘要： A computing device having partitions, and a method of communicating between partitions, are disclosed wherein at least one partition comprises: at least one register substantially always accessible to other partitions and capable of defining an address area; at least one address area that may be accessible to other partitions and is capable of being defined by the at least one register; and address areas other than the at least one accessible address area that are not accessible to other partitions. A method of processing interrupts comprising receiving an interrupt, assessing the origin of the interrupt, accepting, rejecting, or further assessing the interrupt, depending on its origin, when further assessing the interrupt, accepting or rejecting the interrupt depending on its contents, and forwarding accepted interrupts but not rejected interrupts to a target processor, and a device carrying out that method are also disclosed.
摘要翻译：公开了一种具有分区的计算设备和分区之间的通信方法，其中至少一个分区包括：至少一个寄存器，其基本上总是可被其他分区访问并且能够定义地址区域; 至少一个地址区域，其可以由其他分区访问并且能够由所述至少一个寄存器定义; 以及除了其他分区不可访问的至少一个可访问地址区域以外的地址区域。一种处理中断的方法，包括接收中断，根据其来源评估中断的起始点，接受，拒绝或进一步评估中断，当进一步评估中断时，根据其中的内容接受或拒绝中断，以及转发接受的中断但不拒绝对目标处理器的中断，并且还公开了执行该方法的设备。

2. 发明申请

US20050152390A1 Distribution of communications between paths 失效
标题翻译：路径之间的通信分配
公开(公告)号：US20050152390A1
公开(公告)日：2005-07-14
申请号：US10756668
申请日：2004-01-12
申请人： Michael Schroeder , Craig Warner , Gary Gostin , Mark Shaw
发明人： Michael Schroeder , Craig Warner , Gary Gostin , Mark Shaw
IPC分类号： H04L12/28 , H04L12/56
CPC分类号： H04L45/00 , H04L45/24
摘要： Distributing communications between paths, comprises providing a plurality of destinations, providing a plurality of communications paths such that each of the plurality of destinations can be accessed over each of the plurality of communications paths, defining destination addresses interleaved over the plurality of destinations, sending communications from a source to a plurality of the interleaved addresses, and selecting different ones of the plurality of paths for successive communications that are sent to addresses on different destinations, wherein the path for a communication is selected using at least a part of the address of the communication.
摘要翻译：分布路径之间的通信包括提供多个目的地，提供多个通信路径，使得可以通过多个通信路径中的每一个访问多个目的地中的每一个，定义在多个目的地上交织的目的地地址，发送通信从源到多个交错地址，以及选择多个路径中的不同路径用于连续通信，所述连续通信被发送到不同目的地上的地址，其中，使用至少一部分地址选择通信的路径通讯。

3. 发明申请

US20060168503A1 Systems and methods for mitigating latency associated with error detection and correction 有权
公开(公告)号：US20060168503A1
公开(公告)日：2006-07-27
申请号：US11040380
申请日：2005-01-21
申请人： Michael Schroeder , Christopher Brueggen , Gary Gostin
发明人： Michael Schroeder , Christopher Brueggen , Gary Gostin
IPC分类号： G06F11/00
CPC分类号： G06F11/1064
摘要： Systems and methods for mitigating latency associated with error detection and correction of a data structure are disclosed. One embodiment of a system may comprise a packet generator that builds a response packet associated with a request for a data structure based on a tag portion of the data structure. The system may also comprise an error detection and correction (EDC) component that detects and corrects errors in the data structure concurrently with the building of the response packet by the packet generator.

4. 发明申请

US20050154840A1 Cache line ownership transfer in multi-processor computer systems 失效
标题翻译：多处理器计算机系统中的高速缓存行所有权转移
公开(公告)号：US20050154840A1
公开(公告)日：2005-07-14
申请号：US10756436
申请日：2004-01-12
申请人： Christopher Greer , Michael Schroeder , Gary Gostin
发明人： Christopher Greer , Michael Schroeder , Gary Gostin
IPC分类号： G06F13/16 , G06F12/00 , G06F12/08 , G06F13/00
CPC分类号： G06F12/0822 , Y10S707/99952
摘要： Transferring cache line ownership between processors in a shared memory multi-processor computer system. A request for ownership of a cache line is sent from a requesting processor to a memory unit. The memory unit receives the request and determines which one of a plurality of processors other than the requesting processor has ownership of the requested cache line. The memory sends an ownership recall to that processor. In response to the ownership recall, the other processor sends the requested cache line to the requesting processor, which may send a response to the memory unit to confirm receipt of the requested cache line. The other processor may optionally send a response to the memory unit to confirm that the other processor has sent the requested cache line to the requesting processor. A copy of the data for the requested cache line may, under some circumstances, also be sent to the memory unit by the other processor as part of the response.
摘要翻译：在共享内存多处理器计算机系统中的处理器之间传输高速缓存行所有权。高速缓存行的所有权请求从请求处理器发送到存储器单元。存储器单元接收该请求并确定除请求处理器之外的多个处理器中的哪一个处理器具有所请求的高速缓存行的所有权。内存向所述处理器发送所有权回收。响应于所有权调用，另一个处理器将请求的高速缓存行发送到请求处理器，该请求处理器可以向存储器单元发送响应以确认所请求的高速缓存行的接收。另一个处理器可以可选地向存储器单元发送响应以确认另一个处理器已将请求的高速缓存行发送到请求处理器。在某些情况下，所请求的高速缓存行的数据的副本也可以由其他处理器作为响应的一部分发送到存储器单元。

5. 发明申请

US20080072110A1 Circuitry and method to detect conditions of data 有权
标题翻译：检测数据条件的电路和方法
公开(公告)号：US20080072110A1
公开(公告)日：2008-03-20
申请号：US11523472
申请日：2006-09-19
申请人： Richard Adkisson , Michael Schroeder
发明人： Richard Adkisson , Michael Schroeder
IPC分类号： G01R31/28
CPC分类号： G06F11/25
摘要： A system may comprise a condition detection system that includes change circuitry configured to detect a change for at least one predetermined bit of an N-bit bus, where N is a positive integer, and to provide a corresponding change signal indicative of the detected condition. Match circuitry is configured to detect a match condition for up to a selected subset of predetermined bits of the N-bit bus and to provide a corresponding match signal indicative of the detected condition. Selection circuitry is programmable to provide a selected one of the change signal and the match signal as a corresponding output signal.
摘要翻译：系统可以包括条件检测系统，其包括改变电路，其被配置为检测N位总线的至少一个预定位的改变，其中N是正整数，并且提供指示检测到的条件的对应改变信号。匹配电路被配置为检测高达N位总线的预定位的选定子集的匹配条件，并提供指示检测到的条件的对应匹配信号。选择电路是可编程的，以将选择的一个改变信号和匹配信号提供为相应的输出信号。

6. 发明授权

US07774652B2 Circuitry and method to detect conditions of data 有权
标题翻译：检测数据条件的电路和方法
公开(公告)号：US07774652B2
公开(公告)日：2010-08-10
申请号：US11523472
申请日：2006-09-19
申请人： Richard Adkisson , Michael Schroeder
发明人： Richard Adkisson , Michael Schroeder
IPC分类号： G01R31/3177
CPC分类号： G06F11/25
摘要： A system may comprise a condition detection system that includes change circuitry configured to detect a change for at least one predetermined bit of an N-bit bus, where N is a positive integer, and to provide a corresponding change signal indicative of the detected condition. Match circuitry is configured to detect a match condition for up to a selected subset of predetermined bits of the N-bit bus and to provide a corresponding match signal indicative of the detected condition. Selection circuitry is programmable to provide a selected one of the change signal and the match signal as a corresponding output signal.
摘要翻译：系统可以包括条件检测系统，其包括改变电路，其被配置为检测N位总线的至少一个预定位的改变，其中N是正整数，并且提供指示检测到的条件的对应改变信号。匹配电路被配置为检测高达N位总线的预定位的选定子集的匹配条件，并提供指示检测到的条件的对应匹配信号。选择电路是可编程的，以将选择的一个改变信号和匹配信号提供为相应的输出信号。

7. 发明授权

US08661208B2 Non-inclusive cache systems and methods 有权
标题翻译：非包容性缓存系统和方法
公开(公告)号：US08661208B2
公开(公告)日：2014-02-25
申请号：US11733857
申请日：2007-04-11
申请人： Craig Warner , Dan Robinson , John Wastlick , Michael Schroeder , Jeffrey Moy
发明人： Craig Warner , Dan Robinson , John Wastlick , Michael Schroeder , Jeffrey Moy
IPC分类号： G06F13/00 , G06F13/28
CPC分类号： G06F12/084 , G06F12/0831
摘要： Non-inclusive cache systems and methods are provided. In one embodiment a non-inclusive cache system is provided comprising a non-inclusive cache and a cache agent that receives a request for access to the non-inclusive cache and denies the request for access to the non-inclusive cache if the non-inclusive cache system exceeds a predetermined level of activity.
摘要翻译：提供非包容性缓存系统和方法。在一个实施例中，提供了非包容性缓存系统，其包括非包容性高速缓存和高速缓存代理，其接收对非包容性高速缓存的访问请求，并且如果非包容性高速缓存不允许，则拒绝对非包容性高速缓存的访问请求缓存系统超过预定的活动级别。

8. 发明申请

US20080256306A1 NON-INCLUSIVE CACHE SYSTEMS AND METHODS 有权
标题翻译：非包容性缓存系统和方法
公开(公告)号：US20080256306A1
公开(公告)日：2008-10-16
申请号：US11733857
申请日：2007-04-11
申请人： Craig Warner , Dan Robinson , John Wastlick , Michael Schroeder
发明人： Craig Warner , Dan Robinson , John Wastlick , Michael Schroeder
IPC分类号： G06F12/16
CPC分类号： G06F12/084 , G06F12/0831
摘要： Non-inclusive cache systems and methods are provided. In one embodiment a non-inclusive cache system is provided comprising a non-inclusive cache and a cache agent that receives a request for access to the non-inclusive cache and denies the request for access to the non-inclusive cache if the non-inclusive cache system exceeds a predetermined level of activity.
摘要翻译：提供非包容性缓存系统和方法。在一个实施例中，提供了非包容性缓存系统，其包括非包容性高速缓存和高速缓存代理，其接收对非包容性高速缓存的访问请求，并且如果非包容性高速缓存不允许，则拒绝对非包容性高速缓存的访问请求缓存系统超过预定的活动级别。

9. 发明授权

US08459721B2 Top for a convertible vehicle 有权
标题翻译：顶级为敞篷车
公开(公告)号：US08459721B2
公开(公告)日：2013-06-11
申请号：US12744716
申请日：2008-11-05
申请人： Juergen Theuerkauf , Norbert Habacker , Michael Schroeder , Andreas Baumeier
发明人： Juergen Theuerkauf , Norbert Habacker , Michael Schroeder , Andreas Baumeier
IPC分类号： B60J7/08
CPC分类号： B60J7/1855
摘要： A top for a convertible motor vehicle includes a top linkage operable to move the top between a closed position and an open position. The top linkage includes at least one functional component having a first position and a second position. The functional component is generally in the first position at a start of the opening movement and at the start of the closing movement, and also at an end of an opening movement and at the end of the closing movement. The functional component is moved from the first position to the second position for at least a portion of the opening movement and of the closing movement when the top linkage is between the open and closed positions. The movement of the functional component from the first position to the second position provides clearance for at least one element that moves during movement of the top linkage.
摘要翻译：用于可转换机动车辆的顶部包括顶部联动装置，其可操作以在关闭位置和打开位置之间移动顶部。顶部连杆机构包括具有第一位置和第二位置的至少一个功能部件。功能部件通常在打开运动的开始和关闭运动的开始处以及在打开运动的结束和关闭运动结束时处于第一位置。当顶部连杆处于打开位置和关闭位置之间时，功能部件从第一位置移动到第二位置，用于打开运动和关闭运动的至少一部分。功能部件从第一位置到第二位置的移动为在顶部连杆机构移动期间移动的至少一个元件提供间隙。

10. 发明授权

US08440592B2 Use of abscisic acid combinations for thinning 有权
标题翻译：使用脱落酸组合进行稀释
公开(公告)号：US08440592B2
公开(公告)日：2013-05-14
申请号：US13465629
申请日：2012-05-07
申请人： Derek D. Woolard , Peter D. Petracek , Michael Schroeder , Johnny A. Lopez , Schalk Reynolds , Gregory Clarke , Prem Warrior , Rick Hopkins
发明人： Derek D. Woolard , Peter D. Petracek , Michael Schroeder , Johnny A. Lopez , Schalk Reynolds , Gregory Clarke , Prem Warrior , Rick Hopkins
IPC分类号： A01N25/00
CPC分类号： A01N37/42 , A01N27/00 , A01N43/12 , A01N43/90 , A01N45/00 , A01N2300/00
摘要： The present invention is directed to the treatment of a plant at the flowering or fruiting stage with an effective amount of abscisic acid, its analogs or derivatives and salts thereof to reduce the number of fruits that the plant sets and grows to maturity.
摘要翻译：本发明涉及在开花期或结果阶段用有效量的脱落酸，其类似物或衍生物和盐处理植物，以减少植物生长和生长成熟的果实数量。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式