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1. 发明授权

US3936403A Synthetic resin composition 失效
标题翻译：合成树脂组合物
公开(公告)号：US3936403A
公开(公告)日：1976-02-03
申请号：US466048
申请日：1974-05-01
申请人： Fumio Sakaguchi , Kenji Takemura , Tadao Suzuki , Isamu Yamazaki , Yoshifumi Nishibayashi , Kazunobu Shiozawa , Toshimitsu Sasaki
发明人： Fumio Sakaguchi , Kenji Takemura , Tadao Suzuki , Isamu Yamazaki , Yoshifumi Nishibayashi , Kazunobu Shiozawa , Toshimitsu Sasaki
IPC分类号： C08L23/00 , C08K3/22 , C08L1/00 , C08L7/00 , C08L21/00 , C08L23/02 , C08L27/00 , C08L27/06 , C08L33/00 , C08L33/02 , C08L51/00 , C08L51/02 , C08L77/00 , C08L101/00 , C08L91/00
CPC分类号： C08K3/22 , C08L23/02 , C08L23/06 , C08L27/06
摘要： A synthetic resin composition which comprises 20 to 50 parts by weight of olefinic resins, 10 to 40 parts by weight of vinyl chloride resins, and 70 to 10 parts by weight of alumina trihydrate having a gibbsite crystal structure whose average particle size is 30 microns at most.
摘要翻译：一种合成树脂组合物，其包含20至50重量份的烯烃树脂，10至40重量份的氯乙烯树脂和70至10重量份的具有平均粒度为30微米的三水铝矿晶体结构的三水合氧化铝最。

2. 发明授权

US3956212A Ethylene resin composition 失效
标题翻译：乙烯树脂组合物
公开(公告)号：US3956212A
公开(公告)日：1976-05-11
申请号：US343334
申请日：1973-03-21
申请人： Fumio Sakaguchi , Tadao Suzuji , Isamu Yamazaki
发明人： Fumio Sakaguchi , Tadao Suzuji , Isamu Yamazaki
IPC分类号： C08L23/00 , C08K3/22 , C08L7/00 , C08L21/00 , C08L101/00 , C08K5/09
CPC分类号： C08K3/22 , Y10T428/31692
摘要： An ethylene resin composition comprising an ethylene polymer, or a copolymer of ethylene with one or more components copolymerizable with ethylene, and alumina trihydrate having a gibbsite crystal structure, and various moldings produced from the ethylene resin composition having excellent physical and chemical properties are disclosed.
摘要翻译：公开了包含乙烯聚合物或乙烯与一种或多种可与乙烯共聚的组分的共聚物的乙烯树脂组合物和具有三水铝矿晶体结构的三水合氧化铝，以及由具有优异的物理和化学性质的乙烯树脂组合物制备的各种模制品。

3. 发明授权

US5596682A Method and apparatus of automated theorem proving for information processing 失效
标题翻译：自动化定理证明信息处理的方法和装置
公开(公告)号：US5596682A
公开(公告)日：1997-01-21
申请号：US183798
申请日：1994-01-21
申请人： Isamu Yamazaki
发明人： Isamu Yamazaki
IPC分类号： G06N5/00 , G06F15/18
CPC分类号： G06N5/006
摘要： A method of automated theorem proving for information processing which can be highly efficient, irrespective of the set of clauses to be dealt with. The method includes the steps of: transforming the statement and the set of knowledge into expressions in terms of elements of a module; constructing a linear equation with the elements of the module as coefficients and the elements of a ring of scalars of the module as unknowns; checking the existence of a non-negative solution to the linear equation; and determining that the statement is provable when the non-negative solution exist, and not provable otherwise.
摘要翻译：一种自动化定理证明信息处理的方法，可以高效率地进行，而不管要处理的一组条款。该方法包括以下步骤：根据模块的元素将语句和知识集合变换为表达式; 用模块的元素构建线性方程作为系数，将模块的标量环的元素作为未知数; 检查线性方程的非负解的存在; 并且确定当非负解决方案存在时可以证明该陈述，否则不可证明。

4. 发明授权

US4091394A Pattern position detecting system 失效
标题翻译：图案位置检测系统
公开(公告)号：US4091394A
公开(公告)日：1978-05-23
申请号：US762717
申请日：1977-01-26
申请人： Seiji Kashioka , Masakazu Ejiri , Michihiro Mese , Takafumi Miyatake , Toshimitsu Hamada , Isamu Yamazaki
发明人： Seiji Kashioka , Masakazu Ejiri , Michihiro Mese , Takafumi Miyatake , Toshimitsu Hamada , Isamu Yamazaki
IPC分类号： G01B11/00 , G06K9/00 , G06K9/60 , G06T1/00 , G06T7/60 , G06K9/04
CPC分类号： G06K9/60 , G06K9/00
摘要： A pattern position detecting system comprising first means to sequentially fetch local images in a two-dimensionally arrayed form from a video signal in accordance with the scanning of an image and at sampling intervals which are variably instructed independently in the vertical and horizontal directions, second means to hold two-dimensional patterns having the same array as the local images, third means to evaluate the degree of non-coincidence between the image of the first means and the pattern of the second means, fourth means to store the position of an image scanning point at the time when the degree of non-coincidence becomes the minimum in a predetermined range within a picture frame, fifth means to calculate the position of an object from the position obtained by the fourth means, and sixth means to store the vertical and horizontal sampling intervals necessary for the operation of the first means, the two-dimensional patterns for use in the second means and numerical values necessary for the positional calculation of the fifth means, and to select required ones and send them to the first, second and fifth means.
摘要翻译：一种图案位置检测系统，包括根据图像的扫描和在垂直和水平方向上独立地可变地指示的采样间隔从视频信号以二维排列的形式顺序地取出局部图像的第一装置，第二装置保持具有与本地图像相同的阵列的二维图案，第三装置用于评估第一装置的图像与第二装置的图案之间的不一致程度，第四装置，用于存储图像扫描的位置第五装置根据由第四装置获得的位置计算物体的位置;以及第六装置，用于存储垂直和水平的第一装置，用于第一装置的操作所需的采样间隔，用于第二装置的二维图案和数值n 用于第五装置的位置计算，并选择所需要的并将其发送到第一，第二和第五装置。

5. 发明授权

US4057680A Method of polymerizing .alpha.-olefins 失效
标题翻译：聚合{60-烯烃的方法
公开(公告)号：US4057680A
公开(公告)日：1977-11-08
申请号：US713199
申请日：1976-08-10
申请人： Isamu Yamazaki , Yoichi Toyama , Kiwami Hirota , Hisashi Takeuchi
发明人： Isamu Yamazaki , Yoichi Toyama , Kiwami Hirota , Hisashi Takeuchi
IPC分类号： C08F10/00 , C08F4/66 , C08F10/06
CPC分类号： C08F10/00 , Y10S526/906
摘要： In the method of polymerizing .alpha.-olefins by contacting an .alpha.-olefin under polymerization conditions with a stereospecific catalyst comprising a titanium trichloride component and an organoaluminium compound, the improvement wherein said titanium trichloride component is ground during or after contact with a treating agent, said treating agent being selected from at least one ofA. an alkylene oxide, andB. a lactone.
摘要翻译：在聚合条件下使α-烯烃与包含三氯化钛组分和有机铝化合物的立体特异性催化剂接触来聚合α-烯烃的方法中，所述三氯化钛组分在与处理剂接触期间或之后被研磨，所述改进在所述处理剂选自A.环氧烷和B.内酯中的至少一种。

6. 发明授权

US4910508A Matrix logic circuit network suitable for large-scale integration 失效
标题翻译：矩阵逻辑电路网适合大规模集成
公开(公告)号：US4910508A
公开(公告)日：1990-03-20
申请号：US808377
申请日：1985-12-16
申请人： Isamu Yamazaki
发明人： Isamu Yamazaki
IPC分类号： G06F7/50 , G06F7/505 , H03K19/177
CPC分类号： G06F7/5057 , H03K19/17704 , H03K19/17736 , H03K19/1778
摘要： A matrix logic circuit network comprises a great number of interconnected logic gates. Input and output lines of the logic gates are arranged in the matrix array. By rearranging the input and output lines of the matrix in accordance with a sort algorithm, direct connection points of the input and output lines to which the same signals are allotted and connecting elements forming logic gates located at given intersections of the input and output lines are arranged within a diagonal area with a limited width, which extends along a diagonal line of the matrix.
摘要翻译：矩阵逻辑电路网络包括大量互连的逻辑门。逻辑门的输入和输出线被布置在矩阵阵列中。通过根据分类算法重新排列矩阵的输入和输出线，分配相同信号的输入和输出线的直接连接点和形成位于输入和输出线的给定交点处的逻辑门的连接元件是布置在具有有限宽度的对角区域内，该对角线区域沿矩阵的对角线延伸。

7. 发明授权

US4823258A Index limited continuous operation vector processor 失效
标题翻译：指数有限连续运算矢量处理器
公开(公告)号：US4823258A
公开(公告)日：1989-04-18
申请号：US98313
申请日：1987-09-18
申请人： Isamu Yamazaki
发明人： Isamu Yamazaki
IPC分类号： G06F17/16 , G06F15/78 , G06F1/00
CPC分类号： G06F15/8061
摘要： The vector processor of the present invention is designed to have a first function for classifying, generating and storing in advance a separate index set by judging the attribute of specified data and a second function for continuously performing operand access only for the index value belonging to the specified index set out of the index sets generated by the first function, thus avoiding the deterioration of the efficiency of pipeline processing even when the calculation of array data has different operation content according to the attributes of the specified data. Accordingly it can perform continuous calculation of a plurality of different conditioned expressions at high speed by arranging it to operate the first and the second functions concurrently with the value resulting from the operation by the second function being used by the first function as a data for discriminating the attribute of the data.
摘要翻译：本发明的向量处理器被设计成具有第一功能，用于通过判断指定数据的属性来预先分类，生成和存储单独的索引集合，以及用于仅对属于该属性的索引值连续执行操作数访问的第二功能由第一功能生成的索引集中指定的索引，即使当根据指定数据的属性计算阵列数据具有不同的操作内容时，也避免了流水线处理的效率的劣化。因此，通过将第一功能所使用的第二功能的操作所产生的值与第一功能和第二功能同时运行，可以高速执行多个不同的条件表达式的连续计算，作为用于区别的数据数据的属性。

8. 发明授权

US4130869A Microprogram controlled system 失效
标题翻译：微程序控制系统
公开(公告)号：US4130869A
公开(公告)日：1978-12-19
申请号：US779561
申请日：1977-03-21
申请人： Tsuneo Kinoshita , Isamu Yamazaki
发明人： Tsuneo Kinoshita , Isamu Yamazaki
IPC分类号： G06F9/22 , G06F9/30 , G06F9/16
CPC分类号： G06F9/223
摘要： A microprogram controlled system to which is applied the vertical type microprogramming technique. Microinstructions fetched from a control stage are decoded in a control decoder, which controls gates of registers in a central processor to execute the microinstructions. The microinstructions include an extension field in the format to modify the functions thereof.
摘要翻译：微程序控制系统采用垂直式微程序技术。从控制级提取的微指令在控制解码器中解码，控制解码器控制中央处理器中的寄存器的门执行微指令。微指令包括以修改其功能的格式的扩展字段。

9. 发明授权

US4763827A Manufacturing method 失效
标题翻译：制造方法
公开(公告)号：US4763827A
公开(公告)日：1988-08-16
申请号：US38939
申请日：1987-04-16
申请人： Kenji Watanabe , Isamu Yamazaki , Ryuichi Kyomasu , Nobuhiro Takasugi , Tsutomu Mimata , Osamu Kakutani
发明人： Kenji Watanabe , Isamu Yamazaki , Ryuichi Kyomasu , Nobuhiro Takasugi , Tsutomu Mimata , Osamu Kakutani
IPC分类号： B23K20/00 , H01L21/00 , B23K31/00
CPC分类号： H01L24/78 , B23K20/005 , H01L21/67144 , H01L21/67248 , H01L21/67259 , H01L2224/78 , H01L2924/00014 , H01L2924/01033 , H01L2924/01039 , H01L2924/01082
摘要： The invention relates to a manufacturing apparatus which comprises moving means which continuously moves the works that are transferred along a frame chute, and detector means which detects at least a portion of the work that is moved. The moving means is controlled by kind-of-work data and by a work position signal from the detector means, and the work is set to a predetermined position. Hence, even a work of a different kind can be set to an optimum bonding position without the need of exchanging the unit, making it possible to perform the operation fully automatically and to meet general purposes.Further, provision is made of means which moves the frame chute in a direction at right angles with the direction in which the work is moved, so that even that work that has different widths and shapes in the widthwise direction can be placed in position and subjected to the bonding fully automatically.The detector means can be provided not only at the bonding position but also at a position on the upstream side having a relation relative to the bonding position.The invention can be adapted particularly effectively to a wire bonder and a pellet bonder.
摘要翻译：本发明涉及一种制造装置，其包括连续地移动沿着框架槽传送的工件的移动装置和检测至少一部分被移动的工件的检测器装置。移动装置由工作数据和来自检测装置的工作位置信号控制，工件被设定到预定位置。因此，即使不同种类的工作也可以被设定为最佳的结合位置，而不需要更换单元，使得可以完全自动地执行操作并且达到一般目的。此外，提供了使框架滑槽沿与工件移动方向成直角的方向移动的装置，使得即使在宽度方向上具有不同宽度和形状的工件也可以被放置就位完全自动粘接。检测器装置不仅可以在接合位置处设置，而且还可以设置在上游侧的位置，具有相对于接合位置的关系。本发明可以特别有效地适用于引线接合机和颗粒接合机。

10. 发明授权

US4616331A Information processing system consisting of an arithmetic control unit formed into a one-chip typed by application of a highly-integrated semiconductor device 失效
标题翻译：信息处理系统由通过应用高度集成的半导体器件形成为单片的算术控制单元构成
公开(公告)号：US4616331A
公开(公告)日：1986-10-07
申请号：US236116
申请日：1981-02-19
申请人： Tsuneo Kinoshita , Fumitaka Sato , Isamu Yamazaki
发明人： Tsuneo Kinoshita , Fumitaka Sato , Isamu Yamazaki
IPC分类号： G06F9/38 , G06F9/30 , G06F13/00
CPC分类号： G06F9/3812 , G06F9/3802 , G06F9/3804
摘要： In a one-chip high density arithmetic control unit capable of prefetching user's instructions from main memory, an arithmetic logic unit (ALU) subtracts the contents of a location counter holding the address of the next instruction to be executed, from the contents of a memory address register holding an address into which data will be written. The difference is fed through the gates connected to the ALU for determining whether or not prefetched instructions will have to be refetched. An address matching mechanism provided outside the one-chip arithmetic control unit includes a comparator for comparing memory addresses to a preset execution stop address. The output signal of the comparator is stored in a memory section which is provided to correspond to the prefetched instruction buffer, and when an instruction stored in the prefetched instruction buffer is transferred to an instruction register, the signal stored in the corresponding memory section is also read out and used to determine whether to stop execution. Further, whenever access is made to main memory a signal indicating whether the access is legal is externally generated and may be stored in a second memory section. Like the address matching signal, this signal is read out when the corresponding instruction from the prefetched instruction buffer is transferred to the instruction register. An illegal address interruption is produced when this signal indicates that the address was illegal.
摘要翻译：在能够从主存储器预取用户指令的单芯片高密度算术控制单元中，算术逻辑单元（ALU）从存储器的内容中减去保持要执行的下一个指令的地址的位置计数器的内容地址寄存器保存写入数据的地址。差异通过连接到ALU的门馈送，以确定是否必须重新获取预取指令。在单芯片运算控制单元外提供的地址匹配机构包括比较器，用于将存储器地址与预设的执行停止地址进行比较。比较器的输出信号存储在与预取指令缓冲器相对应的存储器部分中，并且当存储在预取指令缓冲器中的指令被传送到指令寄存器时，存储在相应存储器部分中的信号也是读出并用于确定是否停止执行。此外，每当访问主存储器时，指示是否合法的信号是外部生成的，并且可以存储在第二存储器部分中。类似地址匹配信号，当来自预取指令缓冲器的相应指令被传送到指令寄存器时，该信号被读出。当该信号表示该地址是非法的时，产生非法地址中断。

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