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1. 发明授权

US07934198B2 Prefix matching structure and method for fast packet switching 失效
标题翻译：用于快速分组交换的前缀匹配结构和方法
公开(公告)号：US07934198B2
公开(公告)日：2011-04-26
申请号：US10968460
申请日：2004-10-18
申请人： Frederick R. Gruner , Gaurav Singh , Elango Ganesan , Samir C. Vora , Christopher M. Eccles , Brian Hang Wai Yang
发明人： Frederick R. Gruner , Gaurav Singh , Elango Ganesan , Samir C. Vora , Christopher M. Eccles , Brian Hang Wai Yang
IPC分类号： G06F9/44 , H04L12/28
CPC分类号： H04L29/12801 , H04L29/12009 , H04L45/00 , H04L45/7457 , H04L61/6004
摘要： A prefix matching apparatus for directing information to a destination port includes a memory configured to store a piece of data including an address and a plurality of levels each including a plurality of memory locations, the levels each representing a unique address space. A controller is coupled to the memory and to the plurality of levels, and is configured to read the data address and to direct the data to the next level associated with a unique address space associated with the data address. In one embodiment, the controller is configured to match the data address prefix to a plurality of addresses associated with the unique address spaces. Advantages of the invention include fast switch decisions and low switch latency.
摘要翻译：用于将信息引导到目的地端口的前缀匹配装置包括被配置为存储包括地址和多个级别的数据的存储器，每个级别包括多个存储器位置，每个级别表示唯一的地址空间。控制器耦合到存储器和多个电平，并且被配置为读取数据地址并将数据引导到与与数据地址相关联的唯一地址空间相关联的下一级。在一个实施例中，控制器被配置为将数据地址前缀匹配到与唯一地址空间相关联的多个地址。本发明的优点包括快速切换决定和低开关等待时间。

2. 发明授权

US07174441B2 Method and apparatus for providing internal table extensibility with external interface 失效
标题翻译：提供内部表扩展性与外部接口的方法和装置
公开(公告)号：US07174441B2
公开(公告)日：2007-02-06
申请号：US10687785
申请日：2003-10-17
申请人： Gaurav Singh , Frederick R. Gruner , Brian Hang Wai Yang
发明人： Gaurav Singh , Frederick R. Gruner , Brian Hang Wai Yang
IPC分类号： G06F12/10
CPC分类号： H04L45/00 , H04L45/54 , H04L45/742 , H04L49/90 , H04L69/12
摘要： A configurable lookup table extension system including a plurality of lookup tables arranged in an internal memory, an external memory, and a flexible controller configured to couple at least one of the plurality of lookup tables to the external memory through a single memory interface is disclosed. Implementations of this system can support the flexible allocation of IP and MAC table entries so that a router/switch can flexibly support applications suited to a particular allocation. This approach provides an efficient scheme for extending multiple internal tables to external memory via a single external interface. Further, such extensibility is also programable to allow the size and number of external tables to be configured by software. This solution can provide the flexibility of customizing table sizes for different markets and/or customer requirements.
摘要翻译：公开了一种可配置的查找表扩展系统，其包括布置在内部存储器中的多个查找表，外部存储器和被配置为通过单个存储器接口将多个查找表中的至少一个耦合到外部存储器的灵活控制器。该系统的实现可以支持IP和MAC表项的灵活分配，使得路由器/交换机可以灵活地支持适合于特定分配的应用。这种方法提供了一种通过单个外部接口将多个内部表扩展到外部存储器的有效方案。此外，这种可扩展性也是可编程的，以允许通过软件配置外部表的大小和数量。该解决方案可以为不同市场和/或客户需求定制表格大小提供灵活性。

3. 发明申请

US20110013643A1 ADVANCED TELECOMMUNICATIONS ROUTER AND CROSSBAR SWITCH CONTROLLER 有权
标题翻译：高级电信路由器和交叉开关控制器
公开(公告)号：US20110013643A1
公开(公告)日：2011-01-20
申请号：US12890551
申请日：2010-09-24
申请人： Brian Hang Wai Yang , Kai-Yeung (Sunny) Siu , Mizanur M. Rahman , Wei-Han Lien , Gaurav Singh
发明人： Brian Hang Wai Yang , Kai-Yeung (Sunny) Siu , Mizanur M. Rahman , Wei-Han Lien , Gaurav Singh
IPC分类号： H04L12/56
CPC分类号： H04L49/25 , H04L49/101 , H04L49/3027 , H04L49/3045
摘要： The invention relates to a crossbar switch controller including an input terminal configured to receive a set of service request signals from a set of virtual output queues each comprising a set of packets. The invention also includes a matrix circuit coupled to the input terminal and configured to represent the set of service request signals in the form of a matrix, wherein each service request signal is described by a row position M and a column position N. The invention further includes an output terminal configured to receive a portion of the set of packets during an epoch, an arbiter circuit configured to iteratively scan the matrix during the epoch and issue the set of grant signals to the virtual output queues to determine which service requests are granted, and an arbiter controller configured to initiate the arbiter circuit with an array of non-conflicting matrix elements. Whereby, the arbiter circuit scans the matrix during a first epoch, issues the set of grant signals, allows the set of granted service requests to substantially complete, and if necessary, scans the matrix during subsequent epochs. The invention also relates to a crossbar switch controller including an arbitration pre-processor coupled to the input terminal and the matrix circuit, and configured to represent the set of service request signals in the form of a mapping matrix, and further configured to transform a first mapping position of the service request signal to a second mapping position based, in part, on a mapping algorithm. The invention also includes an arbitration post-processor coupled to the output terminal and the matrix circuit, and further configured to transform the second mapping position of the service request signal back to the first mapping position.
摘要翻译：本发明涉及一种交叉开关控制器，其包括输入端子，该输入端子被配置为从包括一组分组的一组虚拟输出队列接收一组服务请求信号。本发明还包括耦合到输入端并被配置为以矩阵的形式表示服务请求信号集合的矩阵电路，其中每个服务请求信号由行位置M和列位置N描述。本发明进一步包括被配置为在历元期间接收所述一组分组的一部分的输出终端，所述仲裁器电路被配置为在所述时期期间迭代地扫描所述矩阵，并向所述虚拟输出队列发出所述一组授权信号以确定哪些服务请求被授权，以及仲裁器控制器，被配置为使用非冲突矩阵元素的阵列启动仲裁器电路。由此，仲裁器电路在第一纪元期间扫描矩阵，发出授权信号集合，允许一组授权的服务请求基本上完成，并且如果需要，在随后的时期期间扫描矩阵。本发明还涉及一种交叉开关控制器，其包括耦合到输入端和矩阵电路的仲裁预处理器，并且被配置为以映射矩阵的形式表示该组服务请求信号，并且还被配置为将第一部分地基于映射算法将服务请求信号的映射位置映射到第二映射位置。本发明还包括耦合到输出端和矩阵电路的仲裁后处理器，还被配置为将服务请求信号的第二映射位置转换回第一映射位置。

4. 发明授权

US07471682B2 Method and apparatus for providing internal table extensibility based on product configuration 失效
标题翻译：基于产品配置提供内部表可扩展性的方法和装置
公开(公告)号：US07471682B2
公开(公告)日：2008-12-30
申请号：US10687789
申请日：2003-10-17
申请人： Gaurav Singh , Ali Kani , Kiran Kattel , Sridhar Subramanian , Brian Hang Wai Yang
发明人： Gaurav Singh , Ali Kani , Kiran Kattel , Sridhar Subramanian , Brian Hang Wai Yang
IPC分类号： H04L12/56
CPC分类号： H04L41/0816
摘要： A configurable lookup table system including a first controller coupled to a first lookup table and a second controller coupled to a second lookup table is disclosed. The first controller configures the first lookup table for a first type lookup, which can be a Layer 2 or Media Access Control (MAC) type. The second controller configures the second lookup table based on a mode determination. If in a first mode, the second lookup table can be configured for a second type lookup, which can be a Layer 3 or Internet Protocol (IP) type. If in a second mode, the second lookup table can be configured for the first type lookup. This approach provides an efficient scheme for controlling and using multiple internal lookup tables for a variety of product configurations.
摘要翻译：公开了一种可配置的查找表系统，其包括耦合到第一查找表的第一控制器和耦合到第二查找表的第二控制器。第一个控制器为第一个类型查找配置第一个查找表，它可以是第二层或介质访问控制（MAC）类型。第二控制器基于模式确定来配置第二查找表。如果在第一模式中，可以将第二查找表配置为第二类型查找，其可以是第3层或互联网协议（IP）类型。如果在第二模式中，可以为第一类型查找配置第二查找表。这种方法提供了一种用于控制和使用多种内部查找表用于各种产品配置的有效方案。

5. 发明授权

US08514873B2 Advanced telecommunications router and crossbar switch controller 有权
标题翻译：先进的电信路由器和交叉开关控制器
公开(公告)号：US08514873B2
公开(公告)日：2013-08-20
申请号：US12890551
申请日：2010-09-24
申请人： Brian Hang Wai Yang , Kai-Yeung (Sunny) Siu , Mizanur M. Rahman , Wei-Han Lien , Gaurav Singh
发明人： Brian Hang Wai Yang , Kai-Yeung (Sunny) Siu , Mizanur M. Rahman , Wei-Han Lien , Gaurav Singh
IPC分类号： H04L12/54
CPC分类号： H04L49/25 , H04L49/101 , H04L49/3027 , H04L49/3045
摘要： An apparatus and method to receive first service request signals and second service request signals from virtual signal queues, to map the virtual signal queues according to a first mapping, to arbitrate the first service request signals in accordance with the first mapping of the virtual signal queues, and to re-map the virtual signal queues according to a second mapping, different from the first mapping, to allow arbitrating of the second service request signals in accordance with the second mapping of the virtual signal queues.
摘要翻译：一种从虚拟信号队列接收第一服务请求信号和第二服务请求信号的装置和方法，以根据第一映射映射虚拟信号队列，以根据虚拟信号队列的第一映射来仲裁第一服务请求信号并且根据与第一映射不同的第二映射来重新映射虚拟信号队列，以允许根据虚拟信号队列的第二映射来仲裁第二服务请求信号。

6. 发明申请

US20090034517A1 ADVANCED TELECOMMUNICATIONS ROUTER AND CROSSBAR SWITCH CONTROLLER 失效
标题翻译：高级电信路由器和交叉开关控制器
公开(公告)号：US20090034517A1
公开(公告)日：2009-02-05
申请号：US12170269
申请日：2008-07-09
申请人： Brian Hang Wai Yang , Kai-Yeung (Sunny) Siu , Mizanur M. Rahman , Wei-Han Lien , Gaurav Singh
发明人： Brian Hang Wai Yang , Kai-Yeung (Sunny) Siu , Mizanur M. Rahman , Wei-Han Lien , Gaurav Singh
IPC分类号： H04L12/50
CPC分类号： H04L49/25 , H04L49/101 , H04L49/3027 , H04L49/3045
摘要： The invention relates to a crossbar switch controller including an input terminal configured to receive a set of service request signals from a set of virtual output queues each comprising a set of packets. The invention also includes a matrix circuit coupled to the input terminal and configured to represent the set of service request signals in the form of a matrix, wherein each service request signal is described by a row position M and a column position N. The invention further includes an output terminal configured to receive a portion of the set of packets during an epoch, an arbiter circuit configured to iteratively scan the matrix during the epoch and issue the set of grant signals to the virtual output queues to determine which service requests are granted, and an arbiter controller configured to initiate the arbiter circuit with an array of non-conflicting matrix elements. Whereby, the arbiter circuit scans the matrix during a first epoch, issues the set of grant signals, allows the set of granted service requests to substantially complete, and if necessary, scans the matrix during subsequent epochs. The invention also relates to a crossbar switch controller including an arbitration pre-processor coupled to the input terminal and the matrix circuit, and configured to represent the set of service request signals in the form of a mapping matrix, and further configured to transform a first mapping position of the service request signal to a second mapping position based, in part, on a mapping algorithm. The invention also includes an arbitration post-processor coupled to the output terminal and the matrix circuit, and further configured to transform the second mapping position of the service request signal back to the first mapping position.
摘要翻译：本发明涉及一种交叉开关控制器，其包括输入端子，该输入端子被配置为从包括一组分组的一组虚拟输出队列接收一组服务请求信号。本发明还包括耦合到输入端并被配置为以矩阵的形式表示服务请求信号集合的矩阵电路，其中每个服务请求信号由行位置M和列位置N描述。本发明进一步包括被配置为在历元期间接收所述一组分组的一部分的输出终端，所述仲裁器电路被配置为在所述时期期间迭代地扫描所述矩阵，并向所述虚拟输出队列发出所述一组授权信号以确定哪些服务请求被授权，以及仲裁器控制器，被配置为使用非冲突矩阵元素的阵列启动仲裁器电路。由此，仲裁器电路在第一纪元期间扫描矩阵，发出授权信号集合，允许一组授权的服务请求基本上完成，并且如果需要，在随后的时期期间扫描矩阵。本发明还涉及一种交叉开关控制器，其包括耦合到输入端和矩阵电路的仲裁预处理器，并且被配置为以映射矩阵的形式表示该组服务请求信号，并且还被配置为将第一部分地基于映射算法将服务请求信号的映射位置映射到第二映射位置。本发明还包括耦合到输出端和矩阵电路的仲裁后处理器，还被配置为将服务请求信号的第二映射位置转换回第一映射位置。

7. 发明授权

US08594087B2 Encoding-based multicast packet duplication control suitable for VLAN systems 有权
标题翻译：基于编码的组播数据包复制控制适用于VLAN系统
公开(公告)号：US08594087B2
公开(公告)日：2013-11-26
申请号：US10687784
申请日：2003-10-17
申请人： Gaurav Singh , Govind Malalur , Brian Hang Wai Yang
发明人： Gaurav Singh , Govind Malalur , Brian Hang Wai Yang
IPC分类号： H04L12/28
CPC分类号： H04L12/4641 , H04L12/1886
摘要： A packet duplication control system including an input port for receiving a packet and a plurality of output ports for outputting duplications of the packet is disclosed. The duplications can be suitable to support a Virtual Local Area Network (VLAN) system. The duplications can be controlled by descriptors arranged in a linked-list table. Also, the descriptors can have encoding formats, such as contiguous range encoding, non-contiguous range encoding, and discrete encoding. Further, the linked-list table can include at least one shared descriptor.
摘要翻译：公开了包括用于接收分组的输入端口和用于输出分组的重复的多个输出端口的分组复制控制系统。这些重复可以适用于支持虚拟局域网（VLAN）系统。这些重复可以由排列在链表中的描述符来控制。此外，描述符可以具有编码格式，例如连续范围编码，非连续范围编码和离散编码。此外，链表能够包括至少一个共享描述符。

8. 发明申请

US20050122972A1 Prefix matching structure and method for fast packet switching 失效
标题翻译：用于快速分组交换的前缀匹配结构和方法
公开(公告)号：US20050122972A1
公开(公告)日：2005-06-09
申请号：US10968460
申请日：2004-10-18
申请人： Frederick Gruner , Gaurav Singh , Elango Ganesan , Samir Vora , Christopher Eccles , Brian Wai Yang
发明人： Frederick Gruner , Gaurav Singh , Elango Ganesan , Samir Vora , Christopher Eccles , Brian Wai Yang
IPC分类号： H04L12/28 , H04L12/56 , H04L29/12
CPC分类号： H04L29/12801 , H04L29/12009 , H04L45/00 , H04L45/7457 , H04L61/6004
摘要： A prefix matching apparatus for directing information to a destination port includes a memory configured to store a piece of data including an address and a plurality of levels each including a plurality of memory locations, the levels each representing a unique address space. A controller is coupled to the memory and to the plurality of levels, and is configured to read the data address and to direct the data to the next level associated with a unique address space associated with the data address. In one embodiment, the controller is configured to match the data address prefix to a plurality of addresses associated with the unique address spaces. Advantages of the invention include fast switch decisions and low switch latency.
摘要翻译：用于将信息引导到目的地端口的前缀匹配装置包括被配置为存储包括地址和多个级别的数据的存储器，每个级别包括多个存储器位置，每个级别表示唯一的地址空间。控制器耦合到存储器和多个电平，并且被配置为读取数据地址并将数据引导到与与数据地址相关联的唯一地址空间相关联的下一级。在一个实施例中，控制器被配置为将数据地址前缀匹配到与唯一地址空间相关联的多个地址。本发明的优点包括快速切换决定和低开关等待时间。

9. 发明申请

US20080320478A1 AGE MATRIX FOR QUEUE DISPATCH ORDER 失效
标题翻译：年龄排序的年龄矩阵
公开(公告)号：US20080320478A1
公开(公告)日：2008-12-25
申请号：US11830727
申请日：2007-07-30
申请人： Gaurav Singh , Srivatsan Srinivasan , Lintsung Wong
发明人： Gaurav Singh , Srivatsan Srinivasan , Lintsung Wong
IPC分类号： G06F9/46
CPC分类号： G06F9/3814 , G06F9/3838
摘要： An apparatus for queue allocation. An embodiment of the apparatus includes a dispatch order data structure, a bit vector, and a queue controller. The dispatch order data structure corresponds to a queue. The dispatch order data structure stores a plurality of dispatch indicators associated with a plurality of pairs of entries of the queue to indicate a write order of the entries in the queue. The bit vector stores a plurality of mask values corresponding to the dispatch indicators of the dispatch order data structure. The queue controller interfaces with the queue and the dispatch order data structure. The queue controller excludes at least some of the entries from a queue operation based on the mask values of the bit vector.
摘要翻译：一种用于队列分配的装置。该装置的实施例包括调度顺序数据结构，位向量和队列控制器。调度订单数据结构对应于一个队列。调度订单数据结构存储与队列的多对条目相关联的多个调度指示符，以指示队列中条目的写入顺序。位向量存储对应于调度顺序数据结构的调度指示符的多个掩码值。队列控制器与队列和调度订单数据结构接口。队列控制器基于位向量的掩码值从队列操作中排除至少一些条目。

10. 发明申请

US20080270774A1 Universal branch identifier for invalidation of speculative instructions 有权
标题翻译：推测说明无效的通用分支标识符
公开(公告)号：US20080270774A1
公开(公告)日：2008-10-30
申请号：US11799293
申请日：2007-04-30
申请人： Gaurav Singh , Srivatsan Srinivasan , Ricardo Ramirez , Wei-Hsiang Chen , Hai Ngoc Nguyen
发明人： Gaurav Singh , Srivatsan Srinivasan , Ricardo Ramirez , Wei-Hsiang Chen , Hai Ngoc Nguyen
IPC分类号： G06F9/30
CPC分类号： G06F9/3842 , G06F9/3861
摘要： A system for speculative branch predictions. An embodiment of the system includes branch prediction logic, fetch logic, and branch identification logic. The branch prediction logic is configured to predict a branch path for a branch in an instruction stream. The fetch logic is coupled to the branch prediction logic. The fetch logic is configured to speculatively fetch an instruction corresponding to the predicted branch path. The branch identification logic is coupled to the branch prediction logic and the fetch logic. The branch identification logic is configured to mark the speculatively fetched instruction with a branch identifier using a universal branch identification format. The universal branch identification format includes a bit value at a bit position corresponding to the predicted branch path.
摘要翻译：投机分支预测系统。该系统的实施例包括分支预测逻辑，提取逻辑和分支识别逻辑。分支预测逻辑被配置为预测指令流中的分支的分支路径。提取逻辑耦合到分支预测逻辑。提取逻辑被配置为推测性地获取与预测的分支路径相对应的指令。分支识别逻辑耦合到分支预测逻辑和提取逻辑。分支识别逻辑被配置为使用通用分支标识格式使用分支标识符标记所推测的获取的指令。通用分支识别格式包括与预测分支路径相对应的比特位置处的比特值。

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