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1. 发明授权

US07200460B2 Method of depositing low dielectric constant silicon carbide layers 有权
标题翻译：沉积低介电常数碳化硅层的方法
公开(公告)号：US07200460B2
公开(公告)日：2007-04-03
申请号：US10375793
申请日：2003-02-25
申请人： Francimar Campana , Srinivas Nemani , Michael Chapin , Shankar Venkataraman
发明人： Francimar Campana , Srinivas Nemani , Michael Chapin , Shankar Venkataraman
IPC分类号： G06F19/00 , C23C16/00 , G03C5/00
CPC分类号： H01L21/02167 , C23C16/36 , H01L21/02205 , H01L21/02211 , H01L21/02271 , H01L21/0234 , H01L21/0276 , H01L21/31144 , H01L21/314 , H01L21/76808 , H01L21/76813 , H01L21/76826 , H01L21/76829 , H01L21/76834 , H01L2221/1031
摘要： A method of forming a silicon carbide layer for use in integrated circuits is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a nitrogen source in the presence of an electric field. The as-deposited silicon carbide layer incorporates nitrogen therein from the nitrogen source.
摘要翻译：提供一种形成用于集成电路的碳化硅层的方法。碳化硅层通过在电场存在下使包含硅源，碳源和氮源的气体混合物反应而形成。沉积的碳化硅层从氮源中掺入氮。

2. 发明授权

US06537733B2 Method of depositing low dielectric constant silicon carbide layers 有权
公开(公告)号：US06537733B2
公开(公告)日：2003-03-25
申请号：US09793818
申请日：2001-02-23
申请人： Francimar Campana , Srinivas Nemani , Michael Chapin , Shankar Venkataraman
发明人： Francimar Campana , Srinivas Nemani , Michael Chapin , Shankar Venkataraman
IPC分类号： C23C1632
CPC分类号： H01L21/02167 , C23C16/36 , H01L21/02205 , H01L21/02211 , H01L21/02271 , H01L21/0234 , H01L21/0276 , H01L21/31144 , H01L21/314 , H01L21/76808 , H01L21/76813 , H01L21/76826 , H01L21/76829 , H01L21/76834 , H01L2221/1031
摘要： A method of forming a silicon carbide layer for use in integrated circuits is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a nitrogen source in the presence of an electric field. The as-deposited silicon carbide layer incorporates nitrogen therein from the nitrogen source.

3. 发明授权

US06855484B2 Method of depositing low dielectric constant silicon carbide layers 失效
标题翻译：沉积低介电常数碳化硅层的方法
公开(公告)号：US06855484B2
公开(公告)日：2005-02-15
申请号：US10375853
申请日：2003-02-25
申请人： Francimar Campana , Srinivas Nemani , Michael Chapin , Shankar Venkataraman
发明人： Francimar Campana , Srinivas Nemani , Michael Chapin , Shankar Venkataraman
IPC分类号： C23C16/36 , H01L21/027 , H01L21/311 , H01L21/314 , H01L21/768 , C23C16/32
CPC分类号： H01L21/02167 , C23C16/36 , H01L21/02205 , H01L21/02211 , H01L21/02271 , H01L21/0234 , H01L21/0276 , H01L21/31144 , H01L21/314 , H01L21/76808 , H01L21/76813 , H01L21/76826 , H01L21/76829 , H01L21/76834 , H01L2221/1031
摘要： A method of forming a silicon carbide layer for use in integrated circuits is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a nitrogen source in the presence of an electric field. The as-deposited silicon carbide layer incorporates nitrogen therein from the nitrogen source.
摘要翻译：提供一种形成用于集成电路的碳化硅层的方法。碳化硅层通过在电场存在下使包含硅源，碳源和氮源的气体混合物反应而形成。沉积的碳化硅层从氮源中掺入氮。

4. 发明授权

US06090206A Throttle valve providing enhanced cleaning 失效
标题翻译：节流阀提供增强的清洁
公开(公告)号：US06090206A
公开(公告)日：2000-07-18
申请号：US954299
申请日：1997-10-20
申请人： Won B. Bang , Matthew W. Losey , Francimar Campana , Srinivas Nemani , Sundar Pichai
发明人： Won B. Bang , Matthew W. Losey , Francimar Campana , Srinivas Nemani , Sundar Pichai
IPC分类号： F16K3/24 , C23C16/455 , C23C16/511 , F16K5/04 , F16K5/12 , F16K51/00 , H01L21/31 , C23C16/00 , F16K5/10
CPC分类号： F16K5/12
摘要： A throttle valve assembly is provided, including a throttle valve housing having a bore therethrough and a throttle valve plug assembly. The throttle valve plug assembly includes a shaft rotatably mounted on the throttle valve housing and a throttle valve plug having a concave cut-out portion. The throttle valve plug is mounted on the shaft within the throttle valve housing and substantially perpendicular to the bore. The throttle valve plug has at least two fully open positions and a closed position.
摘要翻译：提供了一种节气门组件，其包括具有穿过其中的孔的节流阀壳体和节流阀插塞组件。节流阀塞组件包括可旋转地安装在节流阀壳体上的轴和具有凹形切口部分的节流阀塞。节气门塞被安装在节流阀壳体内的轴上且基本上垂直于孔。节流阀塞具有至少两个完全打开位置和关闭位置。

5. 发明授权

US06596343B1 Method and apparatus for processing semiconductor substrates with hydroxyl radicals 有权
标题翻译：用于处理具有羟基自由基的半导体衬底的方法和设备
公开(公告)号：US06596343B1
公开(公告)日：2003-07-22
申请号：US09557079
申请日：2000-04-21
申请人： Himanshu Pokharna , Shankar Chandran , Srinivas D. Nemani , Chen-an Chen , Francimar Campana , Ellie Yieh , Li-Qun Xia
发明人： Himanshu Pokharna , Shankar Chandran , Srinivas D. Nemani , Chen-an Chen , Francimar Campana , Ellie Yieh , Li-Qun Xia
IPC分类号： C23C1600
CPC分类号： C30B29/06 , C23C16/40 , C23C16/452 , C30B25/02
摘要： A method for processing semiconductor substrates by reacting hydroxyl radicals with a precursor to cause the precursor to decompose and form a film which deposits on a substrate. Hydroxyl radicals, which are produced in a hydroxyl-ion producing apparatus outside of a chemical vapor deposition reactor, are mixed with a precursor to form a hydroxyl ions-precursor mixture. The hydroxyl ions-precursor mixture is introduced into the chemical vapor deposition reactor.
摘要翻译：一种用于通过使羟基自由基与前体反应以使前体分解并形成沉积在基底上的膜来处理半导体衬底的方法。在化学气相沉积反应器外部的羟基离子产生装置中生产的羟基与前体混合以形成羟基离子前体混合物。将羟基离子前体混合物引入化学气相沉积反应器。

6. 发明授权

US06261975B1 Method for depositing and planarizing fluorinated BPSG films 有权
标题翻译：氟化BPSG膜的沉积和平面化方法
公开(公告)号：US06261975B1
公开(公告)日：2001-07-17
申请号：US09262782
申请日：1999-03-04
申请人： Li-Qun Xia , Francimar Campana , Ellie Yieh
发明人： Li-Qun Xia , Francimar Campana , Ellie Yieh
IPC分类号： H01L2131
CPC分类号： H01L21/02131 , C23C16/401 , C23C16/56 , H01L21/02271 , H01L21/02304 , H01L21/0234 , H01L21/02362 , H01L21/31051 , H01L21/31625 , H01L21/31629
摘要： A method for improving the reflow characteristics of a BPSG film. According to the method, a fluorine- or other halogen-doped BPSG layer is deposited over a substrate and reflowed using a rapid thermal pulse (RTP) method. The use of such an RTP reflow method results in superior reflow characteristics as compared to a 20-40 minute conventional furnace reflow process. The inventors discovered that reflowing FBPSG films in a conventional furnace may result in the highly mobile fluorine atoms diffusing from the film prior to completion of the anneal. Thus, the FBPSG layer loses the improved reflow characteristics provided by the incorporation of fluorine into the film. The RTP reflow reflows the film in a minimal amount of time (e.g., 10-90 seconds depending on the temperature used to reflow the layer and the degree of planarization required among other factors). Thus, the fluorine atoms within the FBPSG layer do not have sufficient time to migrate from the layer even if the layer is deposited over a PETEOS oxide or similar layer.
摘要翻译：一种改善BPSG膜的回流特性的方法。根据该方法，将氟或其它卤素掺杂的BPSG层沉积在衬底上并使用快速热脉冲（RTP）方法回流。与20-40分钟的常规炉回流工艺相比，使用这种RTP回流方法导致优异的回流特性。本发明人发现，在常规炉中回流FBPSG膜可能导致高度可移动的氟原子在退火完成之前从膜扩散。因此，FBPSG层失去了通过将氟结合到膜中而提供的改进的回流特性。 RTP回流以最小的时间（例如10-90秒，取决于用于回流层的温度和其他因素所需的平坦化程度）来回流薄膜。因此，即使该层沉积在PETEOS氧化物或类似层上，FBPSG层内的氟原子也不具有从该层迁移的足够时间。

7. 发明授权

US6153540A Method of forming phosphosilicate glass having a high wet-etch rate 失效
标题翻译：形成具有高湿蚀刻速率的磷硅酸盐玻璃的方法
公开(公告)号：US6153540A
公开(公告)日：2000-11-28
申请号：US34850
申请日：1998-03-04
申请人： Ishing Lou , Cary Ching , Peter W. Lee , Rong Pan , Paul Gee , Francimar Campana
发明人： Ishing Lou , Cary Ching , Peter W. Lee , Rong Pan , Paul Gee , Francimar Campana
IPC分类号： C23C16/40 , H01L21/316 , H01L21/31
CPC分类号： H01L21/02129 , C23C16/401 , H01L21/02271 , H01L21/31625
摘要： A method and apparatus for controlling the wet-etch rate and thickness uniformity of a dielectric layer, such as a phosphosilicate glass layer (PSG) layer. The method is based upon the discovery that the atmospheric pressure at which a PSG layer is deposited affects the wet-etch rate of the same, during a subsequent processing step, as well as the layer's thickness uniformity. As a result, the method of the present invention includes the step of pressurizing the atmospheric pressure of a semiconductor process chamber within a predetermined range after the substrate is deposited therein. Flowed into the deposition zone is a process gas comprising a silicon source, all oxygen source, and a phosphorous source; and maintaining the deposition zone at process conditions suitable for depositing a phosphosilicate glass layer on the substrate.
摘要翻译：一种用于控制诸如磷硅酸盐玻璃层（PSG）层的介电层的湿蚀刻速率和厚度均匀性的方法和装置。该方法基于以下发现：沉积PSG层的大气压力在随后的处理步骤期间影响其湿蚀刻速率以及层的厚度均匀性。结果，本发明的方法包括在衬底沉积之后在预定范围内对半导体处理室的大气压进行加压的步骤。流入沉积区的是包括硅源，全氧源和磷源的工艺气体; 以及将沉积区保持在适合于在基底上沉积磷硅酸盐玻璃层的工艺条件。

8. 发明授权

US06599574B1 Method and apparatus for forming a dielectric film using helium as a carrier gas 失效
标题翻译：使用氦气作为载气形成电介质膜的方法和装置
公开(公告)号：US06599574B1
公开(公告)日：2003-07-29
申请号：US08627631
申请日：1996-04-04
申请人： Ellie Yieh , Paul Gee , Li-Qun Xia , Francimar Campana , Shankar Venkataranan , Dana Tribula , Bang Nguyen
发明人： Ellie Yieh , Paul Gee , Li-Qun Xia , Francimar Campana , Shankar Venkataranan , Dana Tribula , Bang Nguyen
IPC分类号： C23C1600
CPC分类号： H01L21/02129 , C23C16/401 , H01L21/02271 , H01L21/02274 , H01L21/31625 , Y10S438/905 , Y10S438/906
摘要： The present invention relates to the deposition of dielectric layers, and more specifically to a method and apparatus for forming dielectric layers such as borophosphosilicate glass (BPSG) having improved film uniformity, higher deposition rate, superior gap fill/reflow capability, and smoother surface morphology. The method forms a dielectric layer with a process using helium carrier gas that produces substantially less downstream residue than conventional methods and apparatus, thereby reducing the need for chamber cleaning and increasing throughput of processed wafers. The present invention utilizes helium instead of nitrogen as carrier gas in a process for forming a dielectric layer such as BPSG to provide various unexpected benefits. According to one aspect, the present invention forms a dielectric film on a substrate, and prolongs a period between chamber cleanings in a system by using helium which produces substantially less downstream and upstream residue than a process using nitrogen. The method includes introducing a process gas containing silicon, oxygen, and first dopant atoms into the chamber; using helium as the carrier gas in the system; and processing more substrates between cleanings than a process using nitrogen as carrier gas. A further aspect of the invention includes annealing the dielectric films formed on the substrates at a lower temperature than required by the process using nitrogen as carrier gas.
摘要翻译：本发明涉及电介质层的沉积，更具体地涉及一种用于形成介电层的方法和装置，例如具有改进的膜均匀性，较高沉积速率，优异的间隙填充/回流能力和更平滑的表面形态的硼磷硅酸盐玻璃（BPSG）。该方法形成具有使用氦载气的方法的电介质层，其产生比常规方法和设备基本上更少的下游残留物，从而减少对室清洁的需要并增加处理的晶片的生产量。本发明在形成诸如BPSG的介电层的工艺中使用氦代替氮作为载气，以提供各种意想不到的好处。根据一个方面，本发明在衬底上形成介电膜，并且通过使用产生比使用氮的方法显着更少的下游和上游残留物的氦来延长系统中的室清洁之间的时间。该方法包括将含有硅，氧和第一掺杂剂原子的工艺气体引入室中; 使用氦气作为系统中的载气; 并且在清洗之前处理比使用氮气作为载气的工艺更多的衬底。本发明的另一方面包括在比使用氮作为载气的方法所要求的温度更低的温度下退火形成在基板上的电介质膜。

9. 发明授权

US06426015B1 Method of reducing undesired etching of insulation due to elevated boron concentrations 有权
标题翻译：由于硼浓度升高而减少不必要的绝缘蚀刻的方法
公开(公告)号：US06426015B1
公开(公告)日：2002-07-30
申请号：US09461504
申请日：1999-12-14
申请人： Li-Qun Xia , Francimar Campana , Ellie Yieh
发明人： Li-Qun Xia , Francimar Campana , Ellie Yieh
IPC分类号： B44C122
CPC分类号： H01L21/02129 , H01L21/02271 , H01L21/31051 , H01L21/31116 , H01L21/31625
摘要： A method is provided for reducing elevated boron concentrations (denoted as “boron spikes”) in an insulating layer containing silicon, boron and other elements where the layer interfaces with surfaces of a semiconductor device. The method includes the steps of: seasoning a reaction chamber by flowing into it a mixture of gasses containing silicon, boron, ozone and other elements in predetermined proportions under set conditions of time, pressure, temperature and flow rates to deposit on inner walls and surfaces of the chamber a thin seasoning coating, and placing a semiconductor device in the chamber and covering it with an insulating layer having a composition similar to the seasoning coating. Subsequent etching of selected portions of the insulating layer has been found not to expose conductive surfaces of the device.
摘要翻译：提供了一种用于降低含有硅，硼和其它元素的绝缘层中升高的硼浓度（表示为“硼尖峰”）的方法，其中层与半导体器件的表面接合。该方法包括以下步骤：在时间，压力，温度和流速的设定条件下，以预定比例将含有硅，硼，臭氧和其它元素的气体混合物流入反应室中以沉积在内壁和表面上的腔室是薄的调味涂层，并且将半导体器件放置在腔室中并用具有类似于调味涂层的组成的绝缘层覆盖。发现绝缘层的选定部分的后续蚀刻不暴露器件的导电表面。

10. 发明授权

US06218268B1 Two-step borophosphosilicate glass deposition process and related devices and apparatus 失效
标题翻译：两步硼磷硅玻璃沉积工艺及相关设备及装置
公开(公告)号：US06218268B1
公开(公告)日：2001-04-17
申请号：US09076170
申请日：1998-05-05
申请人： Li-Qun Xia , Ellie Yieh , Maria Galiano , Francimar Campana , Shankar Chandran
发明人： Li-Qun Xia , Ellie Yieh , Maria Galiano , Francimar Campana , Shankar Chandran
IPC分类号： H01L2176
CPC分类号： H01L21/02129 , C23C16/045 , C23C16/401 , C23C16/56 , H01L21/022 , H01L21/02271 , H01L21/31625
摘要： A method for forming a BPSG film from a two-step deposition process and related apparatus and devices. A conformal layer of BPSG is deposited on a substrate. A more stable layer of BPSG is deposited at a higher deposition rate over the conformal layer. The method is suitable for filling trenches at least as narrow as 0.06 microns with aspect ratios of at least 5.5:1.
摘要翻译：一种从两步沉积工艺形成BPSG膜的方法及相关设备和装置。 BPSG的保形层沉积在基底上。在保形层上以更高的沉积速率沉积更稳定的BPSG层。该方法适用于填充至少为0.06微米至少为5.5：1的纵横比的沟槽。

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