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1. 发明申请

US20080010707A1 Ambient environment nanowire sensor 失效
标题翻译：环境纳米线传感器
公开(公告)号：US20080010707A1
公开(公告)日：2008-01-10
申请号：US11264113
申请日：2005-11-01
申请人： Fengyan Zhang , Robert Barrowcliff , Jong-Jan Lee , Sheng Hsu
发明人： Fengyan Zhang , Robert Barrowcliff , Jong-Jan Lee , Sheng Hsu
IPC分类号： C30B25/00 , C30B23/00 , C30B28/12
CPC分类号： B81C1/00182 , B81B2201/0214 , Y10S977/712 , Y10S977/762
摘要： An ambient environment nanowire sensor and corresponding fabrication method have been provided. The method includes: forming a substrate such as Silicon (Si) or glass; growing nanowires; depositing an insulator layer overlying the nanowires; etching to expose tips of the nanowires; forming a patterned metal electrode, with edges, overlying the tips of the nanowires; and, etching to expose the nanowires underlying the electrode edges. The nanowires can be a material such as IrO2, TiO2, InO, ZnO, SnO2, Sb2O3, or In2O3, to mane just a few examples. The insulator layer can be a spin-on glass (SOG) or low-k dielectric. In one aspect, the resultant structure includes exposed nanowires grown from the doped substrate regions and an insulator core with embedded nanowires. In a different aspect, the method forms a growth promotion layer overlying the substrate. The resultant structure includes exposed nanowires grown from the selectively formed growth promotion layer.
摘要翻译：提供了一种周围环境纳米线传感器和相应的制造方法。该方法包括：形成诸如硅（Si）或玻璃的衬底; 生长纳米线沉积覆盖在纳米线上的绝缘体层; 蚀刻以暴露纳米线的尖端; 形成图案化的金属电极，其边缘覆盖在纳米线的尖端上; 并且蚀刻以暴露电极边缘下方的纳米线。纳米线可以是诸如IrO 2，TiO 2，InO，ZnO，SnO 2，Sb 2，N 2的材料例如，在实施例3中，可以举出例如“O 3”，“3”，“ 绝缘体层可以是旋涂玻璃（SOG）或低k电介质。一方面，所得结构包括从掺杂衬底区域生长的暴露的纳米线和具有嵌入的纳米线的绝缘体芯。在不同的方面，该方法形成覆盖衬底的生长促进层。所得结构包括从选择性形成的生长促进层生长的暴露的纳米线。

2. 发明申请

US20070167008A1 Nanotip electrode non-volatile memory resistor cell 审中-公开
标题翻译：纳米电极非易失性存储电阻单元
公开(公告)号：US20070167008A1
公开(公告)日：2007-07-19
申请号：US11717818
申请日：2007-03-14
申请人： Sheng Hsu , Fengyan Zhang , Gregory Stecker , Robert Barrowcliff
发明人： Sheng Hsu , Fengyan Zhang , Gregory Stecker , Robert Barrowcliff
IPC分类号： H01L21/44
CPC分类号： H01L27/101 , H01L45/04 , H01L45/1233 , H01L45/1273 , H01L45/147 , H01L45/16 , H01L45/1675
摘要： A non-volatile memory resistor cell with a nanotip electrode, and corresponding fabrication method are provided. The method comprises: forming a first electrode with nanotips; forming a memory resistor material adjacent the nanotips; and, forming a second electrode adjacent the memory resistor material, where the memory resistor material is interposed between the first and second electrodes. Typically, the nanotips are iridium oxide (IrOx) and have a tip base size of about 50 nanometers, or less, a tip height in the range of 5 to 50 nm, and a nanotip density of greater than 100 nanotips per square micrometer. In one aspect, the substrate material can be silicon, silicon oxide, silicon nitride, or a noble metal. A metalorganic chemical vapor deposition (MOCVD) process is used to deposit Ir. The IrOx nanotips are grown from the deposited Ir.
摘要翻译：提供了具有纳米尖端电极的非易失性存储器电阻单元及相应的制造方法。该方法包括：形成具有纳米尖端的第一电极; 在所述纳米尖端附近形成记忆电阻材料; 并且形成与所述存储电阻材料相邻的第二电极，其中所述存储电阻材料置于所述第一和第二电极之间。通常，纳米针是氧化铱（IrOx），并且具有约50纳米或更小的尖端基底尺寸，在5至50nm范围内的尖端高度，以及每平方微米大于100纳米尖端的纳米密度密度。一方面，衬底材料可以是硅，氧化硅，氮化硅或贵金属。使用金属有机化学气相沉积（MOCVD）工艺沉积Ir。 IrOx纳米尖端从沉积的Ir生长。

3. 发明申请

US20070111368A1 Photovoltaic structure with a conductive nanowire array electrode 失效
标题翻译：具有导电纳米线阵列电极的光伏结构
公开(公告)号：US20070111368A1
公开(公告)日：2007-05-17
申请号：US11280423
申请日：2005-11-16
申请人： Fengyan Zhang , Robert Barrowcliff , Sheng Hsu
发明人： Fengyan Zhang , Robert Barrowcliff , Sheng Hsu
IPC分类号： H01L51/40 , H01L21/00
CPC分类号： H01L51/4213 , B82Y10/00 , H01L51/0046 , H01L51/0048 , H01L51/4226 , H01L51/4233 , H01L51/441 , Y02E10/52 , Y02E10/549
摘要： A photovoltaic (PV) structure is provided, along with a method for forming a PV structure with a conductive nanowire array electrode. The method comprises: forming a bottom electrode with conductive nanowires; forming a first semiconductor layer of a first dopant type (i.e., n-type) overlying the nanowires; forming a second semiconductor layer of a second dopant type, opposite of the first dopant type (i.e., p-type), overlying the first semiconductor layer; and, forming a top electrode overlying the second semiconductor layer. The first and second semiconductor layers can be a material such as a conductive polymer, a conjugated polymer with a fullerene derivative, and inorganic materials such as CdSe, CdS, Titania, or ZnO. The conductive nanowires can be a material such as IrO2, In2O3, SnO2, or indium tin oxide (ITO).
摘要翻译：提供光伏（PV）结构以及用于形成具有导电纳米线阵列电极的PV结构的方法。该方法包括：形成具有导电纳米线的底电极; 形成覆盖在纳米线上的第一掺杂剂型（即n型）的第一半导体层; 形成与所述第一掺杂剂类型（即，p型）相反的第二掺杂剂类型的第二半导体层，所述第二掺杂剂类型覆盖所述第一半导体层; 以及形成覆盖所述第二半导体层的顶部电极。第一和第二半导体层可以是诸如导电聚合物，具有富勒烯衍生物的共轭聚合物和诸如CdSe，CdS，二氧化钛或ZnO的无机材料的材料。导电纳米线可以是诸如IrO 2，In 2 O 3，SnO 2，或铟的材料氧化锡（ITO）。

4. 发明申请

US20060180817A1 Silicon phosphor electroluminescence device with nanotip electrode 有权
标题翻译：具有纳米尖电极的硅荧光体电致发光器件
公开(公告)号：US20060180817A1
公开(公告)日：2006-08-17
申请号：US11061946
申请日：2005-02-17
申请人： Sheng Hsu , Fengyan Zhang , Gregory Stecker , Robert Barrowcliff
发明人： Sheng Hsu , Fengyan Zhang , Gregory Stecker , Robert Barrowcliff
IPC分类号： H01L27/15
CPC分类号： H05B33/145
摘要： An electroluminescence (EL) device and a method are provided for fabricating said device with a nanotip electrode. The method comprises: forming a bottom electrode with nanotips; forming a Si phosphor layer adjacent the nanotips; and, forming a transparent top electrode. The Si phosphor layer is interposed between the bottom and top electrodes. The nanotips may have a tip base size of about 50 nanometers, or less, a tip height in the range of 5 to 50 nm, and a nanotip density of greater than 100 nanotips per square micrometer. Typically, the nanotips are formed from iridium oxide (IrOx) nanotips. A MOCVD process forms the Ir bottom electrode. The IrOx nanotips are grown from the Ir. In one aspect, the Si phosphor layer is a SRSO layer. In response to an SRSO annealing step, nanocrystalline SRSO is formed with nanocrystals having a size in the range of 1 to 10 nm.
摘要翻译：提供了一种电致发光（EL）器件和用于制造具有纳米尖端电极的所述器件的方法。该方法包括：形成具有纳米尖端的底部电极; 在所述纳米尖端附近形成Si磷光体层; 并形成透明的顶部电极。 Si荧光体层介于底部和顶部电极之间。纳米尖端可以具有约50纳米或更小的尖端基部尺寸，5至50nm范围内的尖端高度，以及每平方毫米大于100纳米尖端的纳米密度密度。通常，纳米尖端由氧化铱（IrOx）纳米尖端形成。 MOCVD工艺形成Ir底部电极。 IrOx纳米尖嘴从Ir生长。在一个方面，Si磷光体层是SRSO层。响应于SRSO退火步骤，形成具有1至10nm范围内的尺寸的纳米晶体的纳米晶SRSO。

5. 发明申请

US20060124926A1 IRIDIUM OXIDE NANOSTRUCTURE 有权
标题翻译：氧化亚氮纳米结构
公开(公告)号：US20060124926A1
公开(公告)日：2006-06-15
申请号：US11339876
申请日：2006-01-26
申请人： Fengyan Zhang , Gregory Stecker , Robert Barrowcliff , Sheng Hsu
发明人： Fengyan Zhang , Gregory Stecker , Robert Barrowcliff , Sheng Hsu
IPC分类号： H01L29/10 , H01L21/302
CPC分类号： H01L21/31111 , B81C1/00111 , B82Y10/00
摘要： A method is provided for patterning iridium oxide (IrOx) nanostructures. The method comprises: forming a substrate first region adjacent a second region; growing IrOx nanostructures from a continuous IrOx film overlying the first region; simultaneously growing IrOx nanostructures from a non-continuous IrOx film overlying the second region; selectively etching areas of the second region exposed by the non-continuous IrOx film; and, lifting off the IrOx nanostructures overlying the second region. Typically, the first region is formed from a first material and the second region from a second material, different than the first material. For example, the first material can be a refractory metal, or refractory metal oxide. The second material can be SiOx. The step of selectively etching areas of the second region exposed by the non-continuous IrOx film includes exposing the substrate to an etchant that is more reactive with the second material than the IrOx.
摘要翻译：提供了用于构图氧化铱（IrOx）纳米结构的方法。该方法包括：形成邻近第二区域的衬底第一区域; 从覆盖第一区域的连续IrOx膜生长IrOx纳米结构; 同时从覆盖第二区域的非连续IrOx膜生长IrOx纳米结构; 选择性地蚀刻由非连续IrOx膜暴露的第二区域的区域; 并提升覆盖第二区域的IrOx纳米结构。通常，第一区域由第一材料形成，第二区域由不同于第一材料的第二材料形成。例如，第一种材料可以是难熔金属或难熔金属氧化物。第二种材料可以是SiOx。选择性地蚀刻由非连续IrOx膜暴露的第二区域的区域的步骤包括将衬底暴露于与IrOx比第二材料更具反应性的蚀刻剂。

6. 发明申请

US20060099758A1 Iridium oxide nanotubes and method for forming same 有权
公开(公告)号：US20060099758A1
公开(公告)日：2006-05-11
申请号：US10971280
申请日：2004-10-21
申请人： Fengyan Zhang , Robert Barrowcliff , Gregory Stecker , Sheng Hsu
发明人： Fengyan Zhang , Robert Barrowcliff , Gregory Stecker , Sheng Hsu
IPC分类号： H01L21/8238
CPC分类号： B82Y10/00 , B82Y30/00 , C30B25/00 , C30B29/16 , C30B29/605 , Y10S977/811 , Y10S977/84
摘要： A method is provided for forming iridium oxide (IrOx) nanotubes. The method comprises: providing a substrate; introducing a (methylcyclopentadienyl)(1,5-cyclooctadiene)iridium(I) precursor; introducing oxygen as a precursor reaction gas; establishing a final pressure in the range of 1 to 50 Torr; establishing a substrate, or chamber temperature in the range of 200 to 500 degrees C.; and using a metalorganic chemical vapor deposition (MOCVD) process, growing IrOx hollow nanotubes from the substrate surface. Typically, the (methylcyclopentadienyl)(1,5-cyclooctadiene)iridium(I) precursor is initially heated in an ampule to a first temperature in the range of 60 to 90 degrees C., and the first temperature is maintained in the transport line introducing the precursor. The precursor may be mixed with an inert carrier gas such as Ar, or the oxygen precursor reaction gas may be used as the carrier.

7. 发明申请

US20060160304A1 Non-volatile memory resistor cell with nanotip electrode 失效
标题翻译：带纳米尖电极的非易失性存储器电阻单元
公开(公告)号：US20060160304A1
公开(公告)日：2006-07-20
申请号：US11039544
申请日：2005-01-19
申请人： Sheng Hsu , Fengyan Zhang , Gregory Stecker , Robert Barrowcliff
发明人： Sheng Hsu , Fengyan Zhang , Gregory Stecker , Robert Barrowcliff
IPC分类号： H01L21/336
CPC分类号： H01L27/101 , H01L45/04 , H01L45/1233 , H01L45/1273 , H01L45/147 , H01L45/16 , H01L45/1675
摘要： A non-volatile memory resistor cell with a nanotip electrode, and corresponding fabrication method are provided. The method comprises: forming a first electrode with nanotips; forming a memory resistor material adjacent the nanotips; and, forming a second electrode adjacent the memory resistor material, where the memory resistor material is interposed between the first and second electrodes. Typically, the nanotips are iridium oxide (IrOx) and have a tip base size of about 50 nanometers, or less, a tip height in the range of 5 to 50 nm, and a nanotip density of greater than 100 nanotips per square micrometer. In one aspect, the substrate material can be silicon, silicon oxide, silicon nitride, or a noble metal. A metalorganic chemical vapor deposition (MOCVD) process is used to deposit Ir. The IrOx nanotips are grown from the deposited Ir.
摘要翻译：提供了具有纳米尖端电极的非易失性存储器电阻单元及相应的制造方法。该方法包括：形成具有纳米尖端的第一电极; 在所述纳米尖端附近形成记忆电阻材料; 并且形成与所述存储电阻材料相邻的第二电极，其中所述存储电阻材料置于所述第一和第二电极之间。通常，纳米针是氧化铱（IrOx），并且具有约50纳米或更小的尖端基底尺寸，在5至50nm范围内的尖端高度，以及每平方微米大于100纳米尖端的纳米密度密度。一方面，衬底材料可以是硅，氧化硅，氮化硅或贵金属。使用金属有机化学气相沉积（MOCVD）工艺沉积Ir。 IrOx纳米尖端从沉积的Ir生长。

8. 发明申请

US20060088993A1 IRIDIUM OXIDE NANOSTRUCTURE PATTERNING 有权
标题翻译：氧化亚氮纳米结构图
公开(公告)号：US20060088993A1
公开(公告)日：2006-04-27
申请号：US11013804
申请日：2004-12-15
申请人： Fengyan Zhang , Gregory Stecker , Robert Barrowcliff , Sheng Hsu
发明人： Fengyan Zhang , Gregory Stecker , Robert Barrowcliff , Sheng Hsu
IPC分类号： H01L21/4763 , H01L21/302
CPC分类号： H01L21/31111 , B81C1/00111 , B82Y10/00
摘要： A method is provided for patterning iridium oxide (IrOx) nanostructures. The method comprises: forming a substrate first region adjacent a second region; growing IrOx nanostructures from a continuous IrOx film overlying the first region; simultaneously growing IrOx nanostructures from a non-continuous IrOx film overlying the second region; selectively etching areas of the second region exposed by the non-continuous IrOx film; and, lifting off the IrOx nanostructures overlying the second region. Typically, the first region is formed from a first material and the second region from a second material, different than the first material. For example, the first material can be a refractory metal, or refractory metal oxide. The second material can be SiOx. The step of selectively etching areas of the second region exposed by the non-continuous IrOx film includes exposing the substrate to an etchant that is more reactive with the second material than the IrOx.
摘要翻译：提供了用于构图氧化铱（IrOx）纳米结构的方法。该方法包括：在第二区域附近形成衬底第一区域; 从覆盖第一区域的连续IrOx膜生长IrOx纳米结构; 同时从覆盖第二区域的非连续IrOx膜生长IrOx纳米结构; 选择性地蚀刻由非连续IrOx膜暴露的第二区域的区域; 并提升覆盖第二区域的IrOx纳米结构。通常，第一区域由第一材料形成，第二区域由不同于第一材料的第二材料形成。例如，第一种材料可以是难熔金属或难熔金属氧化物。第二种材料可以是SiOx。选择性地蚀刻由非连续IrOx膜暴露的第二区域的区域的步骤包括将衬底暴露于与IrOx比第二材料更具反应性的蚀刻剂。

9. 发明申请

US20060086314A1 Iridium oxide nanowires and method for forming same 失效
标题翻译：氧化铱纳米线及其形成方法
公开(公告)号：US20060086314A1
公开(公告)日：2006-04-27
申请号：US10971330
申请日：2004-10-21
申请人： Fengyan Zhang , Robert Barrowcliff , Sheng Hsu
发明人： Fengyan Zhang , Robert Barrowcliff , Sheng Hsu
IPC分类号： C30B23/00 , C30B25/00 , C30B28/12 , C30B28/14
CPC分类号： H01L24/48 , C30B25/005 , C30B29/16 , C30B29/62 , H01L24/45 , H01L24/49 , H01L2224/05644 , H01L2224/05655 , H01L2224/05669 , H01L2224/43827 , H01L2224/45015 , H01L2224/45144 , H01L2224/45155 , H01L2224/45157 , H01L2224/45166 , H01L2224/45169 , H01L2224/45178 , H01L2224/45181 , H01L2224/45565 , H01L2224/45599 , H01L2224/45688 , H01L2224/48011 , H01L2224/48091 , H01L2224/4813 , H01L2224/48463 , H01L2224/4847 , H01L2224/48599 , H01L2224/49111 , H01L2224/49175 , H01L2924/00011 , H01L2924/01005 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01018 , H01L2924/01022 , H01L2924/01027 , H01L2924/01028 , H01L2924/01032 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/04953 , H01L2924/10253 , H01L2924/10271 , H01L2924/1033 , H01L2924/10335 , H01L2924/14 , H01L2924/20751 , Y10S977/762 , Y10S977/763 , Y10S977/811 , H01L2924/00014 , H01L2924/20651 , H01L2924/00 , H01L2924/01006
摘要： Iridium oxide (IrOx) nanowires and a method forming the nanowires are provided. The method comprises: providing a growth promotion film with non-continuous surfaces, having a thickness in the range of 0.5 to 5 nanometers (nm), and made from a material such as Ti, Co, Ni, Au, Ta, polycrystalline silicon (poly-Si), SiGe, Pt, Ir, TiN, or TaN; establishing a substrate temperature in the range of 200 to 600 degrees C.; introducing oxygen as a precursor reaction gas; introducing a (methylcyclopentadienyl)(1,5-cyclooctadiene)iridium(I) precursor; using a metalorganic chemical vapor deposition (MOCVD) process, growing IrOx nanowires from the growth promotion film surfaces. The IrOx nanowires have a diameter in the range of 100 to 1000 Å, a length in the range of 1000 Å to 2 microns, an aspect ratio (length to width) of greater than 50:1. Further, the nanowires include single-crystal nanowire cores covered with an amorphous layer having a thickness of less than 10 Å.
摘要翻译：提供氧化铱（IrOx）纳米线和形成纳米线的方法。该方法包括：提供具有0.5至5纳米（nm）范围内的厚度的非连续表面的生长促进膜，并由诸如Ti，Co，Ni，Au，Ta，多晶硅多晶硅），SiGe，Pt，Ir，TiN或TaN; 建立200〜600℃的基板温度。引入氧气作为前体反应气体; 引入（甲基环戊二烯基）（1,5-环辛二烯）铱（I）前体; 使用金属有机化学气相沉积（MOCVD）工艺，从生长促进膜表面生长IrOx纳米线。 IrOx纳米线的直径在100至1000埃的范围内，长度在1000埃至2微米之间，纵横比（长宽比）大于50:1。此外，纳米线包括覆盖有厚度小于Å的非晶层的单晶纳米线芯。

10. 发明申请

US20050196878A1 Single-phase c-axis doped PGO ferroelectric thin films 有权
标题翻译：单相c轴掺杂PGO铁电薄膜
公开(公告)号：US20050196878A1
公开(公告)日：2005-09-08
申请号：US11046620
申请日：2005-01-28
申请人： Fengyan Zhang , Wei-Wei Zhuang , Jong-Jan Lee , Sheng Hsu
发明人： Fengyan Zhang , Wei-Wei Zhuang , Jong-Jan Lee , Sheng Hsu
IPC分类号： H01L21/00 , H01L21/02 , H01L21/316 , H01L41/22
CPC分类号： H01L21/31691 , H01L28/55 , H01L41/317
摘要： A method for forming a doped PGO ferroelectric thin film, and related doped PGO thin film structures are described. The method comprising: forming either an electrically conductive or electrically insulating substrate; forming a doped PGO film overlying the substrate; annealing; crystallizing; and, forming a single-phase c-axis doped PGO thin film overlying the substrate, having a Curie temperature of greater than 200 degrees C. Forming a doped PGO film overlying the substrate includes depositing a doped precursor in the range between 0.1N and 0.5N, with a molecular formula of Pby−xMxGe3O11, where: M is a doping element; y=4.5 to 6; and, x=0.1 to 1. The element M can be Sn, Ba, Sr, Cd, Ca, Pr, Ho, La, Sb, Zr, or Sm.
摘要翻译：描述了用于形成掺杂的PGO铁电薄膜的方法以及相关的掺杂PGO薄膜结构。该方法包括：形成导电或电绝缘的衬底; 在衬底上形成掺杂的PGO膜; 退火; 结晶并且形成覆盖在衬底上的单相c轴掺杂的PGO薄膜，其居里温度大于200℃。形成覆盖在衬底上的掺杂PGO膜包括在0.1N和0.5之间的范围内沉积掺杂的前体 N，具有分子式为Pb x Si x N x N x O 11，其中：M是掺杂物元件; y = 4.5〜6; x = 0.1〜1。元素M可以是Sn，Ba，Sr，Cd，Ca，Pr，Ho，La，Sb，Zr或Sm。

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