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1. 发明专利

JPS5692620A SELECTION SYSTEM OF INPUT*OUTPUT DEVICE 失效
公开(公告)号：JPS5692620A
公开(公告)日：1981-07-27
申请号：JP16972279
申请日：1979-12-26
申请人： NIPPON ELECTRIC CO , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , HITACHI LTD , FUJITSU LTD
发明人： OOKAWA KAZUMASA , NAKAMURA MASANORI , MURAKAMI TOMOSHI , INAGAKI HIROSHI , KOUDA YOSHIFUMI
IPC分类号： G06F11/20 , G06F3/00 , G06F11/16 , G06F13/00
摘要： PURPOSE:To enable to switch the input/output device without changing the device address transmitted from the central processing unit from the software, by setting the act display corresponding to the input/output device to be switched. CONSTITUTION:When starting is made from a central processing unit CC1, a device address is transmitted to an input and output bus 2. Since the same address is assigned to the input/output devices I/O #0-3 and #1-4, a coincidence signal is output from matching circuits MAT8, 9. On the other hand, in a monitor section SUP5, the output of an act display circuit 10 indicating the use of any of I/O sets either I/O #0-3 or #1-4. Accordingly, either one gate is open for AND gates 12, 13 determining the starting of main control sections 11 and 12. That is, the device address is transmitted to start either one of I/O #0-3 or #1-4 from CC1, and one of them is selected at the acting display circuit 10.

2. 发明专利

JPS5899052A HIGH IMPEDANCE MONITOR CONTROL SYSTEM 失效
公开(公告)号：JPS5899052A
公开(公告)日：1983-06-13
申请号：JP19694981
申请日：1981-12-09
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , HITACHI LTD , FUJITSU LTD
发明人： KIMURA NAOHIRO , OKAMOTO KUNIHIRO , ABE SHIYOUICHI , KOMATSU AYAFUMI , KOUDA YOSHIFUMI
IPC分类号： H04M3/22 , H04M3/30
摘要： PURPOSE:To reduce the insertion loss due to interruption and to prevent the effect of an interference data terminal on a subscriber, by inserting a monitor amplifier to a subscriber terminal to be tested with the status information of the subscriber, before a line test trunk is connected to the subscriber terminal. CONSTITUTION:When a telephone number of a subscriber to be tested is dialed from a test board LTF, the number is received at a control circuit of an exchange via a line test trunk LTTA, the status information of the corresponding subscriber is transmitted to the line test trunk LTTA and displayed on the LFT. In case of a busy call, a relay MON of an accessory unit LTTAU is activated through an operating contact ''by'' of the relay of the trunk LTTA, and a monitor amplifier MNAMP is inserted to the subscriber line. Further, the controller of the exchange closes links 3, 4 between the subscriber terminal and the unit LTTAU after the transmission of busy information. Thus, a test personnel can monitor the line without giving adverse effect on other subscribers.

3. 发明专利

JPS5412648A REFRESH CONTROL SYSTEM 失效
公开(公告)号：JPS5412648A
公开(公告)日：1979-01-30
申请号：JP7855877
申请日：1977-06-30
申请人： NIPPON ELECTRIC CO , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , HITACHI LTD , FUJITSU LTD
发明人： YAMAGUCHI TAICHI , KOBAYASHI TAKAO , UCHIDA HIROYASU , DEWA HIROSHI , KOUDA YOSHIFUMI
IPC分类号： G11C11/406
摘要： PURPOSE:To secure a refresh control featuring an easy control and a high stability by securing the use of the refresh time suited for the system request terms via the refresh timer switch circuit.

4. 发明专利

JPS5841366A CAPACITY MEASURING SYSTEM FOR SUBSCRIBER LINE 失效
公开(公告)号：JPS5841366A
公开(公告)日：1983-03-10
申请号：JP13946481
申请日：1981-09-04
申请人： NIPPON ELECTRIC CO , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , HITACHI LTD , FUJITSU LTD
发明人： ABE SHIYOUICHI , TOKUI YOSHIMASA , NAITOU YOSHIO , INOUE KOUJI , KOUDA YOSHIFUMI
IPC分类号： G01R27/26
摘要： PURPOSE:To determine the capacitance of a subscriber line accurately by substitution of electric charge for a reference capacitance varying a voltage to be applied thereto calculate the line capacitance depending on the difference in the voltage. CONSTITUTION:An electric charge of a reference capacitance CS discharged through a (w) contact. Then, an (x) contact is operated to charge a line capacitance with a power source E1. Then, a Y relay is operated to return the electric charge accumulated in a capacitance C to the CS to measure a voltage e1. Then, the (w) contact is operated to discharge the electric charge returned to the reference capacitance CS. A (z) contact is operated to charge the capacitance C with the E2. The subsequent operation measures a voltage e2 returned to the reference capacitance CS as the operation with the voltage of the E1 does. Then, the line capacitance C is calculated by formulaI. With such an arrangement, effect of a rectifier on the line can be ignored thereby enabling the line capacitance accurately.

5. 发明专利

JPS5840645A INPUT AND OUTPUT CONTROL SYSTEM 失效
公开(公告)号：JPS5840645A
公开(公告)日：1983-03-09
申请号：JP13942081
申请日：1981-09-04
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , HITACHI LTD
发明人： KOUDA YOSHIFUMI , OKAMOTO KUNIHIRO , YOKOYAMA KAZUHIKO , NISHIMURA TAKASHI , TAKAYAMA AKIRA
IPC分类号： G06F11/00 , G06F13/00 , G06F13/12
摘要： PURPOSE:To prevent a system from breakdown and to specify a fault position, by connecting a common bus channel device to a common bus and a bus for an input and output controller, and thus preventing a bus fault of the input and output controller from extending to the common bus. CONSTITUTION:In the common bus control system wherein a central controller 3 is connected to the same bus with input and output controllers 9-13, and a main storage device 2, common bus channel devices 7 and 8 having an interface converting function or a data buffering function are connected to the common bus 1. Then, the plural input and output controllers 9-13 are connected in groups to the devices 7 and 8 through input and output buses 14 and 15. Consequently, a bus fault of the input and output controllers 9-13 never extends to the common bus, and the system is prevented from beins shut down to limit the fault range.

6. 发明专利

JPS5679322A BUS SELECTION SYSTEM 失效
公开(公告)号：JPS5679322A
公开(公告)日：1981-06-29
申请号：JP15615979
申请日：1979-11-30
申请人： NIPPON ELECTRIC CO , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , HITACHI LTD , FUJITSU LTD
发明人： OOKAWA KAZUMASA , HIROKAWA YUUJI , NISHIDA RIKIO , INAGAKI HIROSHI , KOUDA YOSHIFUMI
IPC分类号： G06F13/14 , G06F3/00 , G06F9/46 , G06F9/52 , G06F13/366 , G06F15/16 , G06F15/177
摘要： PURPOSE:To offer respective processor services equally by facilitating the contention among processors by looking in the detection of whether a request exists, by attaining access to the processor indicated by the value of a sequential counter under microprogram control. CONSTITUTION:To input-output device 20, 0 processor 10 and 1 processor 11 are connected and service requests from processors 10 and 11 are inputted to request detecting circuit 21 via start request signal lines 31 and 32. The transmission and reception of data to and from device 20 are performed via input-output bus lines 33 and 34 connected to bus circuit 22. In addition, sequential counter 23 selecting processor 10 or 11 is made by microcontrol part 24 to count up and request detecting circuit 21 detects a start request, on the basis of the value of counter 23, by the processor number and according to whether the start request signal exists. The signal that this request detecting circut 21 detects is supplied to input-output device 26 via control part 24 to accept the start of bus circuit 22.

7. 发明专利

JPS5840648A CONNECTION SYSTEM FOR INPUT AND OUTPUT CONTROLLER 失效
公开(公告)号：JPS5840648A
公开(公告)日：1983-03-09
申请号：JP13941981
申请日：1981-09-04
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , HITACHI LTD
发明人： KOUDA YOSHIFUMI , OKAMOTO KUNIHIRO , YOKOYAMA KAZUHIKO , IKEDA SABUROU , ITOU TAKESHI
IPC分类号： G06F13/14 , G06F13/40 , G06F15/16 , G06F15/177
摘要： PURPOSE:To allow plural central processing units to use one input and output controller by providing a means of informing an interrupt report to a central processor in the input and output controller. CONSTITUTION:The central processing unit interface part 16 in an input and output controller 5 is provided with route FFs 0 and 1, which are set and reset under the control of the control part 17 of the controller 5 to store the conditions of a route. When a request for use arrives from an unconnected central processing unit between central processing units 1 and 2, the connected side is informed by interruption, etc., that the connected side is to be disconnected at a break of the processing of the input and output controller 5. Then, connection with the unconnected side is reported by interruption, etc. Thus, communication between the central processing units is unnecessary, and one input and output controller 5 is used by plural central processing units 1 and 2 without any complicated procedure and conflict.

8. 发明专利

JPS5562590A MICROPROGRAM CONTROL SYSTEM 失效
公开(公告)号：JPS5562590A
公开(公告)日：1980-05-12
申请号：JP13260178
申请日：1978-10-30
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , HITACHI LTD , FUJITSU LTD
发明人： NISHIDA RIKIO , MORIKAWA YUUICHI , SAKATA HIRONOBU , YOSHIURA YOSHIO , KOUDA YOSHIFUMI
IPC分类号： G06F9/22 , G11C11/406
摘要： PURPOSE:To make the concurrence circuit of the overflow signal of a refresh counter and a read/write memory access request signal needless by defining the overflow signal above as an interrupt condition of a microprogram. CONSTITUTION:The overflow signal of refresh counter 7 which is overflowed at the time of a refresh cycle is transmitted to interrupt control circuit 8. Circuit 8 regards this signal as one interrupt signal and controls selection between this signal and other interrupt signals. Then, a fixed address is determined on a basis of one interrupt signal by the control memory address selection circuit and is set to control memory address register 10 to read out control memory 11. A micro instruction set in control memory instruction register 12 is decoded by decoder 13 to generate an independent refresh in dication signal, thereby executing the refresh operation through memory control circuit 14 by memory unit 15.

9. 发明专利

JPS58129566A OVERLAYING SYSTEM 失效
公开(公告)号：JPS58129566A
公开(公告)日：1983-08-02
申请号：JP1018782
申请日：1982-01-27
申请人： FUJITSU LTD
发明人： KOUDA YOSHIFUMI , HIDAKA TOSHIO , MAENO SHINICHI
IPC分类号： G06F15/16 , G06F9/445 , G06F15/163 , G11C29/00
摘要： PURPOSE:To make a doubling or stand-by system small-sized, and to improve its service, by storing a program which is not strict as to real time processing, or a program data which is not used frequently, in a main storage device of a stand-by side, and shifting it to a main storage device of an act side as necessary. CONSTITUTION:Main storage devices 11a, 11b, central control devices 12a, 12b and inter-system communicating devices 13a, 13b are completely doubled, one is made an act system, the other is made a stand-by system, and the system is operated. To this system, a magnetic tape 15a, cassette magnetic tape 15b, a floppy disk 15c, etc. are connected through an input/output device 14. On the main storage device 13a of this act system, an overlay area 25 as well as various progams is provided, and in the stand-by system, various program data 27 are stored in advance. In this state, when a fault has occurred in the act system, said program data 27 are shifted to the area 25 of the act system, its program data 27 are executed, and the system is made small-sized, and the service is diversified.

10. 发明专利

JPS53136928A TIME MONITOR CIRCUIT 失效
公开(公告)号：JPS53136928A
公开(公告)日：1978-11-29
申请号：JP5186677
申请日：1977-05-06
申请人： FUJITSU LTD
发明人： OKADA TOORU , KIUCHI YUKIO , KOUDA YOSHIFUMI
IPC分类号： G06F9/46 , G06F9/48 , G06F11/00 , G06F11/30
摘要： PURPOSE:To simplify the constitution of a monitor timer by supplying the clock pulse of the period corresponding to the necessary monitor time to the monitor timer from the clock pulse generating means of various periods from the signal transmission through reception.

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