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1. 发明专利

JPS5559525A ORDER CONTROL SYSTEM 失效
公开(公告)号：JPS5559525A
公开(公告)日：1980-05-06
申请号：JP13260078
申请日：1978-10-30
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , HITACHI LTD , FUJITSU LTD
发明人： YASUDA KENICHI , MORIKAWA YUUICHI , YAZAWA KATSUHIKO , AMANO YUTAKA , YASUI YUTAKA
IPC分类号： G06F13/10 , G06F3/00 , G06F9/06
摘要： PURPOSE:To reduce the execution time of the input/output order by securing the reading of the order word at the I/O unit during the order word reading cycle. CONSTITUTION:Central controller CC transmits the address onto data bus DTB and at the same time transmits continuously order latch signal IFETCH onto inductive line IFE during the cycle of the address sending cycle (input/output order reading cycle TR). At the same time, address flag ADRFLG is sent onto lead wire ADF and accordingly memory device MM transmits the input/output order word to DTB in response to ADRFLG, and at the same time transmits data flag DTFLG onto lead wire DTF. Thus the CC completes TR. In this latch cycle the I/O reads out the order word tranmitted from the MM through the logic circuit of IFETCH and DTFLG, and the operation code can be received through the I/O. In other words, the operation code sending cycle, which is so far carried out in the 2nd cycle of the conventional method, can be omitted, thus reducing the execution time for the input/output order.

2. 发明专利

JPS5562590A MICROPROGRAM CONTROL SYSTEM 失效
公开(公告)号：JPS5562590A
公开(公告)日：1980-05-12
申请号：JP13260178
申请日：1978-10-30
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , HITACHI LTD , FUJITSU LTD
发明人： NISHIDA RIKIO , MORIKAWA YUUICHI , SAKATA HIRONOBU , YOSHIURA YOSHIO , KOUDA YOSHIFUMI
IPC分类号： G06F9/22 , G11C11/406
摘要： PURPOSE:To make the concurrence circuit of the overflow signal of a refresh counter and a read/write memory access request signal needless by defining the overflow signal above as an interrupt condition of a microprogram. CONSTITUTION:The overflow signal of refresh counter 7 which is overflowed at the time of a refresh cycle is transmitted to interrupt control circuit 8. Circuit 8 regards this signal as one interrupt signal and controls selection between this signal and other interrupt signals. Then, a fixed address is determined on a basis of one interrupt signal by the control memory address selection circuit and is set to control memory address register 10 to read out control memory 11. A micro instruction set in control memory instruction register 12 is decoded by decoder 13 to generate an independent refresh in dication signal, thereby executing the refresh operation through memory control circuit 14 by memory unit 15.

3. 发明专利

JPS5525253A SUBSCRIBER CIRCUIT 失效
公开(公告)号：JPS5525253A
公开(公告)日：1980-02-22
申请号：JP9804978
申请日：1978-08-10
申请人： NIPPON ELECTRIC CO , NIPPON TELEGRAPH & TELEPHONE
发明人： SHINOZUKA TAKASHI , MORIKAWA YUUICHI
IPC分类号： H04Q3/72 , H04M3/02 , H04M3/06
摘要： PURPOSE:To realize the mutual conversion between the 2-wire signal and the 4-wire signal by securing an ample echo attenuation amount under the normal state through an appropriate selection of the coupling resistance. CONSTITUTION:The communication signal of unbalanced type applied to 4-wire sending signal terminal 4WS is converted into the balanced type through unbalanced-balanced circuit 1 and then amplified 2 to be transmitted to subscriber terminal SUB via resistances 6a and 6b. While the communication signal sent from terminal SUB is sent to terminals 3c and 3d of balanced subtractor circuit 3 and receives the subtraction process with the contents of the signals applied to terminals 3a and 3b to be then applied to balanced-unbalanced circuit 4. And the unbalanced signal is delivered to the 4WR terminal. Thus coupling resistances 6a, 6b, 7a and 7b are selected properly to secure an ample echo attenuation amount in the normal state, realizing the mutual conversion between the 2-wire signal and the 4-wire signal.

4. 发明专利

JPS54122012A RINGINGGSIGNAL DETECTION CIRCUIT 失效
公开(公告)号：JPS54122012A
公开(公告)日：1979-09-21
申请号：JP2924178
申请日：1978-03-16
申请人： NIPPON ELECTRIC CO , NIPPON TELEGRAPH & TELEPHONE
发明人： UEKI ISAMU , MORIKAWA YUUICHI
IPC分类号： H04M1/00 , H04M3/02 , H04Q3/42
摘要： PURPOSE:To obtain a detection circuit of simple constitution which can detect a ringing signal by making use of two constant-voltage diodes. CONSTITUTION:The anode of 1st constant-voltage diode 26 and that of 2nd constant-voltage diode 25 are connected together and the cathode of diode 25 is connected in series to one terminal of light emission diode 23; and diodes 23 and 24 are connected together in parallel with polarities opposite and the other terminal of light emission diode 23 is connected in series to resistance 22. Further, the other terminal of resistance 22 is connected in series to capacitor 21, the other terminal of which constitutes the input terminal together with the cathode of constant-voltage diode 26. Consequently, a ringing signal can be detected under no switching control of a switch without damping a call signal.

5. 发明专利

JPS5539981A DATA PROCESSING DEVICE 失效
公开(公告)号：JPS5539981A
公开(公告)日：1980-03-21
申请号：JP11300978
申请日：1978-09-14
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： MINODA NAOAKI , MORIKAWA YUUICHI
IPC分类号： G06F12/02 , G06F13/00
摘要： PURPOSE:To reduce the operation circuits and shorten the access time by carrying out only the address operation at first, after the access to the column, and performing the row address operation to make row access. CONSTITUTION:The operation circuit ALU carries out the column address computation as a first operation and transmits the column address to the main memory device MM through the bus BS. The main memory device MM latches the column address and decodes by the decoder to make column access. Then, the switch circuit SWC selects the second operation data from the memory ROM and sets it at the register CMIR and decoded by the decoder DEC to input to the operation circuit ALU. By performing the row address computation, the row address is fed to the main memory device MM through the bus BS and the row access is performed by the similar means.

6. 发明专利

JPS5489409A SUBSCRIBERSIGMA CIRCUIT 失效
公开(公告)号：JPS5489409A
公开(公告)日：1979-07-16
申请号：JP15641777
申请日：1977-12-27
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： TAKADA KENZOU , MORIKAWA YUUICHI , ATSUNUMA TAKEO
IPC分类号： H04M19/00
摘要： PURPOSE:To make it possible to protect precisely a feeder and a subscriber's circuit in case that the earth is generated in the line, by providing with a protective circuit of such a type to connect a power source connecting circuit between the battery input terminal of the feeder and the battery. CONSTITUTION:In a normal time, ground-fault detector circuit X is in an inoperative state, and switching transistor TrQ3 of power source connection circuit W is saturated by saturation control resistor R6, and battery input terminal B of feeder S and battery -VB are in a conductive state. Next, when the earth is generated in the A line, the current is flown to the circuit of Zener diode D1, resistances R7 and R8 and battery -VB, and controlling TrQ4 is saturated and is turned on. As a result, TrQ3 is subjected to non-saturation control and is cut off to separate feeder S and battery -VB, thereby protecting feeder S and a subscriber's circuit.

7. 发明专利

JPS5489408A SUBSCRIBERSIGMA CIRCUIT 失效
公开(公告)号：JPS5489408A
公开(公告)日：1979-07-16
申请号：JP15641677
申请日：1977-12-27
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： TAKADA KENZOU , MORIKAWA YUUICHI , SAITOU KAZUO
IPC分类号： H04Q3/72 , H04M3/02 , H04Q3/545
摘要： PURPOSE:To ensure an operation suitable for an electronic exchange equipment to resolve the trouble of current limit which an electronic switch bears, by performing precisely the control function other than voice communication in telephone exchange by a subscriber's circuit. CONSTITUTION:An electronic exchange equipment is constituted by switch network 1 which causes only voice signals to pass through, channel controller 2, central controller 3, subscriber's telephone sets T1 and T2, and subscriber's circuits 11 and 12. Diode D1 of photo isolator P1 is connected between the first impedance Z1 of a feeder of each of circuits 11 and 12 and the earth, and scan signal SCN is transmitted from transistor Q2 of P1 and is supplied to controller 2. Then, signal distribution input SD transmitted from the channel control circuit is supplied to subscriber's circuits to operate relays A and B (these operate inversion contact a). Thus, all control functions other than voice communication is performed in subscriber's circuits 11 and 12.

8. 发明专利

JPS5491111A TRUNK EQUIPMENT 失效
公开(公告)号：JPS5491111A
公开(公告)日：1979-07-19
申请号：JP15876877
申请日：1977-12-28
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： KAMATA SHIGEO , OOSAKI TAKAAKI , MORIKAWA YUUICHI , ATSUNUMA TAKEO
IPC分类号： H04Q3/42 , H04Q3/00
摘要： PURPOSE:To make a trunk equipment small-size and make it needless to disconnect the trunk equipment from a service line by using a non-linear element having a voltage-current characteristic, where small-amplitude speech signals are broken and small-amplitude call signals are caused to pass, in a call signal detector circuit provided in the trunk euipment. CONSTITUTION:Call signals sent from main wires La and Lb are applied to full- wave rectifier circuit 2 through capacitor 1 and resistance 12 and are subjected to full-wave rectification. Full-wave-rectified signals are applied to non-linear element 10 and current detector circuit 11. Non-linear element 10 has a voltage-current characteristic where the current flows over a given voltage, and this voltage is set larger than speech signals and smaller than call signals. As a result, call signals cause the current to flow to non-linear element 10, and this current is detected by current detector circufit 11 to transmit signals, which perform the incoming connection control, to private branch exchanges connected to wires L'a and L'b.

9. 发明专利

JPS5539980A URGENT CONTROL CIRCUIT 失效
公开(公告)号：JPS5539980A
公开(公告)日：1980-03-21
申请号：JP11300878
申请日：1978-09-14
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： URUSHIBARA TETSUO , MORIKAWA YUUICHI , KOIKE HIDEYUKI
IPC分类号： G06F11/20
摘要： PURPOSE:To simplify the construction and the control and enhance the reliability by providing in two sets of center processing device perliminarily constructed at present an abnormality detection circuit and a gate circuit having a double stabilizing circuit in distribution. CONSTITUTION:When one center processing device CC1 is used at present and the other one CC2 is used for perliminary one, the present and preliminary signal ms 1 is 0, and ms 2 is 1. When the abnormal condition of the CC1 is detected by the system abnormal detection circuit DET1, the output signal thereof is 0 and the initiation signal st1 is 1 and ms1 is 1. Thus, the double stabilizing circuit comprising NAND circuits N 11, N 21 is inverted and ms 2 is 0 and the CC2 of the present use is indicated and the output of NAND circuit N22 is 1 and the initiation signal st 2 of the output of the OR circuit OR 2 is 1 to carry out the urgent control operation.

10. 发明专利

JPS5539979A PAGE CONTROL SYSTEM 失效
公开(公告)号：JPS5539979A
公开(公告)日：1980-03-21
申请号：JP11300778
申请日：1978-09-14
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： YASUI YUTAKA , SHINOOKA MAKOTO , MORIKAWA YUUICHI
IPC分类号： G06F13/12 , G06F3/00 , G06F12/00 , G06F12/02 , G06F13/00 , G06F13/28
摘要： PURPOSE:To provide a page processing system in which the soft processing is simplified and which has an economical construction by providing a register for setting temporarily the page address at the page register of the central processing device. CONSTITUTION:The page register comprising the registers JPR, PPR, LPR for setting the page address for carrying out the reading of command from the main memory device MM and the data and the like during the performance of macro command and a register UPR for the data transmission between the channel device CH and the main memory device MM or access of the main memory devive MM during the control of the system in the central processing device CC is provided in the central processing device CC. When the macro command is interrupted and the main memory device MM is made access, the page address is set by using the register UPR and according to this page address, the main memory device is made access to carry out the data transmission.

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