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    • 5. 发明申请
    • HIGH DENSITY PLANAR ELECTRICAL INTERFACE
    • 高密度平面电气接口
    • WO03001223A3
    • 2003-05-30
    • PCT/US0219347
    • 2002-06-18
    • FORMFACTOR INCELDRIDGE BENJAMIN NMILLER CHARLES A
    • ELDRIDGE BENJAMIN NMILLER CHARLES A
    • G01R1/04G01R1/067G01R1/073G01R31/26H01B1/00
    • G01R1/0466H01R13/025H01R13/40H01R2201/20
    • An apparatus including a substrate having a plurality of through holes and a plurality of cables, including wires and/or coaxial cables, extending through respective ones of the plurality of through holes of the substrate. Each of the cables comprises a conductor and terminates about a surface of the substrate such that the conductors of respective ones of plurality of cables are planarly aligned and available for electrical contact. A system including a cable interface extending through respective ones of a plurality of through holes of a body of the interface; an interconnection component comprising a first plurality of contact points aligned with respective ones of conductors of the plurality of cables and a second plurality of contact points aligned to corresponding contact points of a device to be tested. Also, a method of routing signals through the conductors of the plurality of cables between electronic components.
    • 一种设备,包括具有多个通孔的基板和包括电线和/或同轴电缆的多根电缆,延伸穿过基板的多个通孔中的相应的通孔。 每个电缆包括导体并围绕基板的表面终止,使得多个电缆中的相应电缆的导体平面对准并且可用于电接触。 一种系统,包括延伸穿过所述界面的主体的多个通孔中的相应一个的电缆接口; 互连部件,其包括与所述多根电缆中的相应导体对准的第一多个接触点以及与要测试的设备的相应接触点对准的第二多个接触点。 而且,一种通过电子部件之间的多根电缆的导线路由信号的方法。
    • 8. 发明申请
    • A METHOD AND APPARATUS FOR CALIBRATING AND/OR DESKEWING COMMUNICATIONS CHANNELS
    • 一种用于校准和/或消除通信通道的方法和装置
    • WO2006010120A3
    • 2007-03-29
    • PCT/US2005024532
    • 2005-07-11
    • FORMFACTOR INCMILLER CHARLES A
    • MILLER CHARLES A
    • G06K5/04G01R31/28
    • G01R35/005G01R31/3016G01R31/31723G01R31/318511G01R31/3191G01R31/31937
    • A series of pulses may be driven down each drive channel ("A", and 514, 516, 518, Fig. 5), which creates a series of composite pulses at the output of the buffer (532). Each composite pulse is a composition of the individual pulses driven down the drive channels. Timing offsets associated with the drive channels may be adjusted (406) until the individual pulses of the composite pulse align or closely align. Those timing offsets calibrate and/or deskew the drive channels, compensating for differences in the propagation delays through the drive channels. The composite pulse may be feed back to the tester through compare channels (544 and 546), and offsets associated with compare signals for each compare channel may be aligned to the composite pulse, which calibrates and/or deskews the compare channels.
    • 可以沿着每个驱动通道(图A中的“A”和“514,516,518”)驱动一系列脉冲,这在缓冲器(532)的输出处产生一系列复合脉冲。 每个复合脉冲是从驱动通道驱动的各个脉冲的组合。 可以调整与驱动通道相关联的定时偏移(406),直到复合脉冲的各个脉冲对准或紧密对准。 这些定时偏移校准和/或校正驱动通道,补偿通过驱动通道传播延迟的差异。 复合脉冲可以通过比较通道(544和546)反馈给测试仪,并且与每个比较通道的比较信号相关的偏移量可以对准复合脉冲,该复合脉冲校准和/或对比比较通道。
    • 10. 发明申请
    • A METHOD AND APPARATUS FOR INCREASING THE OPERATING FREQUENCY OF A SYSTEM FOR TESTING ELECTRONIC DEVICES
    • 一种用于增加测试电子设备的系统的操作频率的方法和装置
    • WO2006073737A3
    • 2007-03-08
    • PCT/US2005045583
    • 2005-12-15
    • FORMFACTOR INCMILLER CHARLES A
    • MILLER CHARLES A
    • G01R31/02
    • G01R31/2889G01R31/31905
    • A test system includes a communications channel that terminals in a probe, which contacts an input terminal of an electronic device to be tested. A resistor is connected between the communications channel near the probe and ground. The resistor reduces the input resistance of the terminal and thereby reduces the rise and fall times of the input terminal. The channel may be terminated in a branch having multiple paths in which each path is terminated with a probe for contacting a terminal on electronic devices to be tested. Isolation resistors are included in the branches to prevent a fault at one input terminal from propagating to the other input terminals. A shunt resistor is provided in each branch, which reduces the input resistance of the terminal and thereby reduces the rise and fall times of the input terminal. The shunt resistor may also be sized to reduce, minimize, or eliminate signal reflections back up the channel.
    • 测试系统包括通信信道,探测器中的终端接触要测试的电子设备的输入端。 在探头和地之间的通信通道之间连接一个电阻。 该电阻降低了端子的输入电阻,从而减小了输入端子的上升和下降时间。 信道可以在具有多个路径的分支中终止,其中每个路径用用于接触待测试的电子设备上的终端的探针终止。 隔离电阻包括在分支中,以防止一个输入端子的故障传播到其他输入端子。 在每个分支中设置有分流电阻器,这降低了端子的输入电阻,从而减小了输入端子的上升和下降时间。 分流电阻器的尺寸也可以减小,最小化或消除信道反射信号的反射。