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1. 发明授权

US06803276B2 Semiconductor device having a flash memory cell and fabrication method thereof 有权
公开(公告)号：US06803276B2
公开(公告)日：2004-10-12
申请号：US10616391
申请日：2003-07-09
申请人： Dong-Jun Kim , Jin-Ho Kim , Yong-Kyu Lee , Min-Soo Cho , Eui-Youl Ryu
发明人： Dong-Jun Kim , Jin-Ho Kim , Yong-Kyu Lee , Min-Soo Cho , Eui-Youl Ryu
IPC分类号： H01L218247
CPC分类号： H01L27/11521 , H01L27/115 , H01L29/42328
摘要： In a non-volatile semiconductor memory device and a fabrication method thereof, a charge storage layer is formed on a substrate. A control gate layer is formed on the charge storage layer. A gate mask having a spacer-shape is formed on the control gate layer. The charge storage layer and the control gate layer are removed using the gate mask as protection to form a control gate and a charge storage region.

2. 发明授权

US06784476B2 Semiconductor device having a flash memory cell and fabrication method thereof 有权
标题翻译：具有闪存单元的半导体器件及其制造方法
公开(公告)号：US06784476B2
公开(公告)日：2004-08-31
申请号：US10039126
申请日：2002-01-03
申请人： Dong-Jun Kim , Jin-Ho Kim , Yong-Kyu Lee , Min-Soo Cho , Eui-Youl Ryu
发明人： Dong-Jun Kim , Jin-Ho Kim , Yong-Kyu Lee , Min-Soo Cho , Eui-Youl Ryu
IPC分类号： H01L27108
CPC分类号： H01L27/11521 , H01L27/115 , H01L29/42328
摘要： In a non-volatile semiconductor memory device and a fabrication method thereof, a charge storage layer is formed on a substrate. A control gate layer is formed on the charge storage layer. A gate mask having a spacer-shape is formed on the control gate layer. The charge storage layer and the control gate layer are removed using the gate mask as protection to form a control gate and a charge storage region.
摘要翻译：在非易失性半导体存储器件及其制造方法中，在基板上形成电荷存储层。在电荷存储层上形成控制栅极层。在控制栅极层上形成具有间隔物形状的栅极掩模。使用栅极掩模去除电荷存储层和控制栅极层作为保护以形成控制栅极和电荷存储区域。

3. 发明授权

US06724661B2 Erasing method in non-volatile memory device 有权
标题翻译：非易失性存储器件中的擦除方法
公开(公告)号：US06724661B2
公开(公告)日：2004-04-20
申请号：US10090902
申请日：2002-05-31
申请人： Yong-Kyu Lee , Dong-Jun Kim , Min-Soo Cho , Eui-Youl Ryu , Jin-Ho Kim
发明人： Yong-Kyu Lee , Dong-Jun Kim , Min-Soo Cho , Eui-Youl Ryu , Jin-Ho Kim
IPC分类号： G11C1604
CPC分类号： G11C16/14
摘要： A method for performing an erase operation in a memory cell. A first voltage and a second voltage are applied to the source and drain regions, respectively, for a predetermined erase time; and the first and second voltages are switched with each other between the source and drain regions at least one time for the erase time. Thereby, hole is easily injected to the source and drain regions and a channel lateral surface, and a uniform and high-speed erase operation is archived.
摘要翻译：一种在存储单元中执行擦除操作的方法。分别在源极和漏极区域施加第一电压和第二电压达预定的擦除时间; 并且第一和第二电压在源极和漏极区之间彼此切换至少一次以用于擦除时间。因此，孔容易地注入到源极和漏极区域以及沟道横向表面，并且存储均匀且高速的擦除操作。

4. 发明授权

US08476130B2 Semiconductor device and method of fabricating semiconductor device 有权
标题翻译：半导体器件及半导体器件的制造方法
公开(公告)号：US08476130B2
公开(公告)日：2013-07-02
申请号：US13180613
申请日：2011-07-12
申请人： Tea-Kwang Yu , Byung-Sup Shim , Yong-Kyu Lee , Bo-Young Seo , Yong-Tae Kim
发明人： Tea-Kwang Yu , Byung-Sup Shim , Yong-Kyu Lee , Bo-Young Seo , Yong-Tae Kim
IPC分类号： H01L21/8238
CPC分类号： H01L27/2436 , H01L27/105 , H01L27/2445 , H01L45/1683
摘要： A method of fabricating a semiconductor device includes providing a substrate having a memory block and a logic block defined therein, forming a dummy gate pattern on the memory block; forming a first region of a first conductivity type at one side of the dummy gate pattern and a second region of a second conductivity type at the other side of the dummy gate pattern, and forming a nonvolatile memory device electrically connected to the first region.
摘要翻译：一种制造半导体器件的方法包括提供具有存储块和在其中定义的逻辑块的衬底，在存储块上形成伪栅极图案; 在伪栅极图案的一侧形成第一导电类型的第一区域和在虚拟栅极图案的另一侧形成第二导电类型的第二区域，以及形成与第一区域电连接的非易失性存储器件。

5. 发明申请

US20120087189A1 Non-Volatile Memory Device 有权
标题翻译：非易失性存储器件
公开(公告)号：US20120087189A1
公开(公告)日：2012-04-12
申请号：US13177873
申请日：2011-07-07
申请人： Yong-Kyu Lee , Tea-Kwang Yu , Bo-Young Seo
发明人： Yong-Kyu Lee , Tea-Kwang Yu , Bo-Young Seo
IPC分类号： G11C16/04
CPC分类号： G11C16/0408 , G11C16/0425 , G11C16/06 , G11C16/3418
摘要： A non-volatile memory device includes a first sector including a first sector selection transistor and a first plurality of pages connected to the first sector selection transistor, and a second sector including a second sector selection transistor and a second plurality of pages connected to the second sector selection transistor. Each of the first and second plurality of pages includes a memory transistor and a selection transistor, and a number of pages in the first plurality of pages is greater than a number of pages in the second plurality of pages.
摘要翻译：非易失性存储器件包括第一扇区，包括第一扇区选择晶体管和连接到第一扇区选择晶体管的第一多个页，以及包括第二扇区选择晶体管的第二扇区和连接到第二扇区选择晶体管的第二多个页扇区选择晶体管。第一和第二多页中的每一页包括存储晶体管和选择晶体管，并且第一多页中的页数大于第二多页中的页数。

6. 发明授权

US08053342B2 Mask ROM device, semiconductor device including the mask ROM device, and methods of fabricating mask ROM device and semiconductor device 失效
标题翻译：掩模ROM器件，包括掩模ROM器件的半导体器件，以及制造掩模ROM器件和半导体器件的方法
公开(公告)号：US08053342B2
公开(公告)日：2011-11-08
申请号：US12836066
申请日：2010-07-14
申请人： Yong-Kyu Lee , Jeong-Uk Han , Hee-Seog Jeon , Young-Ho Kim , Myung-Jo Chun , Jung-Ho Moon
发明人： Yong-Kyu Lee , Jeong-Uk Han , Hee-Seog Jeon , Young-Ho Kim , Myung-Jo Chun , Jung-Ho Moon
IPC分类号： H01L21/8238
CPC分类号： H01L27/105 , H01L21/26586 , H01L21/823807 , H01L21/823814 , H01L27/1052 , H01L27/11266 , H01L27/11293
摘要： A mask read-only memory (ROM) device, which can stably output data, includes an on-cell and an off-cell. The on-cell includes an on-cell gate structure on a substrate and an on-cell junction structure within the substrate. The off-cell includes an off-cell gate structure on the substrate and an off-cell junction structure within the substrate. The on-cell gate structure includes an on-cell gate insulating film, an on-cell gate electrode and an on-cell gate spacer. The on-cell junction structure includes first and second on-cell ion implantation regions of a first polarity and third and fourth on-cell ion implantation regions of a second polarity. The off-cell gate structure includes an off-cell gate insulating film, an off-cell gate electrode and an off-cell gate spacer. The off-cell junction structure includes first and second off-cell ion implantation regions of the first polarity and a third off-cell ion implantation region of the second polarity.
摘要翻译：可以稳定地输出数据的掩模只读存储器（ROM）装置包括接通电池和截止电池。开放单元包括衬底上的孔上栅极结构和衬底内的电池单元结结构。离子电池包括在衬底上的离子电池栅极结构和衬底内的细胞外结合结构。单体栅极结构包括单元间栅极绝缘膜，单晶体栅极电极和单元间栅极间隔物。该单电池结结构包括具有第一极性的第一和第二开孔离子注入区和第二极性的第三和第四接通电离子注入区。离群栅极结构包括离子栅极绝缘膜，离子阱栅极电极和非电池栅极间隔物。离电池结结构包括具有第一极性的第一和第二离子外离子注入区域和第二极性的第三离子间离子注入区域。

7. 发明申请

US20080242075A1 METHOD FOR FORMING NON-VOLATILE MEMORY DEVICES 有权
标题翻译：形成非易失性存储器件的方法
公开(公告)号：US20080242075A1
公开(公告)日：2008-10-02
申请号：US12135295
申请日：2008-06-09
申请人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Yong-Kyu Lee
发明人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Yong-Kyu Lee
IPC分类号： H01L21/3205
CPC分类号： H01L29/785 , B82Y10/00 , H01L21/84 , H01L27/115 , H01L27/11521 , H01L27/11568 , H01L27/1203 , H01L29/42392 , H01L29/66545 , H01L29/66795 , H01L29/66825 , H01L29/66833 , H01L29/7851 , H01L29/7854 , H01L29/78645
摘要： According to a nonvolatile memory device having a multi gate structure and a method for forming the same of the present invention, a gate electrode is formed using a damascene process. Therefore, a charge storage layer, a tunneling insulating layer, a blocking insulating layer and a gate electrode layer are not attacked from etching in a process for forming the gate electrode, thereby forming a nonvolatile memory device having good reliability.
摘要翻译：根据本发明的具有多栅极结构的非易失性存储器件及其形成方法，使用镶嵌工艺形成栅电极。因此，在用于形成栅电极的工艺中，电荷存储层，隧道绝缘层，阻挡绝缘层和栅极电极层不会被蚀刻侵蚀，从而形成具有良好可靠性的非易失性存储器件。

8. 发明申请

US20080029828A1 FIN FIELD EFFECT TRANSISTORS INCLUDING OXIDATION BARRIER LAYERS 有权
标题翻译：包括氧化阻挡层的FIN场效应晶体管
公开(公告)号：US20080029828A1
公开(公告)日：2008-02-07
申请号：US11871453
申请日：2007-10-12
申请人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Yong-Kyu Lee
发明人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Yong-Kyu Lee
IPC分类号： H01L29/76 , H01L21/336
CPC分类号： H01L29/7854 , B82Y10/00 , H01L29/66545 , H01L29/66553 , H01L29/66795 , H01L29/78645
摘要： A method of forming a fin field effect transistor on a semiconductor substrate includes forming a fin-shaped active region vertically protruding from the substrate. An oxide layer is formed on a top surface and opposing sidewalls of the fin-shaped active region. An oxidation barrier layer is formed on the opposing sidewalls of the fin-shaped active region and is planarized to a height no greater than about a height of the oxide layer to form a fin structure. The fin structure is oxidized to form a capping oxide layer on the top surface of the fin-shaped active region and to form at least one curved sidewall portion proximate the top surface of the fin-shaped active region. The oxidation barrier layer has a height sufficient to reduce oxidation on the sidewalls of the fin-shaped active region about halfway between the top surface and a base of the fin-shaped active region. Related devices are also discussed.
摘要翻译：在半导体衬底上形成鳍状场效应晶体管的方法包括形成从衬底垂直突出的鳍状有源区。在鳍状有源区的上表面和相对侧壁上形成氧化物层。在翅片状有源区域的相对的侧壁上形成氧化阻挡层，并将其平坦化至不大于氧化物层高度的高度以形成翅片结构。翅片结构被氧化以在翅片形有源区的顶表面上形成封盖氧化层，并且在翅片形有源区的顶表面附近形成至少一个弯曲的侧壁部分。氧化阻挡层的高度足以减小翅片形有源区的侧壁上的氧化，大约在鳍状有源区的顶表面和基底之间的一半处。还讨论了相关设备。

9. 发明授权

US06656922B2 Oral delivery of macromolecules 失效
公开(公告)号：US06656922B2
公开(公告)日：2003-12-02
申请号：US09845827
申请日：2001-04-30
申请人： Youngro Byun , Yong-Kyu Lee
发明人： Youngro Byun , Yong-Kyu Lee
IPC分类号： A61K31727
CPC分类号： C08B37/00 , A61K31/727 , A61K47/542 , A61K47/554 , A61K47/61 , C08B37/0075
摘要： Polysaccharides, which are widely used as an anticoagulation drugs, especially heparin, are clinically administered only by intravenous or subcutaneous injection because of their strong hydrophilicity and high negative charge. Amphiphilic heparin derivatives were synthesized by conjugation to bile acids, sterols, and alkanoic acids, respectively. These heparin derivatives were slightly hydrophobic, exhibited good solubility in water, and have high anticoagulation activity. These slightly hydrophobic heparin derivatives are efficiently absorbed in the gastrointestinal tract and can be used in oral dosage forms. Methods of using these amphiphilic heparin derivatives and similarly modified macromolecules for oral administration are also disclosed.

10. 发明授权

US06348378B1 Method of making a non-volatile semiconductor device with reduced program disturbance 有权
标题翻译：制造具有减少的程序干扰的非易失性半导体器件的方法
公开(公告)号：US06348378B1
公开(公告)日：2002-02-19
申请号：US09349728
申请日：1999-07-08
申请人： Yong-Kyu Lee
发明人： Yong-Kyu Lee
IPC分类号： H01L21336
CPC分类号： H01L27/11543 , H01L21/84 , H01L27/105 , H01L27/11526 , H01L27/11546 , H01L27/1203 , H01L29/66825
摘要： A non-volatile semiconductor device and a method of making such a device having a memory cell formation part and a peripheral circuit part having high and low-voltage transistor formation parts, wherein the device includes an anti-punch through region surrounding a drain region in the memory cell formation part, and surrounding drain and source regions of the low-voltage transistor formation part.
摘要翻译：一种非易失性半导体器件及其制造方法，该器件具有存储单元形成部分和具有高电压和低电压晶体管形成部分的外围电路部分，其中该器件包括围绕漏极区域的反穿通区域存储单元形成部分以及低压晶体管形成部分的周围的漏极和源极区域。

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