专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06787970B2 Tuning of packaged film bulk acoustic resonator filters 有权
标题翻译：封装薄膜体声波谐振滤波器的调谐
公开(公告)号：US06787970B2
公开(公告)日：2004-09-07
申请号：US10353276
申请日：2003-01-29
申请人： Dong S. Shim , Jose Maiz , Li-Peng Wang , Qing Ma , Valluri Rao
发明人： Dong S. Shim , Jose Maiz , Li-Peng Wang , Qing Ma , Valluri Rao
IPC分类号： H01L4104
CPC分类号： H03H9/105 , H03H9/174 , H03H2009/02173 , H03H2009/02181
摘要： Packaged film bulk acoustic resonators may be tuned after packaging by exposing them to irradiation. In one embodiment, transparent covers may be provided so that the film bulk acoustic resonator filter may be exposed to laser irradiation to either add or remove material from the filter and to thereby adjust its frequency.
摘要翻译：封装膜体积声共振器可以通过将其暴露于照射而在包装之后被调整。在一个实施例中，可以提供透明盖，使得膜体声波谐振器滤波器可以暴露于激光照射以从滤波器添加或去除材料，从而调节其频率。

2. 发明授权

US06943648B2 Methods for forming a frequency bulk acoustic resonator with uniform frequency utilizing multiple trimming layers and structures formed thereby 有权
标题翻译：用于形成具有均匀频率的频率体声波谐振器的方法利用多个修整层和由此形成的结构
公开(公告)号：US06943648B2
公开(公告)日：2005-09-13
申请号：US10428692
申请日：2003-05-01
申请人： Jose Maiz , Li-Peng Wang , Qing Ma , Valluri Rao
发明人： Jose Maiz , Li-Peng Wang , Qing Ma , Valluri Rao
IPC分类号： H03H3/04 , H03H9/17 , H03H9/54
CPC分类号： H03H9/172 , H03H3/04 , H03H2003/0414
摘要： A method of forming a tuned resonator structure by first forming a base resonator structure that comprises a trimming layer on a resonator structure, wherein the trimming layer comprises at least one first low loss acoustic layer on the resonator structure, and at least one second low loss acoustic layer on the first low loss acoustic layer. Then, a “tuned” resonator structure is formed by measuring the frequency of the base resonator structure and removing the number of each of the two different low loss acoustic layers determined to be necessary to achieve the targeted frequency of the base resonator structure, thus improving the frequency control, reliability and performance of the resonating structure.
摘要翻译：一种形成调谐谐振器结构的方法，首先形成一个包括在谐振器结构上的微调层的基本谐振器结构，其中该微调层包括在谐振器结构上的至少一个第一低损失声学层和至少一个第二低损耗声层在第一低损耗声层上。然后，通过测量基底谐振器结构的频率并且去除被确定为实现基本谐振器结构的目标频率所必需的两个不同的低损耗声层中的每一个的数量，形成“调谐”谐振器结构，从而改善谐振结构的频率控制，可靠性和性能。

3. 发明授权

US08551555B2 Biocompatible coatings for medical devices 有权
标题翻译：用于医疗器械的生物相容性涂层
公开(公告)号：US08551555B2
公开(公告)日：2013-10-08
申请号：US11964428
申请日：2007-12-26
申请人： John Burghard , Carmen Campbell , Todd R. Younkin , Markus Kuhn , David Shykind , Jose Maiz
发明人： John Burghard , Carmen Campbell , Todd R. Younkin , Markus Kuhn , David Shykind , Jose Maiz
IPC分类号： A61L33/00
CPC分类号： B82Y30/00 , A61L27/34 , A61L31/10 , A61L2420/02 , B05D1/185 , B05D1/22 , B05D3/044 , B05D3/142 , B05D7/52 , B82Y40/00 , C08L89/04
摘要： Biocompatible coatings for implantable medical devices are disclosed. Embodiments of the invention provide methods for coating an object with a biocompatible coating wherein the device is suspended using a flowing gas during the coating process. Embodiments of the invention provide tropoelastin coatings and methods of creating tropoelastin coatings for implantable medical devices. Optionally, the biocompatible coating can be a drug eluting coating.
摘要翻译：公开了用于可植入医疗装置的生物相容性涂层。本发明的实施例提供了用生物相容性涂层涂覆物体的方法，其中在涂覆过程中使用流动的气体悬挂该装置。本发明的实施方案提供托普拉斯他汀涂层和用于可植入医疗装置的创伤弹力蛋白涂层的方法。任选地，生物相容性涂层可以是药物洗脱涂层。

4. 发明申请

US20070168836A1 Repair bits for a low voltage cache 有权
标题翻译：修复低电压缓存的位
公开(公告)号：US20070168836A1
公开(公告)日：2007-07-19
申请号：US11322988
申请日：2005-12-30
申请人： Morgan Dempsey , Jose Maiz
发明人： Morgan Dempsey , Jose Maiz
IPC分类号： G11C29/00
CPC分类号： G11C29/808 , G11C15/00
摘要： A method and apparatus for repairing cache memories/arrays is described herein. A cache includes a plurality of lines and logically viewable in columns. A repair cache coupled to the cache includes a repair bit mapped to each logically viewable column. A repair module determines a bad bit to be repaired within a column based on any individual or combination of factors, such as the number of errors per line of the cache, the number of errors correctable per line of the cache due to error correction code (ECC), the failure rate of bits, or other considerations. The bad bit is transparently repaired by the repair bit mapped to the column including the bad bit, upon an access to a cache line including the bad bit.
摘要翻译：本文描述了用于修复高速缓冲存储器/阵列的方法和装置。缓存包括多个行，并且可以在列中逻辑地查看。耦合到高速缓存的修复缓存包括映射到每个逻辑可见列的修复位。修复模块基于任何个体或因素组合来确定在列内修复的坏位，例如每个高速缓存行的错误数量，由于错误校正码每行高速缓存可纠错的数量（ ECC），位的故障率或其他考虑。在访问包括坏位的高速缓存行时，坏位被映射到包括坏位的列的修复位透明地修复。

5. 发明申请

US20060043579A1 Transistor performance enhancement using engineered strains 失效
标题翻译：使用工程菌株的晶体管性能提升
公开(公告)号：US20060043579A1
公开(公告)日：2006-03-02
申请号：US10930247
申请日：2004-08-31
申请人： Jun He , Zhiyong Ma , Jose Maiz , Mark Bohr , Martin Giles , Guanghai Xu
发明人： Jun He , Zhiyong Ma , Jose Maiz , Mark Bohr , Martin Giles , Guanghai Xu
IPC分类号： H01L23/34
CPC分类号： H01L29/7842 , H01L21/823807 , H01L23/42 , H01L2224/16 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/01019 , H01L2924/01087 , H01L2924/01322 , H01L2924/10253 , H01L2924/15311 , H01L2924/16152 , H01L2924/00 , H01L2224/0401
摘要： A semiconductor substrate having metal oxide semiconductor (MOS) devices, such as an integrated circuit die, is mechanically coupled to a stress structure to apply a stress that improves the performance of at least a portion of the MOS devices on the die.
摘要翻译：具有诸如集成电路管芯的金属氧化物半导体（MOS）器件的半导体衬底被机械耦合到应力结构，以施加提高模具上的至少一部分MOS器件的性能的应力。

6. 发明授权

US06919637B2 Interconnect structure for an integrated circuit and method of fabrication 失效
标题翻译：集成电路的互连结构和制造方法
公开(公告)号：US06919637B2
公开(公告)日：2005-07-19
申请号：US10261543
申请日：2002-09-30
申请人： Jun He , Jose Maiz , Hyun-Mog Park
发明人： Jun He , Jose Maiz , Hyun-Mog Park
IPC分类号： H01L23/522 , H01L23/532 , H01L29/40
CPC分类号： H01L23/5222 , H01L23/5226 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： An interconnect structure for an integrated circuit having several levels of conductors is disclosed. Dielectric pillars for mechanical support are formed between conductors in adjacent layers at locations that do not have vias. The pillars are particularly useful with low-k ILD or air dielectric.
摘要翻译：公开了一种具有多级导体的集成电路的互连结构。在不具有通孔的位置处，在相邻层中的导体之间形成用于机械支撑的介电柱。支柱对于低k ILD或空气电介质特别有用。

7. 发明申请

US20080105925A1 Process charging and electrostatic damage protection in silicon-on-insulator technology 失效
标题翻译：硅绝缘体技术中的工艺充电和静电损伤保护
公开(公告)号：US20080105925A1
公开(公告)日：2008-05-08
申请号：US11593706
申请日：2006-11-03
申请人： Sangwoo Pae , Jose Maiz
发明人： Sangwoo Pae , Jose Maiz
IPC分类号： H01L27/12
CPC分类号： H01L27/1203 , H01L21/84 , H01L27/1207
摘要： A SOI device features a conductive pathway between active SOI devices and a bulk SOI substrate. The conductive pathway provides the ability to sink plasma-induced process charges into a bulk substrate in the event of process charging, such as interlayer dielectric deposition in a plasma environment, plasma etch deposition, or other fabrication provides. A method is also disclosed which includes dissipating electrostatic and process charges from a top of a SOI device to the bottom of the device. The top and bottom of the SOI device may characterize a region of active devices and a semiconductor method respectively. The method further includes a single masking step to create seed regions for an epitaxial-silicon pathway.
摘要翻译： SOI器件在有源SOI器件和体SOI衬底之间具有导电通路。导电通路提供了在处理充电的情况下（例如等离子体环境中的层间电介质沉积，等离子体蚀刻沉积或其它制造提供）将等离子体诱导的工艺电荷吸收到体衬底中的能力。还公开了一种方法，其包括将静电和处理电荷从SOI器件的顶部消散到器件的底部。 SOI器件的顶部和底部可分别表征有源器件的区域和半导体方法。该方法还包括单个掩模步骤以产生外延硅通路的种子区域。

8. 发明申请

US20080076216A1 Method to fabricate high-k/metal gate transistors using a double capping layer process 审中-公开
标题翻译：使用双层覆盖层工艺制造高k /金属栅极晶体管的方法
公开(公告)号：US20080076216A1
公开(公告)日：2008-03-27
申请号：US11527263
申请日：2006-09-25
申请人： Sangwoo Pae , Jose Maiz , Chetan Prasad
发明人： Sangwoo Pae , Jose Maiz , Chetan Prasad
IPC分类号： H01L21/336
CPC分类号： H01L29/517 , H01L21/28088 , H01L29/4966 , H01L29/66545
摘要： Semiconductor devices and methods to fabricate thereof are described. For an embodiment, a semiconductor device features a double capping layer. The double capping layer may include a first-capping layer and a second-capping layer. The first-capping layer protects a high-k gate dielectric film during a replacement gate process and the second-capping layer protects the first-capping layer during metal deposition. For other embodiments, the first-capping layer prevents the interaction between a polysilicon layer and a high-k gate dielectric film to prevent Vt-pinning of fabricated transistors.
摘要翻译：对半导体装置及其制造方法进行说明。对于一个实施例，半导体器件具有双重覆盖层。双层覆盖层可以包括第一覆盖层和第二覆盖层。第一盖层在替代栅极工艺期间保护高k栅极电介质膜，并且第二覆盖层在金属沉积期间保护第一覆盖层。对于其他实施例，第一覆盖层防止多晶硅层和高k栅极电介质膜之间的相互作用以防止制造的晶体管的栅极。

9. 发明申请

US20060261437A1 Methods of forming electromigration and thermal gradient based fuse structures 有权
公开(公告)号：US20060261437A1
公开(公告)日：2006-11-23
申请号：US11133835
申请日：2005-05-20
申请人： Jose Maiz , Jun He , Mark Bohr
发明人： Jose Maiz , Jun He , Mark Bohr
IPC分类号： H01L29/00
CPC分类号： H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a metallic fuse structure by forming at least one via on a first interconnect structure, lining the at least one via with a barrier layer, and then forming a second interconnect structure on the at least one via.

10. 发明申请

US20090169714A1 BIOCOMPATIBLE COATINGS FOR MEDICAL DEVICES 有权
标题翻译：用于医疗器械的生物涂料
公开(公告)号：US20090169714A1
公开(公告)日：2009-07-02
申请号：US11964428
申请日：2007-12-26
申请人： John Burghard , Carmen Campbell , Todd R. Younkin , Markus Kuhn , David Shykind , Jose Maiz
发明人： John Burghard , Carmen Campbell , Todd R. Younkin , Markus Kuhn , David Shykind , Jose Maiz
IPC分类号： A61L33/12
CPC分类号： B82Y30/00 , A61L27/34 , A61L31/10 , A61L2420/02 , B05D1/185 , B05D1/22 , B05D3/044 , B05D3/142 , B05D7/52 , B82Y40/00 , C08L89/04
摘要： Biocompatible coatings for implantable medical devices are disclosed. Embodiments of the invention provide methods for coating an object with a biocompatible coating wherein the device is suspended using a flowing gas during the coating process. Embodiments of the invention provide tropoelastin coatings and methods of creating tropoelastin coatings for implantable medical devices. Optionally, the biocompatible coating can be a drug eluting coating.
摘要翻译：公开了用于可植入医疗装置的生物相容性涂层。本发明的实施例提供了用生物相容性涂层涂覆物体的方法，其中在涂覆过程中使用流动的气体悬挂该装置。本发明的实施方案提供托普拉斯他汀涂层和用于可植入医疗装置的创伤弹力蛋白涂层的方法。任选地，生物相容性涂层可以是药物洗脱涂层。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式