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1. 发明申请

US20060115979A1 Plasma etch process for multilayer vias having an organic layer with vertical sidewalls 失效
公开(公告)号：US20060115979A1
公开(公告)日：2006-06-01
申请号：US11000832
申请日：2004-11-30
申请人： Donald Weston , William Dauksher , Ngoc Le
发明人： Donald Weston , William Dauksher , Ngoc Le
IPC分类号： H01L21/4763 , H01L21/461
CPC分类号： H01L21/76802 , H01L21/76838 , H01L23/5226 , H01L2924/0002 , H01L2924/00
摘要： A process is provided for fabricating a via 52 between bonded wafers without undercutting an organic bonding material 32. The process for forming the via 52 in a structure including a dielectric material 14 and an organic bonding material 32, comprises forming a resist material 42 on the dielectric layer 14 and etching through the dielectric layer 14 and the organic bonding material 32 with 60CF4/20Ar/60CHF3/20N2. The resist may then be removed with an anisotropic high density oxygen plasma.

2. 发明申请

US20060110914A1 Direct imprinting of etch barriers using step and flash imprint lithography 失效
标题翻译：使用步骤和闪光压印光刻技术直接刻印蚀刻阻挡层
公开(公告)号：US20060110914A1
公开(公告)日：2006-05-25
申请号：US10995800
申请日：2004-11-22
申请人： Kathy Gehoski , William Dauksher , Ngoc Le , Douglas Resnick
发明人： Kathy Gehoski , William Dauksher , Ngoc Le , Douglas Resnick
IPC分类号： H01L21/4763
CPC分类号： G03F7/0002 , B82Y10/00 , B82Y30/00 , B82Y40/00 , H01L21/76814 , H01L21/76838
摘要： A direct imprinting process for Step and Flash Imprint Lithography includes providing (40) a substrate (12); forming (44) an etch barrier layer (14) on the substrate; patterning (46) the etch barrier layer with a template (16) while curing with ultraviolet light through the template, resulting in a patterned etch barrier layer and a residual layer (20) on the substrate; and performing (48) an etch to substantially remove the residual layer. Optionally, a patterning layer (52) may be formed on the substrate (12) prior to forming the etch barrier layer (14). Additionally, an adhesive layer (13) may be applied (42) between the substrate (12) and the etch barrier layer (14).
摘要翻译：步进和闪光印记光刻技术的直接印刷工艺包括提供（40）基材（12）; 在衬底上形成（44）蚀刻阻挡层（14）; 在通过模板的紫外线固化的同时用模板（16）对蚀刻阻挡层进行图案化（46），从而在衬底上产生图案化的蚀刻阻挡层和残余层（20）; 并执行（48）蚀刻以基本上去除残留层。可选地，在形成蚀刻阻挡层（14）之前，可以在衬底（12）上形成图案化层（52）。另外，可以在衬底（12）和蚀刻阻挡层（14）之间施加粘合剂层（13）（42）。

3. 发明申请

US20050277066A1 Selective etch process for step and flash imprint lithography 审中-公开
标题翻译：用于步进和闪光压印光刻的选择性蚀刻工艺
公开(公告)号：US20050277066A1
公开(公告)日：2005-12-15
申请号：US10866563
申请日：2004-06-10
申请人： Ngoc Le , William Dauksher , Doug Resnick
发明人： Ngoc Le , William Dauksher , Doug Resnick
IPC分类号： G03F7/00 , G03F7/36 , G03F7/40 , H01L21/033
CPC分类号： G03F7/405 , B82Y10/00 , B82Y40/00 , G03F7/0002 , H01L21/0337
摘要： A selective etch process for step and flash imprint lithography includes providing (30) a substrate (10); forming (32) a transfer layer (12) on the substrate; forming (34) an etch barrier layer (14) on the transfer layer; patterning (36) the etch barrier layer with a template (16) while curing with ultraviolet light through the template, resulting in a patterned etch barrier layer and a residual layer (20) on the transfer layer; performing (38) an etch to substantially remove the residual layer; and performing (40) an etch with a mixture of nitrogen and hydrogen, and more preferably NH3, to substantially remove the portion of the transfer layer not underlying the etch barrier layer.
摘要翻译：用于步进和快速压印光刻的选择性蚀刻工艺包括提供（30）衬底（10）; 在所述基板上形成（32）转印层（12）; 在所述转移层上形成（34）蚀刻阻挡层（14）; 在通过模板的紫外线固化的同时用模板（16）对蚀刻阻挡层进行图案化（36），从而在转印层上产生图案化的蚀刻阻挡层和残留层（20）; 执行（38）蚀刻以基本上去除残余层; 并且用氮和氢的混合物，更优选地NH 3 3进行（40）蚀刻，以基本上去除不在蚀刻阻挡层下方的转移层的部分。

4. 发明授权

US06357022B1 Testing memory modules on a solder-side adaptor board attached to a PC motherboard 有权
标题翻译：在连接到PC主板的焊接侧适配器板上测试内存模块
公开(公告)号：US06357022B1
公开(公告)日：2002-03-12
申请号：US09686044
申请日：2000-10-11
申请人： Thang Nguyen , Ngoc Le , Benjamin E. Chou
发明人： Thang Nguyen , Ngoc Le , Benjamin E. Chou
IPC分类号： H02H305
CPC分类号： G11C29/028 , G01R31/01 , G01R31/31713 , G01R31/31905 , G11C5/04 , G11C29/56 , G11C29/56016 , G11C2029/5004 , H05K1/141
摘要： Memory modules such as SIMMs and DIMMs are automatically tested by a target-system motherboard such as a PC motherboard. An automated SIMM/DIMM handler is connected to a handler adaptor board that is mounted to the back or solder-side of the PC motherboard. The relatively flat surface of the solder-side of the PC motherboard allows close mounting of the handler. One or more of the SIMM sockets on the motherboard is removed to provide mounting holes for the handler adaptor board. The handler adaptor board provides electrical connection from the module-under-test (MUT) in the handler to the removed SIMM socket on the PC motherboard. The handler adaptor board provides a slight spacing or offset from the solder-side surface of the PC motherboard's substrate, allowing the handler to be plugged directly into tester-connectors on the handler adaptor board. Since the offset of the adaptor board is slight, the length of electrical connections to the handler is short, minimizing the load on the PC's memory bus. A handler controller card that controls the handler is plugged into the PCI or ISA bus on the PC motherboard. Power to the handler adaptor board is cut when a new module is moved into position in the handler, reducing memory-bus upset.
摘要翻译：内存模块（如SIMM和DIMM）由目标系统主板（如PC主板）自动测试。自动SIMM / DIMM处理器连接到安装到PC主板的背面或焊接侧的处理器适配器板。 PC主板的焊料侧的相对平坦的表面允许处理器的紧密安装。卸下主板上的一个或多个SIMM插座，为处理器适配器板提供安装孔。处理器适配器板提供从处理器中的测试模块（MUT）到PC主板上拆卸的SIMM插座的电气连接。处理器适配器板提供与PC主板基板的焊料侧表面稍微间距或偏移，允许处理器直接插入处理器适配器板上的测试仪连接器。由于适配器板的偏移量很小，与处理器的电气连接长度很短，从而使PC内存总线上的负载最小化。控制处理程序的处理程序控制卡插入PC主板上的PCI或ISA总线。当新模块移动到处理器中的位置时，处理器适配器板的电源被切断，从而减少内存总线烦扰。

5. 发明授权

US08176230B2 Wireless flash memory card expansion system 有权
标题翻译：无线闪存卡扩展系统
公开(公告)号：US08176230B2
公开(公告)日：2012-05-08
申请号：US11399975
申请日：2006-04-07
申请人： Ben Wei Chen , Ngoc Le , David Sun
发明人： Ben Wei Chen , Ngoc Le , David Sun
IPC分类号： G06F12/00 , G06F13/14
CPC分类号： G06F13/385 , G06F3/0607 , G06F3/0632 , G06F3/0661 , G06F3/0679 , G06F2213/3814
摘要： A Flash memory card system is disclosed. The Flash memory card system comprises a Flash memory wireless host adapter and a Flash memory bus wireless device. The Flash memory wireless host adapter comprises a Flash memory card connector and a Flash memory controller coupled to the Flash memory card connector. The Flash-52 memory card signals are converted to standard Flash memory internal bus signals by the Flash memory controller. The host adapter further comprises a Flash memory wireless module coupled to the Flash memory controller for receiving and transmitting the standard Flash memory bus signals wirelessly. The Flash-51 memory bus wireless device comprises a Flash memory bus wireless device adapter coupled to a Flash memory. The device adapter is paired to the wireless module for receiving and transmitting the standard Flash memory bus signals wirelessly. A host device storage capacity utilizing the Flash memory card system is expanded.
摘要翻译：公开了一种闪存卡系统。闪存卡系统包括闪存无线主机适配器和闪存总线无线设备。闪存无线主机适配器包括闪存卡连接器和连接到闪存卡连接器的闪存控制器。 Flash-52存储卡信号由闪存控制器转换为标准闪存内部总线信号。主机适配器还包括闪速存储器无线模块，其耦合到闪速存储器控制器，用于无线地接收和发送标准闪存总线信号。 Flash-51存储器总线无线设备包括耦合到闪存的闪存总线无线设备适配器。设备适配器与无线模块配对，用于无线接收和发送标准闪存总线信号。扩展了利用闪存卡系统的主机设备存储容量。

6. 发明授权

US07663939B2 Voltage stabilizer memory module 有权
标题翻译：稳压器内存模块
公开(公告)号：US07663939B2
公开(公告)日：2010-02-16
申请号：US11442818
申请日：2006-05-30
申请人： Henry Nguyen , Ngoc Le
发明人： Henry Nguyen , Ngoc Le
IPC分类号： G11C7/00
CPC分类号： G11C5/14 , G11C5/04 , G11C11/4074
摘要： A memory module is disclosed. The memory module comprises a voltage supply; a memory interface coupled to the voltage supply; a plurality of memory components; and a voltage stabilizer converter (VSC) coupled to the memory interface and to the plurality of memory components, the VSC for ensuring that the plurality of memory components operate at their optimum performance level. A voltage stabilizer memory module (VSMM) in accordance with the present invention includes a printed circuit board (PCB) that contains memory chips, discrete components, a voltage stabilizer converter, and other related components. The voltage stabilizer converter uses system voltage supply as its input and its output is the voltage supply for the DRAM components. Accordingly, the VSSM is more adaptable, more stable and has better performance than conventional memory modules.
摘要翻译：公开了一种存储器模块。存储器模块包括电压源; 耦合到电压源的存储器接口; 多个存储器组件; 以及耦合到存储器接口和多个存储器组件的稳压器转换器（VSC），VSC用于确保多个存储器组件以其最佳性能水平运行。根据本发明的稳压器存储器模块（VSMM）包括包含存储器芯片的印刷电路板（PCB），分立元件，稳压器转换器和其它相关元件。稳压器转换器采用系统电压作为输入，其输出为DRAM组件的电源。因此，VSSM比传统的内存模块更适应，更稳定，性能更好。

7. 发明授权

US07209310B1 Disk drive identifying starting track by performing multiple load operations 有权
标题翻译：通过执行多个加载操作来识别启动轨的磁盘驱动器
公开(公告)号：US07209310B1
公开(公告)日：2007-04-24
申请号：US11188947
申请日：2005-07-25
申请人： Chun Sei Tsai , Ngoc Le , Jenghung Chen , Hien Chu
发明人： Chun Sei Tsai , Ngoc Le , Jenghung Chen , Hien Chu
IPC分类号： G11B21/02
CPC分类号： G11B5/59633
摘要： A disk drive is disclosed comprising a disk having a plurality of servo sectors defining a plurality of servo tracks, wherein each servo sector comprises a track address identifying a corresponding servo track. A head is actuated over the disk, and a ramp is positioned near an outer diameter of the disk, wherein an edge of the ramp extends over a plurality of the servo tracks. The head is loaded from the ramp onto the disk, and a track address in at least one of the servo sectors is detected and stored. The process is repeated a number of times, and then a starting track proximate an outer diameter of the disk is identified in response to the detected and stored track addresses.
摘要翻译：公开了一种磁盘驱动器，其包括具有限定多个伺服磁道的多个伺服扇区的磁盘，其中每个伺服扇区包括标识对应的伺服磁道的磁道地址。头部被驱动在盘上，并且斜面位于盘的外径附近，其中斜坡的边缘在多个伺服轨道上延伸。头部从斜坡加载到盘上，并且检测并存储至少一个伺服扇区中的轨道地址。该过程重复多次，然后响应于检测和存储的轨道地址识别靠近盘的外径的起始轨迹。

8. 发明申请

US20060205009A1 Methods of assessing endothelial dysfunction using acute transient responese following fat administration 有权
标题翻译：使用脂肪施用后使用急性瞬时呼吸者评估内皮功能障碍的方法
公开(公告)号：US20060205009A1
公开(公告)日：2006-09-14
申请号：US10527510
申请日：2003-09-11
申请人： Ngoc Le , W. Virgil Brown
发明人： Ngoc Le , W. Virgil Brown
IPC分类号： G01N33/53
CPC分类号： G01N33/6854 , G01N33/6893 , G01N33/92 , G01N2800/044 , G01N2800/324 , G01N2800/52
摘要： The present invention provides methods utilizing the fat-induced antibody response (FIAR) to assess endothelial function. Additional methods are provided that utilize FIAR for diagnosing and monitoring the progression of vascular diseases, the success of treatment for these diseases, and as a measure of the oxidative stress imposed upon vascular endothelium. Still more methods are provided for measuring the oxidation products of lipids in blood following the administration of a polyunsaturated fatty acid (fat-induced acute response) to monitor the treatment success of a vascular disease, for monitoring the degree of endothelial inflammation, and for diagnosing and monitoring the progression of a cardiovascular disease.
摘要翻译：本发明提供利用脂肪诱导的抗体应答（FIAR）来评估内皮功能的方法。提供了另外的方法，其利用FIAR来诊断和监测血管疾病的进展，这些疾病的治疗成功以及施加在血管内皮上的氧化应激的量度。在给予多不饱和脂肪酸（脂肪诱导的急性反应）后，还提供了用于测量血液中脂质氧化产物的更多方法，以监测血管疾病的治疗成功，用于监测内皮炎症的程度，并用于诊断并监测心血管疾病的进展。

9. 发明授权

US06178526B1 Testing memory modules with a PC motherboard attached to a memory-module handler by a solder-side adaptor board 失效
标题翻译：测试内存模块，PC主板通过焊接侧适配器板连接到内存模块处理器
公开(公告)号：US06178526B1
公开(公告)日：2001-01-23
申请号：US09056973
申请日：1998-04-08
申请人： Thang Nguyen , Ngoc Le , Benjamin E. Chou
发明人： Thang Nguyen , Ngoc Le , Benjamin E. Chou
IPC分类号： H02H305
CPC分类号： G11C29/028 , G01R31/01 , G01R31/31713 , G01R31/31905 , G11C5/04 , G11C29/56 , G11C29/56016 , G11C2029/5004 , H05K1/141
摘要： Memory modules such as SIMMs and DIMMs are automatically tested by a target-system motherboard such as a PC motherboard. An automated SIMM/DIMM handler is connected to a handler adaptor board that is mounted to the back or solder-side of the PC motherboard. The relatively flat surface of the solder-side of the PC motherboard allows close mounting of the handler. One or more of the SIMM sockets on the motherboard is removed to provide mounting holes for the handler adaptor board. The handler adaptor board provides electrical connection from the module-under-test (MUT) in the handler to the removed SIMM socket on the PC motherboard. The handler adaptor board provides a slight spacing or offset from the solder-side surface of the PC motherboard's substrate, allowing the handler to be plugged directly into tester-connectors on the handler adaptor board. Since the offset of the adaptor board is slight, the length of electrical connections to the handler is short, minimizing the load on the PC's memory bus. A handler controller card that controls the handler is plugged into the PCI or ISA bus on the PC motherboard. Power to the handler adaptor board is cut when a new module is moved into position in the handler, reducing memory-bus upset.
摘要翻译：内存模块（如SIMM和DIMM）由目标系统主板（如PC主板）自动测试。自动SIMM / DIMM处理器连接到安装到PC主板的背面或焊接侧的处理器适配器板。 PC主板的焊料侧的相对平坦的表面允许处理器的紧密安装。卸下主板上的一个或多个SIMM插座，为处理器适配器板提供安装孔。处理器适配器板提供从处理器中的测试模块（MUT）到PC主板上拆卸的SIMM插座的电气连接。处理器适配器板提供与PC主板基板的焊料侧表面稍微间距或偏移，允许处理器直接插入处理器适配器板上的测试仪连接器。由于适配器板的偏移量很小，与处理器的电气连接长度很短，从而使PC内存总线上的负载最小化。控制处理程序的处理程序控制卡插入PC主板上的PCI或ISA总线。当新模块移动到处理器中的位置时，处理器适配器板的电源被切断，从而减少内存总线烦扰。

10. 发明授权

US08667191B2 Managing and indentifying multiple memory storage devices 有权
标题翻译：管理和识别多个内存存储设备
公开(公告)号：US08667191B2
公开(公告)日：2014-03-04
申请号：US12688792
申请日：2010-01-15
申请人： Choon-Tak Tang , Chin-Tang Yen , Ngoc Le , David Sun
发明人： Choon-Tak Tang , Chin-Tang Yen , Ngoc Le , David Sun
IPC分类号： G06F13/00 , G06F13/36 , G06F13/20
CPC分类号： G06F13/387 , G06F3/0679
摘要： A management hub is disclosed. The management hub comprises an interface; a master hub controller coupled to the interface; a plurality of ports coupled to the master hub controller; a microcontroller coupled to the master hub controller; and hub setting switch and a slave hub controller coupled to the microcontroller and the plurality of ports. The management hub also includes a memory device coupled to the microcontroller, the memory device including a hidden drive information partition and a hidden drive organizer partition for managing and identifying information in various drives coupled to the plurality of ports, wherein when the management hub is first connected to a host system the drives are displayed in an inactive state.
摘要翻译：公布了一个管理中心。管理中心包括一个接口; 耦合到所述接口的主集线器控制器; 耦合到主集线器控制器的多个端口; 耦合到主集线器控制器的微控制器; 和集线器设置开关以及耦合到微控制器和多个端口的从属集线器控制器。管理集线器还包括耦合到微控制器的存储器设备，该存储器设备包括隐藏的驱动器信息分区和用于管理和识别耦合到多个端口的各种驱动器中的信息的隐藏的驱动器组织器分区，其中当管理集线器第一时连接到主机系统，驱动器显示为非活动状态。

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