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1. 发明专利

JP2009071152A Compound ic 审中-公开
标题翻译：化学IC
公开(公告)号：JP2009071152A
公开(公告)日：2009-04-02
申请号：JP2007239543
申请日：2007-09-14
申请人： Denso Corp , Toyota Central R&D Labs Inc , 株式会社デンソー , 株式会社豊田中央研究所
发明人： HATSUTORI YOSHIKUNI , KUWABARA MAKOTO , UESUGI TSUTOMU , KIGAMI MASAHITO , KANECHIKA MASAKAZU , OKUNO TAKUYA
IPC分类号： H01L27/08 , H01L21/76 , H01L21/762 , H01L21/8234 , H01L21/8249 , H01L27/06 , H01L27/088 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To provide a compound IC which improves a LDMOS transistor prepared therein in a tradeoff relation existing between an on-state resistance and a breakdown voltage.
SOLUTION: The compound IC 10 includes a LDMOS transistor 20 in at least one of a plurality of island regions divided by a trench insulated separation portion 50 including a first embedded conductor 52 covered with a first side wall oxidation film 54. The compound IC 10 is provided with trench portions 60 which are provided in the island region and each of which includes a second embedded conductor 62 opposite to a side of a body region 28 between a side of a drift region 22 of the LDMOS transistor 20 and/or a source region 26, and the drift region 22, through a second side wall oxidation film 64. The first embedded conductor 52 of the trench insulated separation portion 50 and the second embedded conductor 62 of the trench portion 60 are electrically isolated. The trench insulated separation portion 50 and the trench portion 60 are formed in the same manufacturing process.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种化合物IC，其以存在于导通状态电阻和击穿电压之间的权衡关系改进其中制备的LDMOS晶体管。解决方案：复合IC 10包括由包括被第一侧壁氧化膜54覆盖的第一嵌入式导体52的沟槽绝缘分离部分50划分的多个岛状区域中的至少一个中的LDMOS晶体管20.化合物 IC 10设置有沟槽部分60，其设置在岛状区域中，并且每个沟槽部分包括与LDMOS晶体管20的漂移区域22的侧面之间的体区28的一侧相对的第二嵌入导体62和/或源极区域26和漂移区域22通过第二侧壁氧化膜64.沟槽绝缘分离部分50的第一嵌入导体52和沟槽部分60的第二嵌入导体62被电隔离。沟槽绝缘分离部分50和沟槽部分60在相同的制造过程中形成。版权所有（C）2009，JPO＆INPIT

2. 发明专利

JP2008054280A Driving circuit for transistor 有权
标题翻译：驱动电路用于晶体管
公开(公告)号：JP2008054280A
公开(公告)日：2008-03-06
申请号：JP2007073381
申请日：2007-03-20
申请人： Denso Corp , Toyota Central R&D Labs Inc , 株式会社デンソー , 株式会社豊田中央研究所
发明人： HATSUTORI YOSHIKUNI , KUWABARA MAKOTO , OKADA KYOKO , MIZUNO SHOJI , AOKI TAKAAKI , TAKAHASHI SHIGEKI , AKAGI NOZOMI , NAKANO TAKASHI
IPC分类号： H03K17/08 , H01L21/822 , H01L27/04 , H03K17/06 , H03K17/695
摘要： PROBLEM TO BE SOLVED: To overcome a trade-off relationship between a surge voltage and a turn-off loss that exists within a transition time period for turning off a transistor, in a circuit for driving the transistor. SOLUTION: A driving circuit 10 comprises a variable resistor R12 that is electrically connected to a gate electrode G of a transistor 20. A width of a current path of the variable resistor R12 is controlled by a depletion layer which is expandable in accordance with a drain-source voltage Vds of the transistor 20. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：在用于驱动晶体管的电路中，克服在用于关断晶体管的转变时间段内存在的浪涌电压和关断损耗之间的权衡关系。解决方案：驱动电路10包括电连接到晶体管20的栅电极G的可变电阻器R12。可变电阻器R12的电流通路的宽度由耗尽层控制，该耗尽层根据具有晶体管20的漏 - 源电压Vds。版权所有（C）2008，JPO＆INPIT

3. 发明专利

JP2009081276A Field-effect transistor 审中-公开
标题翻译：场效应晶体管
公开(公告)号：JP2009081276A
公开(公告)日：2009-04-16
申请号：JP2007249549
申请日：2007-09-26
申请人： Denso Corp , Toyota Central R&D Labs Inc , 株式会社デンソー , 株式会社豊田中央研究所
发明人： KUWABARA MAKOTO , HATSUTORI YOSHIKUNI , UESUGI TSUTOMU , KIGAMI MASAHITO , KANECHIKA MASAKAZU , OKUNO TAKUYA
IPC分类号： H01L29/786 , H01L21/336
摘要： PROBLEM TO BE SOLVED: To provide a technology capable of obtaining an FET with small on-state resistance without reducing a breakdown voltage.
SOLUTION: An FET 10 has: a drift region 6 which contains a first conductivity-type dopant in a low concentration; a source region 22 which contains the first conductivity-type dopant in a high concentration; a body region 26 which contains a second conductivity-type dopant in a low concentration and is in contact with the drift region 6 in such a manner that the source region 22 is included; a drain region 8 which contains the first conductivity-type dopant in a high concentration and is separated from the body region 26 by the drift region 6; a gate electrode 16 which faces the body region 26 through an insulating layer 18; a buried insulating layer 4 which is in contact with the bottom face of the drift region 6; and a conductive region 2 which is in contact with the bottom face of the buried insulating layer 4.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够在不降低击穿电压的情况下获得具有小导通电阻的FET的技术。解决方案：FET10具有：漂移区6，其含有低浓度的第一导电型掺杂剂; 源极区22，其包含高浓度的第一导电型掺杂剂; 体区26，其包含低浓度的第二导电型掺杂剂，并且以包括源极区22的方式与漂移区6接触; 漏极区8，其包含高浓度的第一导电型掺杂剂，并通过漂移区6与体区26分离; 通过绝缘层18面向主体区域26的栅电极16; 与漂移区域6的底面接触的埋入绝缘层4; 以及与掩埋绝缘层4的底面接触的导电区域2.版权所有（C）2009，JPO＆INPIT

4. 发明专利

JP2008067140A Switching circuit 有权
标题翻译：切换电路
公开(公告)号：JP2008067140A
公开(公告)日：2008-03-21
申请号：JP2006243832
申请日：2006-09-08
申请人： Denso Corp , Toyota Central R&D Labs Inc , 株式会社デンソー , 株式会社豊田中央研究所
发明人： HATSUTORI YOSHIKUNI , KUWABARA MAKOTO , OKADA KYOKO , MIZUNO SHOJI , AOKI TAKAAKI , TAKAHASHI SHIGEKI , AKAGI NOZOMI , NAKANO TAKASHI
IPC分类号： H03K17/16 , H03K17/687
摘要： PROBLEM TO BE SOLVED: To provide a switching circuit of a transistor in which an increase in surge voltage is suppressed.
SOLUTION: The switching circuit 10 is provided with: a transistor 50 which is used by serially connecting a power source 80 and a load 70 between a drain electrode D and a source electrode; a control circuit 40 which outputs drive voltage Vin to the transistor; and a serial circuit 30 which is connected between a gate electrode G and the drain electrode D of the transistor 50 and in which a first capacitor 32 and a first diode 34 are serially connected with each other. A cathode of the first diode 34 is connected on the side of the gate electrode G of the transistor 50 and an anode of the first diode 34 is connected on the side of the drain electrode D of the transistor 50. The switching circuit 10 is further provided with a voltage regulator circuit 20 which is connected to a connection line between the first capacitor 32 and the first diode 34 and adjusts voltage of the connection line.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供抑制浪涌电压增加的晶体管的开关电路。解决方案：开关电路10设置有：晶体管50，其通过串联连接电源80和漏电极D与源电极之间的负载70而使用; 将驱动电压Vin输出到晶体管的控制电路40; 以及串联电路30，其连接在晶体管50的栅极电极G和漏极电极D之间，并且其中第一电容器32和第一二极管34彼此串联连接。第一二极管34的阴极连接在晶体管50的栅极电极G的一侧，第一二极管34的阳极连接在晶体管50的漏电极D侧。另外，开关电路10 设置有电压调节器电路20，其连接到第一电容器32和第一二极管34之间的连接线，并且调节连接线的电压。版权所有（C）2008，JPO＆INPIT

5. 发明专利

JP2008235592A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2008235592A
公开(公告)日：2008-10-02
申请号：JP2007073320
申请日：2007-03-20
申请人： Denso Corp , Toyota Central R&D Labs Inc , 株式会社デンソー , 株式会社豊田中央研究所
发明人： AKAGI NOZOMI , TAKAHASHI SHIGEKI , NAKANO TAKASHI , HIGUCHI YASUSHI , FUJII TETSUO , HATSUTORI YOSHIKUNI , KUWABARA MAKOTO
IPC分类号： H01L21/8234 , H01L21/822 , H01L27/04 , H01L27/06 , H01L27/088 , H01L29/78 , H01L29/786
CPC分类号： H01L29/7817 , H01L27/0738 , H01L29/0696 , H01L29/41758 , H01L29/42368 , H01L29/435 , H01L29/4933 , H01L29/7824 , H01L29/7835
摘要： PROBLEM TO BE SOLVED: To provide a small and low-cost semiconductor device especially using a lateral MOS transistor which can perform high-speed switching by which overshoot of drain voltage can be reduced and increase in noise and switching loss can be suppressed.
SOLUTION: The semiconductor device 100 is made by forming the lateral MOS transistor 21 on the surface layer of a semiconductor substrate 10. A polycrystal silicon resistor 50 of conductivity opposite to the drain (D) of the lateral MOS transistor 21 is interposed in a gate driving signal line of the lateral MOS transistor 21. Drain voltage of the lateral MOS transistor 21 is applied to the polycrystal silicon resistor 50 through an insulating film 4.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种小型和低成本的半导体器件，特别是使用可以进行能够降低漏极电压的过冲并且可以抑制噪声和开关损耗增加的高速开关的横向MOS晶体管。解决方案：半导体器件100通过在半导体衬底10的表面层上形成横向MOS晶体管21制成。与横向MOS晶体管21的漏极（D）相反的导电性的多晶硅电阻器50被插入在横向MOS晶体管21的栅极驱动信号线中。横向MOS晶体管21的漏极电压通过绝缘膜4施加到多晶硅电阻器50上。（C）2009，JPO＆INPIT

6. 发明专利

JP2008060468A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2008060468A
公开(公告)日：2008-03-13
申请号：JP2006237766
申请日：2006-09-01
申请人： Denso Corp , Toyota Central R&D Labs Inc , 株式会社デンソー , 株式会社豊田中央研究所
发明人： TAKAHASHI SHIGEKI , NAKANO TAKASHI , AKAGI NOZOMI , HIGUCHI YASUSHI , FUJII TETSUO , HATSUTORI YOSHIKUNI , KUWABARA MAKOTO , OKADA KYOKO
IPC分类号： H01L27/06 , H01L21/822 , H01L21/8234 , H01L27/04 , H01L29/78 , H01L29/786
CPC分类号： H01L27/0727 , H01L29/0696 , H01L29/0878 , H01L29/42356 , H01L29/42368 , H01L29/4238 , H01L29/7817 , H01L29/7821
摘要： PROBLEM TO BE SOLVED: To provide a compact and inexpensive semiconductor device which is suitable for configuration of a switching circuit, and wherein a lateral MOS transistor capable of fast switching is formed and switching loss and surge voltage (noise) can be suppressed at the same time. SOLUTION: In the semiconductor device, the lateral MOS transistor LTa, a Zener diode ZDa and a capacitance element Ca are formed on a surface layer part of a semiconductor substrate. The Zener diode ZDa and the capacitance element Ca are directly connected between a drain D and a gate G of the lateral MOS transistor LTa, thereby the semiconductor device 101 is constituted. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供适合于配置开关电路的紧凑且便宜的半导体器件，并且其中形成能够快速切换的横向MOS晶体管，并且可以抑制开关损耗和浪涌电压（噪声）与此同时。解决方案：在半导体器件中，横向MOS晶体管LTa，齐纳二极管ZDa和电容元件Ca形成在半导体衬底的表面层部分上。齐纳二极管ZDa和电容元件Ca直接连接在横向MOS晶体管LTa的漏极D和栅极G之间，从而构成半导体器件101。版权所有（C）2008，JPO＆INPIT

7. 发明专利

JP2007180116A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2007180116A
公开(公告)日：2007-07-12
申请号：JP2005374170
申请日：2005-12-27
申请人： Denso Corp , Toyota Central Res & Dev Lab Inc , 株式会社デンソー , 株式会社豊田中央研究所
发明人： HATSUTORI YOSHIKUNI , OKADA KYOKO , YAMAUCHI SHOICHI , YAMAGUCHI HITOSHI
IPC分类号： H01L29/78 , H01L29/861
CPC分类号： H01L29/7813 , H01L29/0634 , H01L29/0878 , H01L29/1095 , H01L29/36
摘要： PROBLEM TO BE SOLVED: To reduce the temperature dependency of on-state resistance of a vertical MOSFET.
SOLUTION: In the super-junction structure wherein an n-type column and a p-type column are repeated, the width of a column where a carrier passes through is 4.5 μm or less, and the concentration of impurity of the column where the carrier passes through is adjusted to be lower than a concentration satisfying the reduced surface field. Thus, assuming that on-state resistance at 27°C is R1 and that at 150°C is R2, R2/R1 is less than 1.8 times, and the temperature dependency of resistance can be made low and circuit characteristic be also stabilized. Furthermore, the necessity of keeping the temperature of the semiconductor device constant can be reduced, and a cooling device can be greatly simplified.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：降低垂直MOSFET的导通电阻的温度依赖性。解决方案：在重复n型柱和p型柱的超结结构中，载流子通过的柱的宽度为4.5μm以下，柱的杂质浓度载体通过的位置被调节为低于满足减小的表面场的浓度。因此，假设27℃下的导通电阻为R1，在150℃为R2时，R2 / R1小于1.8倍，电阻的温度依赖性可以降低，电路特性也稳定。此外，可以降低保持半导体器件的温度恒定的必要性，并且可以极大地简化冷却器件。版权所有（C）2007，JPO＆INPIT

8. 发明专利

JP2004356577A Manufacturing method of semiconductor device, semiconductor substrate, and semiconductor device manufactured with them 有权
标题翻译：半导体器件的制造方法，半导体衬底和与其制造的半导体器件
公开(公告)号：JP2004356577A
公开(公告)日：2004-12-16
申请号：JP2003155451
申请日：2003-05-30
申请人： Denso Corp , Toyota Central Res & Dev Lab Inc , 株式会社デンソー , 株式会社豊田中央研究所
发明人： SUZUKI MIKIMASA , HATSUTORI YOSHIKUNI , NAKAJIMA KYOKO
IPC分类号： H01L21/66 , H01L21/336 , H01L21/78 , H01L29/06 , H01L29/12 , H01L29/739 , H01L29/78 , H01L29/861
CPC分类号： H01L29/7813 , H01L21/78 , H01L29/0634 , H01L29/7802
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device, to provide a semiconductor substrate whose manufacturing cost is reduced by abolishing alignment to a pn column without forming an additional layer, in manufacture of the semiconductor device of high breakdown voltage/low on-resistance having the pn column, and to provide a low-cost semiconductor device manufactured with them.
SOLUTION: This method comprises: a forming step for forming the pn column which has a strip shape in a cross-sectional surface of a substrate, and further has a repeat pattern of p-conductive types and n-conductive types in a substrate surface, extending over the entire region 1pn in a semiconductor substrate 1 where a plurality of the same semiconductor substrates 100 are formed; a step for forming a residual component of a plurality of the same semiconductor devices 100 in the region 1pn in which the repeat pattern exists, with the pn column as a part of the component of the semiconductor device 100; and a step for cutting individual semiconductor device 100 into a chip from the region 1pn where a plurality of the same semiconductor devices 100 are formed.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了提供一种制造半导体器件的方法，提供一种通过在不形成附加层的情况下通过消除与pn列的取向而降低其制造成本的半导体衬底，在制造高分解的半导体器件具有pn列的电压/低导通电阻，并提供与它们一起制造的低成本半导体器件。解决方案：该方法包括：形成步骤，用于形成在衬底的横截面中具有条形的pn柱，并且还具有p导电类型和n导电类型的重复图案衬底表面，在形成有多个相同的半导体衬底100的半导体衬底1中在整个区域1pn上延伸; 在pn列作为半导体器件100的一部分的部分中，形成存在重复图案的区域1pn中的多个相同半导体器件100的残留分量的步骤; 以及从形成多个相同半导体器件100的区域1pn将各个半导体器件100切割成芯片的步骤。版权所有（C）2005，JPO＆NCIPI

9. 发明专利

JP2007288774A Power mos circuit which realizes both low switching loss and low noise 有权
标题翻译：功率MOS电路实现了两个低开关损耗和低噪声
公开(公告)号：JP2007288774A
公开(公告)日：2007-11-01
申请号：JP2007074030
申请日：2007-03-22
申请人： Denso Corp , Toyota Central Res & Dev Lab Inc , 株式会社デンソー , 株式会社豊田中央研究所
发明人： KUWABARA MAKOTO , HATSUTORI YOSHIKUNI , OKADA KYOKO , MIZUNO SHOJI , AOKI TAKAAKI
IPC分类号： H03K17/16 , H01L21/822 , H01L21/8234 , H01L27/04 , H01L27/06 , H01L29/78 , H03F1/26 , H03K17/56 , H03K17/687
摘要： PROBLEM TO BE SOLVED: To restrain a surge voltage in a switching circuit including an MOSFET.
SOLUTION: A switching circuit 100 includes an MOSFET 30 which controls a drain current by a control voltage input to a gate terminal. A drain terminal of the MOSFET 30 is connected to an anode terminal of a diode 40 via a capacitor 42, and a gate terminal of the MOSFET 30 is connected to a cathode terminal of the diode 40.
COPYRIGHT: (C)2008,JPO&INPIT

10. 发明专利

JP2006073615A Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2006073615A
公开(公告)日：2006-03-16
申请号：JP2004252463
申请日：2004-08-31
申请人： Denso Corp , Toyota Central Res & Dev Lab Inc , 株式会社デンソー , 株式会社豊田中央研究所
发明人： HATSUTORI YOSHIKUNI , NAKAJIMA KYOKO , YAMAGUCHI HITOSHI , MAKINO TOMOATSU
IPC分类号： H01L29/78 , H01L21/336 , H01L29/06 , H01L29/47 , H01L29/872
CPC分类号： H01L29/7813 , H01L29/0634 , H01L29/0696 , H01L29/41741 , H01L29/66734 , H01L29/7811
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device capable of accepting variation in the quantity of impurities which is unavoidable when manufacturing SJ structure, and assuring a wanted breakdown strength, and to provide a method of manufacturing the semiconductor device at good yield.
SOLUTION: The semiconductor device comprises a central region 12 where a semiconductor switching element is formed, and a peripheral region 14 formed around the central region 12. It comprises a drift layer 26 having SJ structure which is formed from the central region 12 to the peripheral region 14. Relating to a difference in the quantity of impurities at a p-type column and that of an n-type column constituting a pair, the difference in the pair positioned at the outermost periphery of the peripheral region 14 (25b and 27b)is smaller than the difference in the other pair positioned at the peripheral region 14 (25a and 27a). The difference in the pair positioned at the innermost periphery of the peripheral region 14 (25a and 27a) is larger than the pair positioned in the central region 12 (25 and 27).
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种能够接受在制造SJ结构时不可避免的杂质量的变化并确保想要的击穿强度的半导体器件，并提供以良好的收率制造半导体器件的方法。解决方案：半导体器件包括形成半导体开关元件的中心区域12和围绕中心区域12形成的周边区域14.它包括具有SJ结构的漂移层26，该漂移层26由中心区域12形成关于p型柱和构成一对的n型列的杂质量的差异，位于周边区域14（25b）的最外周的一对的差异和27b）小于位于周边区域14（25a和27a）的另一对中的差的差。位于周边区域14（25a和27a）的最内周的对中的差大于位于中心区域12（25和27）中的一对。版权所有（C）2006，JPO＆NCIPI

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