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1. 发明专利

JP2007005516A Semiconductor device and manufacturing method therefor 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2007005516A
公开(公告)日：2007-01-11
申请号：JP2005182905
申请日：2005-06-23
申请人： Denso Corp , Toyota Central Res & Dev Lab Inc , 株式会社デンソー , 株式会社豊田中央研究所
发明人： KUWABARA MAKOTO , HATSUTORI YOSHIKUNI , YAMAUCHI SHOICHI , MAKINO TOMOATSU
IPC分类号： H01L29/78 , H01L29/06
CPC分类号： H01L29/0634 , H01L29/1095 , H01L29/402 , H01L29/41741 , H01L29/66734 , H01L29/7811 , H01L29/7813 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device in which an SJ (superjunction) structure is formed on both cell region and termination region, and pressure resistance in the cell region is adjusted higher than that in the termination region. SOLUTION: The semiconductor device 10 comprises a resurb layer 29 which is formed on the surface of a semiconductor intermediate layer 26 in the termination region 16, a termination contact semiconductor region 48 which is formed on the part of surface of the resurb layer 29 on the cell region 14 side, a field oxide film 36 which is so formed on the part the of the surface of the resurb layer 29 opposite to the cell region 14 side relative to the termination contact semiconductor region 48 that is adjusted to be thinner on the cell region 14 side and thicker in opposite to the cell region 14 side, and a field plate 53 which extends from the surface of the termination contact semiconductor region 48 across a thin layer field oxide film 32 to the surface of a thin layer field oxide film 34. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种在单元区域和终端区域上形成SJ（超结））结构的半导体器件，并且将单元区域中的耐压性调整为高于端接区域中的耐压性。解决方案：半导体器件10包括形成在终端区域16中的半导体中间层26的表面上的再现层29，形成在再现层的表面的一部分上的端接触半导体区域48 在单元区域14侧具有一个场致氧化膜36，该场氧化物膜36形成在相对于终端接触半导体区域48的相对于单元区域14侧的表面的部分上，被调整为更薄在单元区域14侧并且与单元区域14侧相对较厚的场板53以及从端接触半导体区域48的表面穿过薄层场氧化膜32延伸到薄层场的表面的场板53 氧化膜34.版权所有（C）2007，JPO＆INPIT

2. 发明专利

JP2006073615A Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2006073615A
公开(公告)日：2006-03-16
申请号：JP2004252463
申请日：2004-08-31
申请人： Denso Corp , Toyota Central Res & Dev Lab Inc , 株式会社デンソー , 株式会社豊田中央研究所
发明人： HATSUTORI YOSHIKUNI , NAKAJIMA KYOKO , YAMAGUCHI HITOSHI , MAKINO TOMOATSU
IPC分类号： H01L29/78 , H01L21/336 , H01L29/06 , H01L29/47 , H01L29/872
CPC分类号： H01L29/7813 , H01L29/0634 , H01L29/0696 , H01L29/41741 , H01L29/66734 , H01L29/7811
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device capable of accepting variation in the quantity of impurities which is unavoidable when manufacturing SJ structure, and assuring a wanted breakdown strength, and to provide a method of manufacturing the semiconductor device at good yield.
SOLUTION: The semiconductor device comprises a central region 12 where a semiconductor switching element is formed, and a peripheral region 14 formed around the central region 12. It comprises a drift layer 26 having SJ structure which is formed from the central region 12 to the peripheral region 14. Relating to a difference in the quantity of impurities at a p-type column and that of an n-type column constituting a pair, the difference in the pair positioned at the outermost periphery of the peripheral region 14 (25b and 27b)is smaller than the difference in the other pair positioned at the peripheral region 14 (25a and 27a). The difference in the pair positioned at the innermost periphery of the peripheral region 14 (25a and 27a) is larger than the pair positioned in the central region 12 (25 and 27).
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种能够接受在制造SJ结构时不可避免的杂质量的变化并确保想要的击穿强度的半导体器件，并提供以良好的收率制造半导体器件的方法。解决方案：半导体器件包括形成半导体开关元件的中心区域12和围绕中心区域12形成的周边区域14.它包括具有SJ结构的漂移层26，该漂移层26由中心区域12形成关于p型柱和构成一对的n型列的杂质量的差异，位于周边区域14（25b）的最外周的一对的差异和27b）小于位于周边区域14（25a和27a）的另一对中的差的差。位于周边区域14（25a和27a）的最内周的对中的差大于位于中心区域12（25和27）中的一对。版权所有（C）2006，JPO＆NCIPI

3. 发明专利

JP2008103623A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2008103623A
公开(公告)日：2008-05-01
申请号：JP2006286445
申请日：2006-10-20
申请人： Denso Corp , 株式会社デンソー
发明人： SANO YUKIHIRO , KONDO ICHIJI , SAKAMOTO ZENJI , TOMISAKA MANABU , MAKINO TOMOATSU
IPC分类号： H01L23/473
CPC分类号： H01L2224/48091 , H01L2224/73265 , H01L2924/1305 , H01L2924/13055 , H01L2924/00014 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device having a cooling structure whose cooling efficiency is high. SOLUTION: A semiconductor device 100 comprises a power mold 10 and ceramic tubes 21, 22 of the both sides. The power mold 10 has a power element 15, and a pair of lead frames 12, 13 which sandwiches the power element, and exposes the outside surface of the lead frames 12, 13, and is molded by a resin 18. The ceramic tubes 21, 22 have cooling medium passages 23, 24 where cooling medium flows, and are jointed to the outside surface of the lead frames 12, 13 through metals 25, 26 for joint. Two opposite walls of the cooling medium passages 23, 24 of the ceramic tubes 21, 22 are different in thickness, and a wall with thin thickness is jointed to the outer surface of the lead frames 12, 13. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种具有冷却效率高的冷却结构的半导体器件。解决方案：半导体器件100包括电源模具10和两侧的陶瓷管21,22。电动模具10具有功率元件15和一对引线框架12,13，它们夹住功率元件，并且暴露引线框架12,13的外表面，并由树脂18模制。陶瓷管21 22具有冷却介质流动的冷却介质通道23,24，并且通过用于接合的金属25,26连接到引线框架12,13的外表面。陶瓷管21,22的冷却介质通道23,24的两个相对的壁的厚度不同，并且具有薄的厚度的壁与引线框架12,13的外表面接合。版权所有（C））2008，JPO＆INPIT

4. 发明专利

JP2005317905A Method for manufacturing semiconductor substrate 有权
标题翻译：制造半导体基板的方法
公开(公告)号：JP2005317905A
公开(公告)日：2005-11-10
申请号：JP2004352010
申请日：2004-12-03
申请人： Denso Corp , Sumco Corp , 株式会社Sumco , 株式会社デンソー
发明人： YAMAUCHI SHOICHI , YAMAGUCHI HITOSHI , MAKINO TOMOATSU , NOGAMI SHOJI , YAMAOKA TOMONORI
IPC分类号： H01L29/06 , H01L21/20 , H01L21/205 , H01L21/336 , H01L21/338 , H01L21/8234 , H01L29/78
CPC分类号： H01L29/7813 , H01L21/823487 , H01L29/0634
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor substrate capable of suppressing blocking at a trench opening by an epitaxial film in a new configuration, and enhancing embedding in a trench. SOLUTION: The trench 4 is formed on silicon substrates (1, 2) before the epitaxial layer 23 is formed on the silicon substrates (1, 2) including the bottom and side surfaces of the trench 4 to embed the inside of the trench 4 with the epitaxial film 23. At least in the final process for embedding when the inside of the trench 4 is embedded with the epitaxial layer 23, a mixed gas of silicon source gas and halide gas is used as gas supplied to the silicon substrates to form the epitaxial film. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种能够以新的结构抑制外延膜在沟槽开口处的阻挡并提高在沟槽中的嵌入的半导体衬底的制造方法。解决方案：在外延层23形成在包括沟槽4的底表面和侧表面的硅衬底（1,2）上之前，沟槽4形成在硅衬底（1,2）上，以嵌入具有外延膜23的沟槽4.至少在沟槽4的内部嵌有外延层23时嵌入的最终工艺中，硅源气体和卤化物气体的混合气体被用作提供给硅衬底的气体以形成外延膜。版权所有（C）2006，JPO＆NCIPI

5. 发明专利

JP2004241400A Semiconductor device 有权
公开(公告)号：JP2004241400A
公开(公告)日：2004-08-26
申请号：JP2003025786
申请日：2003-02-03
申请人： Denso Corp , 株式会社デンソー
发明人： OTA SHINJI , TAKENAKA HISANORI , ISHIKAWA TAKESHI , MAKINO TOMOATSU
IPC分类号： H01L23/12
CPC分类号： H01L24/32 , H01L2224/73265 , H01L2224/83138 , H01L2924/01029 , H01L2924/15787 , H01L2924/181 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To obtain a semiconductor device is constituted by mounting a semiconductor chip, through solder resist, on the surface of an interposer substrate partially coated with the solder resist at the wiring section wherein concentration of stress on the solder resist is reduced by altering the arrangement of the solder resist and the wiring section. SOLUTION: The semiconductor device is provided with the interposer substrate 10 where the surface of the wiring sections 11, 12 and 13 are coated partially with the solder resist 15, and the semiconductor chip 20 mounted on the surface of the interposer substrate 10 through the solder resist 15 wherein an intermediate layer 40 having a thermal expansion coefficient between those of the semiconductor chip 20 and the solder resist 15 is interposed between them. COPYRIGHT: (C)2004,JPO&NCIPI

6. 发明专利

JP2008113025A Electric apparatus 审中-公开
标题翻译：电器
公开(公告)号：JP2008113025A
公开(公告)日：2008-05-15
申请号：JP2007327058
申请日：2007-12-19
申请人： Denso Corp , Nippon Soken Inc , 株式会社デンソー , 株式会社日本自動車部品総合研究所
发明人： YOSHIDA TAKAHIKO , SHIOZAWA MASAHIRO , HASHIKAWA ATSUSHI , YORINAGA MUNEO , HIRAI YASUYOSHI , NOMURA KAZUHITO , MAKINO TOMOATSU
IPC分类号： H01L23/34 , H01L23/36 , H01L23/48
CPC分类号： H01L2924/0002 , H01L2924/13055 , H01L2924/19041 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To reduce electric resistance and heat resistance between a main electrode surface and an electrode plate of a semiconductor element in a pressure-welded type semiconductor device that is used in such a state that the main electrode surface of the semiconductor element is pressure-welded by the electrode plate. SOLUTION: A heating element 1 is sandwiched between a pair of electrode members 8 having a heat buffering function for buffering the heat of this heating element 1 and an electrode function for extracting electrical signals from the heating element 1. In an electric apparatus with the outside of these electrode members 8 sandwiched between a pair of heat dissipating members 4, the portion at which each electrode member 8 and heat dissipating member 4 are opposed to each other is provided with an insulating layer 9 that is integrally deposited on the surface of either the electrode member 8 or the heat dissipating member 4. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了降低在这样的状态下使用的压焊型半导体器件中的半导体元件的主电极表面和电极板之间的电阻和耐热性，即，半导体元件被电极板压焊。解决方案：加热元件1夹在具有用于缓冲该加热元件1的热量的热缓冲功能的一对电极构件8和用于从加热元件1提取电信号的电极功能之间。在电气设备这些电极构件8的外侧夹在一对散热构件4之间，每个电极构件8和散热构件4彼此相对的部分设置有绝缘层9，其一体地沉积在表面上电极构件8或散热构件4。版权所有（C）2008，JPO＆INPIT

7. 发明专利

JP2007027565A Manufacturing method of semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：JP2007027565A
公开(公告)日：2007-02-01
申请号：JP2005210210
申请日：2005-07-20
申请人： Denso Corp , 株式会社デンソー
发明人： TOMISAKA MANABU , SANO YUKIHIRO , MIZUNO YOSHIAKI , KONDO ICHIJI , MAKINO TOMOATSU
IPC分类号： H01L21/304 , B23D1/02
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device capable of suppressing fluctuation in element characteristics which is caused by static electricity occurring at grinding for insulating separation between electrodes.
SOLUTION: A metal film 4 formed on the entire surface of a wafer is formed on the surface of a protective film 3 while the metal film 4 is formed by deposition, spatter, or vapor deposition, so that an unrequired part of the metal film 4 is removed along with a part of the protective film 3. At that time, removing of the unrequired part is performed by machining using a grounded bite 10. So, the static electricity that occurs at grinding and electric charges generated when the protective film 3 or the like is cut off are absorbed through the bite 10, resulting in preventing a semiconductor element from being charged.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：解决的问题：提供能够抑制在研磨时产生的静电引起的元件特性波动的半导体器件的制造方法，用于电极之间的绝缘分离。解决方案：在保护膜3的表面上形成在晶片的整个表面上的金属膜4，同时通过沉积，溅射或气相沉积形成金属膜4，使得不需要的部分金属膜4与保护膜3的一部分一起被去除。此时，通过使用接地咬合机10的机械加工来去除不需要的部件。因此，在研磨时发生的静电和当保护性切断的薄膜3等被咬入10吸收，从而防止半导体元件带电。版权所有（C）2007，JPO＆INPIT

8. 发明专利

JP2008214146A Apparatus and method for producing silicon carbide single crystal 有权
标题翻译：用于生产碳化硅单晶的装置和方法
公开(公告)号：JP2008214146A
公开(公告)日：2008-09-18
申请号：JP2007055500
申请日：2007-03-06
申请人： Denso Corp , 株式会社デンソー
发明人： NAGAKUBO MASAO , MAKINO TOMOATSU
IPC分类号： C30B29/36 , C30B25/14
摘要： PROBLEM TO BE SOLVED: To provide a method for obtaining an SiC single crystal ingot having superior quality and a long size.
SOLUTION: A silicon carbide single crystal 10 is grown by using a producing apparatus equipped with a plurality of gas introducing pipes 4a to introduce a mixed gas only to the center part 7a in the center part 7a and a periphery part 7b positioning around the center part on the crystal growing surface of a seed crystal 7 and a plurality of gas introducing pipes 4b to introduce the mixed gas only to the periphery part 7b in the center part 7a and the periphery part 7b and by increasing the ratio of the flow rate of a mixed gas flowing in the gas introducing pipes 4a for the center part to the total flow rate of the mixed gas flowing simultaneously in the gas introducing pipes 4a for the center part and gas introducing pipes 4b for the peripheral part along with the increase of the crystal growth of the silicon carbide single crystal 10.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种获得具有优良品质和长尺寸的SiC单晶锭的方法。解决方案：通过使用配备有多个气体导入管4a的制造装置来生长碳化硅单晶10，以将混合气体仅引导到中心部分7a中的中心部分7a和周围部分7b 种子晶体7的晶体生长表面上的中心部分和多个气体导入管4b，以将混合气体仅引导到中心部分7a和周边部分7b中的周边部分7b，并且通过增加流体的比例在中心部分的气体引入管4a中流动的混合气体的速率与在中心部分的气体导入管4a中同时流动的混合气体的总流量以及周边部分的气体导入管4b一起增加的碳化硅单晶10的晶体生长。版权所有（C）2008，JPO＆INPIT

9. 发明专利

JP2007035926A Semiconductor device and method of manufacturing same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2007035926A
公开(公告)日：2007-02-08
申请号：JP2005217014
申请日：2005-07-27
申请人： Denso Corp , 株式会社デンソー
发明人： TOMISAKA MANABU , FUKAYA AKINARI , NIIMI AKIHIRO , MAKINO TOMOATSU , KONDO ICHIJI
IPC分类号： H01L21/768 , H01L21/28 , H01L21/3205 , H01L23/52 , H01L23/522
摘要： PROBLEM TO BE SOLVED: To prevent two or more electrodes from being short-circuited to each other by burrs, in a method of manufacturing a semiconductor device wherein a metal film is divided into pieces by removing the metal film and a protective film by machining so as to form the electrodes.
SOLUTION: The metal film 4 is formed by deposition, sputtering, or evaporation so as to prevent a corrosive medium from penetrating through a gap between the metal film 4 and the protective film 3. The metal film 4 is formed on all the surface of a wafer over the surface of the protective film 3, and thereafter the disused part of the metal film 4 is removed together with a part of the protective film 3. At this point, the disused part of the metal film 4 is removed by machining using a bite 10, the contact hole 3a of the protective film 3 is kept as a tapered plane so that the metal film 4 is tilted, and the various electrodes 4a can be prevented from being short-circuited to each other even if the burrs of the metal film 4 occur during machining.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了防止两个或更多个电极通过毛刺相互短路，在制造半导体器件的方法中，其中通过去除金属膜将金属膜分割成多个片和保护膜通过机械加工形成电极。解决方案：通过沉积，溅射或蒸发形成金属膜4，以防止腐蚀性介质穿过金属膜4和保护膜3之间的间隙。金属膜4形成在所有在保护膜3的表面上的晶片表面，然后与保护膜3的一部分一起去除金属膜4的废弃部分。此时，金属膜4的废弃部分被除去使用咬入口10加工，保护膜3的接触孔3a保持为锥形平面，使得金属膜4倾斜，并且可以防止各种电极4a彼此短路，即使毛刺的金属膜4发生在加工过程中。版权所有（C）2007，JPO＆INPIT

10. 发明专利

DE10257203B8 Lastansteuerungsschaltung unter Verwendung einer Freilaufdiode 未知
公开(公告)号：DE10257203B8
公开(公告)日：2012-12-13
申请号：DE10257203
申请日：2002-12-06
申请人： DENSO CORP
发明人： MIURA SHOJI , MAKINO TOMOATSU , SUZUKI FUMINARI
IPC分类号： H01L29/861 , H03K17/16 , H02M1/08 , H02M7/48 , H03K17/082 , H03K17/695

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