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    • 7. 发明授权
    • Process for forming high aspect ratio circuit features
    • 用于形成高纵横比电路特征的方法
    • US6020261A
    • 2000-02-01
    • US323256
    • 1999-06-01
    • Douglas H. Weisman
    • Douglas H. Weisman
    • H01L21/3213H01L21/48H01L21/768H05K3/00H05K3/10B44C1/22
    • H01L21/4846H01L21/76885H05K3/108H01L21/32139H05K2203/0554H05K3/0041
    • A method of forming high resolution circuit features on a substrate. A `seed` layer of copper (110) is deposited on a dielectric substrate (100). A dielectric layer (120) is then deposited on the copper layer, and an aluminum `mask` layer (130) is deposited on the dielectric layer. A photoresist layer (140) is spun on or laminated to the aluminum. The photoresist layer is imaged and developed to define a circuit pattern such that portions (230) of the aluminum `mask` layer are revealed, and these revealed portions are further etched so as to reveal portions (320) of the dielectric layer that are directly underneath. The remaining portions of the photoresist layer are stripped away, along with the revealed underlying portions of the dielectric film, exposing portions (410) of the copper layer in the image of the circuit pattern. The remaining portions of the aluminum mask are then removed, and the exposed copper is then electroplated to form the desired circuit traces (600). The remaining portions of the dielectric layer are stripped to expose the unplated portions of the copper layer, and these unplated portions are etched away with acid.
    • 一种在衬底上形成高分辨率电路特征的方法。 铜(110)的“晶种”层沉积在电介质基片(100)上。 然后在铜层上沉积电介质层(120),并在电介质层上沉积铝掩模层(130)。 光致抗蚀剂层(140)在铝上旋转或层压在铝上。 光致抗蚀剂层被成像和显影以限定电路图案,使得铝掩模层的部分(230)被露出,并且这些透露部分被进一步蚀刻以便露出直接地介电层的部分(320) 下。 光致抗蚀剂层的剩余部分与电介质膜的透明下层部分一起被剥离,在电路图案的图像中暴露铜层的部分(410)。 然后去除铝掩模的剩余部分,然后电镀暴露的铜以形成所需的电路迹线(600)。 剥离电介质层的剩余部分以露出铜层的未镀层部分,并且用酸蚀刻掉这些未镀层的部分。