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    • 3. 发明授权
    • Selection of filter coefficients for tranceiver non-linearity signal cancellation
    • 滤波器系数的选择用于收发器非线性信号消除
    • US07957456B2
    • 2011-06-07
    • US11725528
    • 2007-03-19
    • Dariush DabiriJose Tellado
    • Dariush DabiriJose Tellado
    • H04B1/38H03H7/40
    • H04B1/525H03H17/0261H04L25/03038
    • Embodiments of a method and apparatus for selecting coefficients of a non-linear filter are disclosed. The non-linear filter receives a transmit signal and generates a non-linear replica signal of a transmit DAC of a transceiver. The method include applying a plurality of periodic test pattern signals to inputs of the transmit DAC, wherein the periodic test pattern signals include a stream of symbols. Receive symbols are collected at an output of a receiver ADC of the transceiver resulting from the plurality of periodic test pattern signals. A non-linear map is generated that provides a value for each of n consecutive symbols input to the transmit DAC. Coefficients of the non-linear filter are selected based on the non-linear map.
    • 公开了一种用于选择非线性滤波器系数的方法和装置的实施例。 非线性滤波器接收发射信号并产生收发器的发射DAC的非线性复制信号。 该方法包括将多个周期性测试模式信号应用于发射DAC的输入,其中周期性测试模式信号包括符号流。 在多个周期性测试图形信号产生的收发器的接收器ADC的输出端收集接收符号。 生成非线性映射,为输入到发送DAC的n个连续符号中的每一个提供一个值。 基于非线性映射来选择非线性滤波器的系数。
    • 5. 发明授权
    • Low-power receiver decoding
    • 低功耗接收机解码
    • US07747923B2
    • 2010-06-29
    • US10926699
    • 2004-08-26
    • Dariush DabiriJose Tellado
    • Dariush DabiriJose Tellado
    • H03M13/00
    • H03M13/37H04L1/0045H04L1/0057
    • Embodiments of a method and apparatus for a transceiver decoding an Ethernet signal. The method includes receiving an Ethernet bit stream. The bit stream is at least one of low-complexity decoded by a low-complexity decoder of the transceiver or high-complexity decoded by a high-complexity decoder of the transceiver. If the bit stream fails a low-complexity decoding test, then the bit stream is high-complexity decoded. The low-complexity decoding and high complexity decoding are iteratively repeated until the bit stream passes the low-complexity decoding test.
    • 用于收发器解码以太网信号的方法和装置的实施例。 该方法包括接收以太网比特流。 比特流是由收发器的低复杂度解码器解码的低复杂度中的至少一个或由收发器的高复杂度解码器解码的高复杂度的至少一个。 如果比特流失败了低复杂度的解码测试,则比特流是高复杂度的解码。 迭代重复低复杂度解码和高复杂度解码,直到比特流通过低复杂度解码测试。
    • 6. 发明申请
    • Selection of filter coefficients for tranceiver non-linearity signal cancellation
    • 滤波器系数的选择用于收发器非线性信号消除
    • US20080233903A1
    • 2008-09-25
    • US11725528
    • 2007-03-19
    • Dariush DabiriJose Tellado
    • Dariush DabiriJose Tellado
    • H03C1/62
    • H04B1/525H03H17/0261H04L25/03038
    • Embodiments of a method and apparatus for selecting coefficients of a non-linear filter are disclosed. The non-linear filter receives a transmit signal and generates a non-linear replica signal of a transmit DAC of a transceiver. The method include applying a plurality of periodic test pattern signals to inputs of the transmit DAC, wherein the periodic test pattern signals include a stream of symbols. Receive symbols are collected at an output of a receiver ADC of the transceiver resulting from the plurality of periodic test pattern signals. A non-linear map is generated that provides a value for each of n consecutive symbols input to the transmit DAC. Coefficients of the non-linear filter are selected based on the non-linear map.
    • 公开了一种用于选择非线性滤波器系数的方法和装置的实施例。 非线性滤波器接收发射信号并产生收发器的发射DAC的非线性复制信号。 该方法包括将多个周期性测试模式信号应用于发射DAC的输入,其中周期性测试模式信号包括符号流。 在多个周期性测试图形信号产生的收发器的接收器ADC的输出端收集接收符号。 生成非线性映射,为输入到发送DAC的n个连续符号中的每一个提供一个值。 基于非线性映射来选择非线性滤波器的系数。
    • 8. 发明授权
    • Efficient decoding
    • 高效解码
    • US08234550B2
    • 2012-07-31
    • US12613627
    • 2009-11-06
    • Dariush DabiriNitin Barot
    • Dariush DabiriNitin Barot
    • H03M13/00H03M13/03
    • H03M13/1137H03M13/1111H03M13/114H03M13/616
    • A decoder includes circuitry for generating bits representing received signals, and beliefs representing an associated reliability of each bit. A bit node computation block receives the bits and associated beliefs, and generates a plurality of bit node messages. A plurality of M serially-connected pipeline stages receive the bit node messages and after M decoding cycles, and generate a plurality of check node messages once per decoding cycle, wherein for each iteration cycle, each of the M serially-connected pipeline stages performs check node computations using all of J component codes, wherein each one of the M serially-connected pipeline stages performs check node computations once per decoding cycle using a single component code that is different that component codes used for all other of the M serially-connected pipeline stages, wherein J is at least as great as M, and wherein each iteration includes M decoding cycles.
    • 解码器包括用于产生表示接收信号的比特的电路,以及表示每个比特的相关可靠性的信念。 比特节点计算块接收比特和相关联的信念,并且生成多个比特节点消息。 多个M个串行连接的流水线级接收比特节点消息,并且在M个解码周期之后,并且每解码周期生成多个校验节点消息,其中对于每个迭代周期,每个M个串行连接的流水线级执行检查 使用所有J个分量代码的节点计算,其中M个串行连接的流水线级中的每一个使用不同于用于所有其他M个串行连接的流水线的分量代码来执行每个解码周期一次的校验节点计算 其中J至少与M一样大,并且其中每个迭代包括M个解码周期。