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1. 发明授权

US06506676B2 Method of manufacturing semiconductor devices with titanium aluminum nitride work function 有权
标题翻译：制造具有钛氮化铝功能的半导体器件的方法
公开(公告)号：US06506676B2
公开(公告)日：2003-01-14
申请号：US10033509
申请日：2001-12-27
申请人： Dae Gyu Park , Tae Ho Cha , Se Aug Jang , Heung Jae Cho , Tae Kyun Kim , Kwan Yong Lim , In Seok Yeo , Jin Won Park
发明人： Dae Gyu Park , Tae Ho Cha , Se Aug Jang , Heung Jae Cho , Tae Kyun Kim , Kwan Yong Lim , In Seok Yeo , Jin Won Park
IPC分类号： H01L2144
CPC分类号： H01L21/28194 , C23C14/048 , C23C16/34 , H01L21/28556 , H01L21/823842 , H01L29/4966 , H01L29/513 , H01L29/518
摘要： A method of manufacturing semiconductor devices forms a surface channel CMOSFET in the process of manufacturing a metal gate. The method forms a (TixAly)1-zNz film (where z ranges from about 0.0 to about 0.2) having a work function value ranging from about 4.2 to about 4.3 eV on a gate insulating film in a nMOS region, a (TixAly)1-zNz film (where z ranges from about 0.3 to about 0.6) having a work function value ranging from about 4.8 to about 5.0 eV on the gate insulating film in a pMOS region, thus implementing a surface channel CMOS device both in the nMOS region and the pMOS region. Therefore, the threshold voltage is reduced.
摘要翻译：制造半导体器件的方法在制造金属栅极的过程中形成表面沟道CMOSFET。该方法在nMOS区域的栅极绝缘膜上形成具有约4.2至约4.3eV的功函数值的（TixAly）1-zNz膜（其中z范围为约0.0至约0.2），（TixAly）1 -zNz膜（其中z范围为约0.3至约0.6），在pMOS区域中的栅极绝缘膜上具有约4.8至约5.0eV的功函数值，从而在nMOS区域和 pMOS区域。因此，阈值电压降低。

2. 发明授权

US06537901B2 Method of manufacturing a transistor in a semiconductor device 失效
公开(公告)号：US06537901B2
公开(公告)日：2003-03-25
申请号：US09887511
申请日：2001-06-25
申请人： Tae Ho Cha , Se Aug Jang , Tae Kyun Kim , Dea Gyu Park , In Seok Yeo , Jin Won Park
发明人： Tae Ho Cha , Se Aug Jang , Tae Kyun Kim , Dea Gyu Park , In Seok Yeo , Jin Won Park
IPC分类号： H01L213205
CPC分类号： C23C16/34 , C23C14/0641 , H01L21/28079 , H01L21/28088 , H01L21/2855 , H01L21/28556 , H01L21/28562 , H01L21/28568 , H01L21/823828 , H01L29/4958 , H01L29/4966
摘要： There is disclosed a method of manufacturing a transistor in a semiconductor device. The present invention forms a Ta film or a TaNx film at a low temperature or forms a first TaNx film in which the composition(x) of nitrogen is 0.45˜0.55, on a gate insulating film in a NMOS region, so that the work function becomes 4.0˜4.4 eV, and also forms a Ta film or a TaNx film at a high temperature or forms a second TaNx film in which the composition(x) of nitrogen is 0.6˜1.4 is formed, on a gate insulating film in a PMOS region, so that the work function becomes 4.8˜5.2 eV. Thus, the present invention can lower the threshold voltage by implementing a surface channel CMOS device both in the NMOS region and the PMOS region.

3. 发明授权

US08643088B2 Semiconductor device and method for forming the same 有权
标题翻译：半导体装置及其形成方法
公开(公告)号：US08643088B2
公开(公告)日：2014-02-04
申请号：US12957100
申请日：2010-11-30
申请人： Jin Won Park
发明人： Jin Won Park
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L23/34
CPC分类号： H01L27/10876 , H01L29/66666
摘要： The present invention relates to a semiconductor device and a method of manufacture thereof, particularly, to a semiconductor device including a vertical type gate and a method of forming the same. According to the present invention, a semiconductor device includes a vertical pillar which is protruded from a semiconductor substrate, has a vertical channel, and has a first width; an insulating layer which has a second width smaller than the first width, provided in both sides of the vertical pillar which is adjacent in a first direction; and a nitride film provided in a side wall of the insulating layer.
摘要翻译：半导体器件及其制造方法技术领域本发明涉及一种半导体器件及其制造方法，特别涉及包括垂直型栅极的半导体器件及其形成方法。根据本发明，半导体器件包括从半导体衬底突出的垂直柱，具有垂直沟道，并具有第一宽度; 绝缘层，其具有比所述第一宽度小的第二宽度，设置在所述垂直柱的在第一方向上相邻的两侧; 以及设置在绝缘层的侧壁中的氮化物膜。

4. 发明申请

US20090108398A1 Fuse of Semiconductor Device and Method for Forming the Same 审中-公开
标题翻译：半导体器件保险丝及其形成方法
公开(公告)号：US20090108398A1
公开(公告)日：2009-04-30
申请号：US12147730
申请日：2008-06-27
申请人： Young Jin Choi , Jin Won Park
发明人： Young Jin Choi , Jin Won Park
IPC分类号： H01L23/525 , H01L21/44
CPC分类号： H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要： A fuse in a semiconductor device includes: first and second fuse patterns, each being in the shape of a bar, separated from each other in a blowing region; first and second contact plugs respectively coupled to the first and the second fuse patterns; and a third fuse pattern coupled to the first and the second fuse patterns through the first and the second contact plugs.
摘要翻译：半导体器件中的熔丝包括：第一和第二熔丝图案，每个都是棒状，在吹风区域彼此分离; 分别耦合到第一和第二熔丝图案的第一和第二接触插塞; 以及通过第一和第二接触插塞耦合到第一和第二熔丝图案的第三熔丝图案。

5. 发明授权

US08941604B2 Touch window obtaining coordinate position on boundary portion of view area and method thereof 有权
标题翻译：触摸窗口获得视野区边界部分的坐标位置及其方法
公开(公告)号：US08941604B2
公开(公告)日：2015-01-27
申请号：US13362111
申请日：2012-01-31
申请人： Jin Won Park
发明人： Jin Won Park
IPC分类号： G06F3/041 , G06F3/044 , H03K17/96
CPC分类号： G06F3/0418 , G06F3/044 , H03K2017/9602 , H03K2217/960755
摘要： Provided is a touch window including an upper substrate including a first extension portion from which a first transparent electrode having a first pattern in one direction is extended to an outside of the boundary portion of a view area, and a lower substrate including a second extension portion from which a second transparent electrode having a second pattern in orthogonal direction to the one direction is extended to an outside of the boundary portion of a view area in the orthogonal direction.
摘要翻译：提供了一种触摸窗，其包括上基板，该上基板包括第一延伸部，第一透明电极在一个方向上具有第一图案，从该第一延伸部延伸到视区的边界部分的外侧，下基板包括第二延伸部具有与该一个方向正交的第二图案的第二透明电极从正方向延伸到视野区域的边界部分的外侧。

6. 发明授权

US06207506B1 Nonvolatile memory and method for fabricating the same 有权
标题翻译：非易失存储器及其制造方法
公开(公告)号：US06207506B1
公开(公告)日：2001-03-27
申请号：US09348463
申请日：1999-07-07
申请人： Sang Bae Yi , Jin Won Park , Sung Chul Lee
发明人： Sang Bae Yi , Jin Won Park , Sung Chul Lee
IPC分类号： H01L21335
CPC分类号： H01L21/28282 , H01L29/792
摘要： Nonvolatile memory capable of programming and erasure and method for fabricating the same, the method comprising the steps of (1) forming an oxide film on a first conduction type semiconductor substrate, (2) conducting an annealing in an NO or N2O ambient to convert the oxide film into a vertical lamination of a first silicon oxynitride region containing nitrogen and a second silicon oxynitride region containing relatively less nitrogen compared to the first silicon oxynitride region formed on the substrate, (3) patterning a gate electrode on the second oxynitride region, (4) forming second conduction type source, and drain impurity diffusion regions in surfaces of the substrate on both sides of the gate electrode, whereby facilitating a simple and easy fabrication process, a low programming voltage, a high performance, and a high device reliability.
摘要翻译：能够编程和擦除的非易失性存储器及其制造方法，所述方法包括以下步骤：（1）在第一导电型半导体衬底上形成氧化膜，（2）在NO或N2O环境中进行退火以将氧化膜形成垂直叠层的第一氮氧化物区域和与形成在衬底上的第一氧氮化硅区域相比氮含量相对较少的第二氮氧化硅区域，（3）在第二氧氮化物区域上形成栅电极的图案（ 4）形成第二导电型源极，并且在栅电极两侧的衬底表面中漏极杂质扩散区域，从而简化制造工艺，低编程电压，高性能和高器件可靠性。

7. 发明授权

US6141785A Error control method for multiparty multimedia communications 有权
标题翻译：多方多媒体通信的错误控制方法
公开(公告)号：US6141785A
公开(公告)日：2000-10-31
申请号：US145736
申请日：1998-09-02
申请人： Chung Ho Hur , Chong Won Park , Jin Won Park
发明人： Chung Ho Hur , Chong Won Park , Jin Won Park
IPC分类号： H04L12/24 , H04L1/18 , H04L12/26 , G08C25/00
CPC分类号： H04L1/18
摘要： The present invention relates to the error control method in inter-multi-user multimedia communication. There are error detection, error reporting and error recovery functions in the conventional error control method which finds out and solve the error occurring at the time of data transmission between transmitter and receiver, however, these functions are an error control method occurring in end-to-end communication consisting of one transmitter and one receiver and are not appropriate to solving errors occurring concurrently and in a bundle between one or some transmitters and many receivers in many-to-many multiple points inter-multi-user communication such as multimedia communication. Therefore, the present invention uses the damping technique to minimize the number of error control packets of which all the receiver having sensed the error concurrently request the resend based on the NACK.
摘要翻译：本发明涉及多用户多媒体通信中的错误控制方法。在传统的误差控制方法中存在错误检测，错误报告和错误恢复功能，发现和解决了发射机和接收机之间的数据传输时发生的错误，但这些功能是一种错误控制方法， - 由一个发射机和一个接收机组成的通信，并不适合解决多对多用户通信（如多媒体通信）中多个到多个多点同时发生的一个或多个发射机与许多接收机之间的并发发生的错误。因此，本发明使用阻尼技术来最小化所有接收机已经感知出错误的错误控制分组的数量，同时基于NACK请求重新发送。

8. 发明授权

US08111389B2 Method of inspecting defects in circuit pattern of substrate 有权
标题翻译：检查基板电路图形缺陷的方法
公开(公告)号：US08111389B2
公开(公告)日：2012-02-07
申请号：US12717688
申请日：2010-03-04
申请人： Seung Seoup Lee , Tak Gyum Kim , Jin Won Park
发明人： Seung Seoup Lee , Tak Gyum Kim , Jin Won Park
IPC分类号： G01N21/00
CPC分类号： G01N21/95684 , G01R31/309
摘要： Disclosed herein is a method of inspecting defects in a circuit pattern of a substrate. At least one laser beam radiation unit for radiating a laser beam onto an inspection target circuit pattern of a substrate in a non-contact manner is prepared. A probe beam radiation unit for radiating a probe beam onto a connection circuit pattern to be electrically connected to the inspection target circuit pattern in a non-contact manner is prepared. The laser beam is radiated onto the inspection target circuit pattern using the laser beam radiation unit. The probe beam is radiated onto the connection circuit pattern using the probe beam radiation unit, thus measuring information about whether the probe beam is diffracted, and a diffraction angle. Accordingly, the method can solve problems such as erroneous measurements caused by contact pressure and can reduce the time required for measurements.
摘要翻译：本文公开了一种检查基板的电路图案中的缺陷的方法。制备用于以非接触方式将激光束照射到基板的检查对象电路图案上的至少一个激光束辐射单元。准备用于以不接触的方式将探测光束照射到连接电路图案以电连接到检查对象电路图案的探测光束辐射单元。使用激光束辐射单元将激光束照射到检查对象电路图案上。使用探测光束辐射单元将探测光束照射到连接电路图案上，从而测量关于探针光束是否衍射的信息和衍射角。因此，该方法可以解决诸如由接触压力引起的误差测量等问题，并且可以减少测量所需的时间。

9. 发明授权

US6043167A Method for forming low dielectric constant insulating film 失效
标题翻译：低介电常数绝缘膜的形成方法
公开(公告)号：US6043167A
公开(公告)日：2000-03-28
申请号：US947503
申请日：1997-10-10
申请人： Young Hie Lee , Dong Sun Kim , Jin Won Park
发明人： Young Hie Lee , Dong Sun Kim , Jin Won Park
IPC分类号： C23C16/42 , C23C16/30 , C23C16/50 , C23C16/517 , H01L21/31 , H01L21/312 , H01L21/314 , H01L21/316 , H01L21/768 , H01L21/469
CPC分类号： C23C16/517 , C23C16/30 , H01L21/3127 , H01L21/314 , Y10S438/958
摘要： The method for forming an insulating film having a low dielectric constant, which is suitable for intermetal insulating film applications, by plasma enhanced chemical vapor deposition (PECVD) includes the step of supplying a first source gas containing fluorine and carbon to a dual-frequency, high density plasma reactor. The method also includes the step of supplying a second source gas containing silicon dioxide to the reactor. In this manner a fluorocarbon/silicon dioxide film is formed on a substrate in the reactor.
摘要翻译：通过等离子体增强化学气相沉积（PECVD）形成适合于金属间绝缘膜应用的具有低介电常数的绝缘膜的方法包括将含有氟和碳的第一源气体供应到双频，高密度等离子体反应器。该方法还包括向反应器供应含有二氧化硅的第二源气体的步骤。以这种方式，在反应器中的基底上形成碳氟化合物/二氧化硅膜。

10. 发明申请

US20110247186A1 METHOD OF MANUFACTURING MULTILAYER CERAMIC CAPACITOR 审中-公开
标题翻译：制造多层陶瓷电容器的方法
公开(公告)号：US20110247186A1
公开(公告)日：2011-10-13
申请号：US12982218
申请日：2010-12-30
申请人： Sang Yong Yu , Jin Won Park , Tak Gyum Kim
发明人： Sang Yong Yu , Jin Won Park , Tak Gyum Kim
IPC分类号： H01G7/00
CPC分类号： H01G4/304 , H01G4/012 , H01G4/08 , Y10T29/435
摘要： A method of manufacturing a multilayer ceramic capacitor includes forming a base dielectric layer, forming a unit ceramic capacitor by alternately depositing internal dielectric layers and internal electrode layers on a top surface of the base dielectric layer, and stacking another unit ceramic capacitor on the unit ceramic capacitor, wherein the number of unit ceramic capacitors being stacked is two or more.
摘要翻译：一种制造多层陶瓷电容器的方法包括：形成基底电介质层，通过在基底电介质层的顶表面上交替地沉积内部电介质层和内部电极层，形成单位陶瓷电容器，并将另一个单位陶瓷电容器堆叠在单位陶瓷上电容器，其中堆叠的单位陶瓷电容器的数量为两个或更多个。

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