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1. 发明授权

US07499309B1 Using organic semiconductor memory in conjunction with a MEMS actuator for an ultra high density memory 有权
标题翻译：将有机半导体存储器与用于超高密度存储器的MEMS致动器结合使用
公开(公告)号：US07499309B1
公开(公告)日：2009-03-03
申请号：US10817186
申请日：2004-04-02
申请人： Colin Bill , Michael A. VanBuskirk , Tzu-Ning Fang
发明人： Colin Bill , Michael A. VanBuskirk , Tzu-Ning Fang
IPC分类号： G11C11/00
CPC分类号： G11B9/04 , B82Y10/00 , G11B9/1436 , G11B9/149 , G11C11/5664 , G11C13/00 , G11C13/0014 , G11C13/0016 , G11C23/00
摘要： A metal sulfide based non-volatile memory device is provided herein. The device is comprised of a substrate, a backplane, a planar memory media including a dense array of metal sulfide based memory cells, and a MEMS probe based actuator. The cells of the memory device are operative to be of two or more states corresponding to various levels of impedance. The MEMS actuator is operable to position micro/nano probes over the appropriate cells to enable reading, writing, and erasing the memory cells by applying a bias voltage.
摘要翻译：本文提供了基于金属硫化物的非易失性存储器件。该器件由衬底，背板，包括基于金属硫化物的存储单元的密集阵列的平面存储介质和基于MEMS探针的致动器组成。存储器件的单元可操作以对应于各种阻抗级别的两个或多个状态。 MEMS致动器可操作以将微/纳米探针定位在适当的单元上，以通过施加偏置电压来读取，写入和擦除存储器单元。

2. 发明授权

US06943370B2 Control of memory arrays utilizing zener diode-like devices 有权
标题翻译：使用齐纳二极管状器件来控制存储器阵列
公开(公告)号：US06943370B2
公开(公告)日：2005-09-13
申请号：US10882538
申请日：2004-06-30
申请人： Michael A. VanBuskirk , Colin Bill , Tzu-Ning Fang , Zhida Lan
发明人： Michael A. VanBuskirk , Colin Bill , Tzu-Ning Fang , Zhida Lan
IPC分类号： G11C11/56 , G11C13/02 , G11C16/02 , H01L51/00
CPC分类号： G11C13/0014 , B82Y10/00 , G11C11/5664 , G11C13/0016 , G11C13/003 , G11C2213/71 , G11C2213/72 , G11C2213/77
摘要： The present invention facilitates semiconductor devices by aiding the efficiency in the way individual devices change states in a semiconductor array. State change voltages can be applied to a single device in the array of semiconductor devices without the need for transistor-type voltage controls. The diodic effect of the present invention facilitates this activity by allowing specific voltage levels necessary for state changes to only occur at the desired device. In this manner, an array of devices can be programmed with varying data or states without utilizing transistor technology. The present invention also allows for an extremely efficient method of producing these types of devices, eliminating the need to manufacture costly external voltage controlling semiconductor devices.
摘要翻译：本发明通过帮助单个器件改变半导体阵列中的状态的方式来帮助半导体器件。可以将状态变化电压施加到半导体器件阵列中的单个器件，而不需要晶体管型电压控制。本发明的二极体效应通过允许状态改变所需的特定电压水平仅发生在期望的装置来促进该活动。以这种方式，可以在不利用晶体管技术的情况下用不同的数据或状态对器件阵列进行编程。本发明还允许制造这些类型的器件的非常有效的方法，消除了制造昂贵的外部电压控制半导体器件的需要。

3. 发明授权

US06847047B2 Methods that facilitate control of memory arrays utilizing zener diode-like devices 有权
标题翻译：方便使用齐纳二极管状器件来控制存储器阵列
公开(公告)号：US06847047B2
公开(公告)日：2005-01-25
申请号：US10287363
申请日：2002-11-04
申请人： Michael A. VanBuskirk , Colin Bill , Tzu-Ning Fang , Zhida Lan
发明人： Michael A. VanBuskirk , Colin Bill , Tzu-Ning Fang , Zhida Lan
IPC分类号： G11C11/56 , G11C13/02 , G11C16/02 , H01L51/00
CPC分类号： G11C13/0014 , B82Y10/00 , G11C11/5664 , G11C13/0016 , G11C13/003 , G11C2213/71 , G11C2213/72 , G11C2213/77
摘要： The present invention facilitates semiconductor devices by aiding the efficiency in the way individual devices change states in a semiconductor array. State change voltages can be applied to a single device in the array of semiconductor devices without the need for transistor-type voltage controls. The diodic effect of the present invention facilitates this activity by allowing specific voltage levels necessary for state changes to only occur at the desired device. In this manner, an array of devices can be programmed with varying data or states without utilizing transistor technology. The present invention also allows for an extremely efficient method of producing these types of devices, eliminating the need to manufacture costly external voltage controlling semiconductor devices.
摘要翻译：本发明通过帮助单个器件改变半导体阵列中的状态的方式来帮助半导体器件。可以将状态变化电压施加到半导体器件阵列中的单个器件，而不需要晶体管型电压控制。本发明的二极体效应通过允许状态改变所需的特定电压水平仅发生在期望的装置来促进该活动。以这种方式，可以在不利用晶体管技术的情况下用不同的数据或状态对器件阵列进行编程。本发明还允许制造这些类型的器件的非常有效的方法，消除了制造昂贵的外部电压控制半导体器件的需要。

4. 发明申请

US20120092924A1 METHOD OF PROVIDING AN ERASE ACTIVATION ENERGY OF A MEMORY DEVICE 审中-公开
标题翻译：提供存储器件的擦除活化能的方法
公开(公告)号：US20120092924A1
公开(公告)日：2012-04-19
申请号：US13324310
申请日：2011-12-13
申请人： Michael A. VanBuskirk , Colin S. Bill , Zhida Lan , Tzu-Ning Fang
发明人： Michael A. VanBuskirk , Colin S. Bill , Zhida Lan , Tzu-Ning Fang
IPC分类号： G11C11/34 , G11C7/00
CPC分类号： G11C13/0014 , B82Y10/00
摘要： A write-once read-many times memory device is made up of first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the first and second electrode. The memory device is programmed by providing a charged species from the passive layer into the active layer. The memory device may be programmed to have for the programmed memory device a first erase activation energy. The present method provides for the programmed memory device a second erase activation energy greater than the first erase activation energy.
摘要翻译：一次写入多次存储器件由第一和第二电极，第一和第二电极之间的无源层以及第一和第二电极之间的有源层组成。通过从被动层提供带电物质到活性层来对存储器件进行编程。存储器件可以被编程为使编程的存储器件具有第一擦除激活能量。本方法为编程的存储器件提供大于第一擦除激活能量的第二擦除激活能量。

5. 发明授权

US08098521B2 Method of providing an erase activation energy of a memory device 有权
标题翻译：提供存储器件的擦除激活能的方法
公开(公告)号：US08098521B2
公开(公告)日：2012-01-17
申请号：US11095849
申请日：2005-03-31
申请人： Michael A. VanBuskirk , Colin S. Bill , Zhida Lan , Tzu-Ning Fang
发明人： Michael A. VanBuskirk , Colin S. Bill , Zhida Lan , Tzu-Ning Fang
IPC分类号： G11C11/34
CPC分类号： G11C13/0014 , B82Y10/00
摘要： A write-once read-many times memory device is made up of first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the first and second electrode. The memory device is programmed by providing a charged species from the passive layer into the active layer. The memory device may be programmed to have for the programmed memory device a first erase activation energy. The present method provides for the programmed memory device a second erase activation energy greater than the first erase activation energy.
摘要翻译：一次写入多次存储器件由第一和第二电极，第一和第二电极之间的无源层以及第一和第二电极之间的有源层组成。通过从被动层提供带电物质到活性层来对存储器件进行编程。存储器件可以被编程为使编程的存储器件具有第一擦除激活能量。本方法为编程的存储器件提供大于第一擦除激活能量的第二擦除激活能量。

6. 发明授权

US07035141B1 Diode array architecture for addressing nanoscale resistive memory arrays 有权
标题翻译：用于寻址纳米尺度电阻式存储器阵列的二极管阵列架构
公开(公告)号：US07035141B1
公开(公告)日：2006-04-25
申请号：US10990706
申请日：2004-11-17
申请人： Nicholas H. Tripsas , Colin S. Bill , Michael A. VanBuskirk , Matthew Buynoski , Tzu-Ning Fang , Wei Daisy Cai , Suzette Pangrle , Steven Avanzino
发明人： Nicholas H. Tripsas , Colin S. Bill , Michael A. VanBuskirk , Matthew Buynoski , Tzu-Ning Fang , Wei Daisy Cai , Suzette Pangrle , Steven Avanzino
IPC分类号： G11C11/36 , G11C27/00
CPC分类号： G11C13/003 , G11C13/0002 , G11C13/0007 , G11C2213/56 , G11C2213/72 , G11C2213/74 , G11C2213/76 , H01L27/101 , H01L27/1021
摘要： The present memory structure includes thereof a first conductor, a second conductor, a resistive memory cell connected to the second conductor, a first diode connected to the resistive memory cell and the first conductor, and oriented in the forward direction from the resistive memory cell to the first conductor, and a second diode connected to the resistive memory cell and the first conductor, in parallel with the first diode, and oriented in the reverse direction from the resistive memory cell to the first conductor. The first and second diodes have different threshold voltages.
摘要翻译：本存储器结构包括第一导体，第二导体，连接到第二导体的电阻性存储单元，连接到电阻存储单元和第一导体的第一二极管，并且从电阻存储单元向前取向所述第一导体和连接到所述电阻性存储器单元和所述第一导体的第二二极管与所述第一二极管并联，并且在从所述电阻存储器单元到所述第一导体的相反方向上定向。第一和第二二极管具有不同的阈值电压。

7. 发明授权

US06960783B2 Erasing and programming an organic memory device and method of fabricating 有权
标题翻译：擦除和编程有机存储器件及其制造方法
公开(公告)号：US06960783B2
公开(公告)日：2005-11-01
申请号：US10436786
申请日：2003-05-13
申请人： Zhida Lan , Colin Bill , Michael A. VanBuskirk
发明人： Zhida Lan , Colin Bill , Michael A. VanBuskirk
IPC分类号： G11C11/56 , G11C13/02 , H01L35/24
CPC分类号： G11C13/0014 , B82Y10/00 , G11C11/5664 , G11C13/0009 , G11C13/0016 , G11C2213/15 , G11C2213/56 , G11C2213/71
摘要： An organic memory cell made of two electrodes with a selectively conductive media between the two electrodes is disclosed. The selectively conductive media contains an organic layer and passive layer. The selectively conductive media is programmed by applying bias voltages that program a desired impedance state for a memory cell. The desired impedance state represents one or more bits of information and the memory cell does not require constant power or refresh cycles to maintain the desired impedance state. Furthermore, the selectively conductive media is read by applying a current and reading the impedance of the media in order to determine the impedance state of the memory cell. Methods of making the organic memory devices/cells, methods of using the organic memory devices/cells, and devices such as computers containing the organic memory devices/cells are also disclosed.
摘要翻译：公开了一种由在两个电极之间具有选择性导电介质的两个电极制成的有机存储单元。选择性导电介质包含有机层和无源层。选择性导电介质通过施加偏置电压来编程，该偏置电压为存储器单元编程期望的阻抗状态。期望的阻抗状态表示信息的一个或多个位，并且存储单元不需要恒定的功率或刷新周期来保持所需的阻抗状态。此外，通过施加电流并读取介质的阻抗来读取选择性导电介质，以便确定存储单元的阻抗状态。还公开了制造有机存储器件/单元的方法，使用有机存储器件/单元的方法，以及诸如包含有机存储器件/单元的计算机的器件。

8. 发明授权

US08445966B2 Method and apparatus for protection against process-induced charging 有权
标题翻译：用于防止过程引起的充电的方法和装置
公开(公告)号：US08445966B2
公开(公告)日：2013-05-21
申请号：US11614053
申请日：2006-12-20
申请人： David M. Rogers , Mimi X. Qian , Kwadwo A. Appiah , Mark Randolph , Michael A. VanBuskirk , Tazrien Kamal , Hiroyuki Kinoshita , Yi He , Wei Zheng
发明人： David M. Rogers , Mimi X. Qian , Kwadwo A. Appiah , Mark Randolph , Michael A. VanBuskirk , Tazrien Kamal , Hiroyuki Kinoshita , Yi He , Wei Zheng
IPC分类号： H01L23/62
CPC分类号： H01L21/768 , G11C8/08 , G11C8/14 , H01L27/0248 , H01L29/66477 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device (400) for improved charge dissipation protection includes a substrate (426), a layer of semiconductive or conductive material (406), one or more thin film devices (408) and a charge passage device (414). The thin film devices (408) are connected to the semiconductive or conductive layer (406) and the charge passage device (414) is coupled to the thin film devices (408) and to the substrate (426) and provides a connection from the thin film devices (408) to the substrate (426) to dissipate charge from the semiconductive/conductive layer (406) to the substrate (426).
摘要翻译：用于改善电荷耗散保护的半导体器件（400）包括衬底（426），半导体或导电材料层（406），一个或多个薄膜器件（408）和电荷通道器件（414）。薄膜器件（408）连接到半导体或导电层（406），并且电荷通道器件（414）耦合到薄膜器件（408）和衬底（426），并提供来自薄的薄膜器件（408）到衬底（426）以将电荷从半导体/导电层（406）耗散到衬底（426）。

9. 发明授权

US08003436B2 Stacked organic memory devices and methods of operating and fabricating 有权
标题翻译：堆叠有机存储器件及其操作和制造方法
公开(公告)号：US08003436B2
公开(公告)日：2011-08-23
申请号：US12327040
申请日：2008-12-03
申请人： Nicholas H. Tripsas , Uzodinma Okoroanyanwu , Suzette K. Pangrle , Michael A. VanBuskirk
发明人： Nicholas H. Tripsas , Uzodinma Okoroanyanwu , Suzette K. Pangrle , Michael A. VanBuskirk
IPC分类号： H01L51/00
CPC分类号： G11C13/0014 , B82Y10/00 , G11C11/5664 , G11C13/0016 , H01L27/28 , H01L51/0035 , H01L51/0036 , H01L51/0038 , H01L51/0041 , H01L51/0077 , H01L51/0078
摘要： The present invention provides a multi-layer organic memory device that can operate as a non-volatile memory device having a plurality of stacked and/or parallel memory structures constructed therein. A multi-cell and multi-layer organic memory component can be formed with two or more electrodes having a selectively conductive media between the electrodes forming individual cells, while utilizing a partitioning component to enable stacking of additional memory cells on top of or in association with previously formed cells. Memory stacks can be formed by adding additional layers—respective layers separated by additional partitioning components, wherein multiple stacks can be formed in parallel to provide a high-density memory device.
摘要翻译：本发明提供一种多层有机存储器件，其可以作为其中构造有多个堆叠和/或并行存储器结构的非易失性存储器件来操作。可以在两个或多个电极之间形成多单元和多层有机存储器组件，所述两个或更多个电极在形成各个单元的电极之间具有选择性导电介质，同时利用分隔组件使得能够堆叠额外的存储器单元，以前形成的细胞。可以通过添加额外的层 - 通过附加分隔部件分开的相应层来形成存储器堆叠，其中可以并行形成多个堆叠以提供高密度存储器件。

10. 发明申请

US20090081824A1 STACKED ORGANIC MEMORY DEVICES AND METHODS OF OPERATING AND FABRICATING 有权
标题翻译：堆叠有机存储器件和操作和制作方法
公开(公告)号：US20090081824A1
公开(公告)日：2009-03-26
申请号：US12327040
申请日：2008-12-03
申请人： Nicholas H. Tripsas , Uzodinma Okoroanyanwu , Suzette K. Pangrle , Michael A. VanBuskirk
发明人： Nicholas H. Tripsas , Uzodinma Okoroanyanwu , Suzette K. Pangrle , Michael A. VanBuskirk
IPC分类号： H01L21/02
CPC分类号： G11C13/0014 , B82Y10/00 , G11C11/5664 , G11C13/0016 , H01L27/28 , H01L51/0035 , H01L51/0036 , H01L51/0038 , H01L51/0041 , H01L51/0077 , H01L51/0078
摘要： The present invention provides a multi-layer organic memory device that can operate as a non-volatile memory device having a plurality of stacked and/or parallel memory structures constructed therein. A multi-cell and multi-layer organic memory component can be formed with two or more electrodes having a selectively conductive media between the electrodes forming individual cells, while utilizing a partitioning component to enable stacking of additional memory cells on top of or in association with previously formed cells. Memory stacks can be formed by adding additional layers—respective layers separated by additional partitioning components, wherein multiple stacks can be formed in parallel to provide a high-density memory device.
摘要翻译：本发明提供一种多层有机存储器件，其可以作为其中构造有多个堆叠和/或并行存储器结构的非易失性存储器件来操作。可以在两个或多个电极之间形成多单元和多层有机存储器组件，所述两个或更多个电极在形成各个单元的电极之间具有选择性导电介质，同时利用分隔组件使得能够堆叠额外的存储器单元，以前形成的细胞。可以通过添加额外的层 - 通过附加分隔部件分开的相应层来形成存储器堆叠，其中可以并行形成多个堆叠以提供高密度存储器件。

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