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1. 发明授权

US06633055B2 Electronic fuse structure and method of manufacturing 有权
标题翻译：电子熔断器结构及制造方法
公开(公告)号：US06633055B2
公开(公告)日：2003-10-14
申请号：US09303509
申请日：1999-04-30
申请人： Claude L. Bertin , Erik L. Hedberg , Max G. Levy , Timothy D. Sullivan , William R. Tonti
发明人： Claude L. Bertin , Erik L. Hedberg , Max G. Levy , Timothy D. Sullivan , William R. Tonti
IPC分类号： H01L2974
CPC分类号： H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： A gap conductor structure for an integrated electronic circuit that may function as an electronic fuse device or as a low capacitance inter level signal line is integrated as part of the semi-conductor chip wiring. The gap conducting structure includes one or more air gap regions of predefined volume that fully or partially exposes a length of interlevel conductor layer in an IC. Alternately, the air gap region may wholly located within the dielectric region below a corresponding conductor and separated by insulator. When functioning as a fuse, the gap region acts to reduce thermal conductivity away from the exposed portion of the conductor enabling generation of higher heat currents in the conducting line with lower applied voltages sufficient to melt a part of the conducting line. The presence of gaps, and hence, the fuses, are scalable and may be tailored to the capacity of currents they must carry with the characteristics of the fuses defined by a circuit designer. Furthermore, conducting structures completely or partially exposed in the air gap may function as low capacitance minimum delay transmission lines.
摘要翻译：作为半导体芯片布线的一部分，集成电子电路的可用作电子熔断器件或低电容级间信号线的间隙导体结构被集成。间隙导电结构包括一个或多个预定体积的气隙区域，其完全或部分地暴露IC中的层间导体层的长度。或者，气隙区域可以完全位于相应导体下方的电介质区域内并被绝缘体分隔开。当用作熔丝时，间隙区域用于降低远离导体的暴露部分的热导率，使得能够以较低的施加电压在导线中产生更高的热流，从而熔化导电线的一部分。间隙的存在以及保险丝的存在是可扩展的，并且可以根据电路设计者定义的保险丝的特性来适应其必须携带的电流的容量。此外，在气隙中完全或部分暴露的导电结构可用作低电容最小延迟传输线

2. 发明授权

US09035459B2 Structures for improving current carrying capability of interconnects and methods of fabricating the same 有权
标题翻译：用于改善互连的载流能力的结构及其制造方法
公开(公告)号：US09035459B2
公开(公告)日：2015-05-19
申请号：US12421723
申请日：2009-04-10
申请人： Charles L. Arvin , Raschid J. Bezama , Harry D. Cox , Timothy H. Daubenspeck , Krystyna W. Semkow , Timothy D. Sullivan
发明人： Charles L. Arvin , Raschid J. Bezama , Harry D. Cox , Timothy H. Daubenspeck , Krystyna W. Semkow , Timothy D. Sullivan
IPC分类号： C23C14/24 , H01L23/00 , C25D5/02 , C25D5/14 , C25D5/48
CPC分类号： H01L24/05 , C25D5/02 , C25D5/14 , C25D5/48 , H01L24/11 , H01L2224/0401 , H01L2224/05075 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05647 , H01L2224/05655 , H01L2224/13099 , H01L2924/01322 , H01L2924/014 , H01L2924/1305 , H01L2924/14 , H01L2924/00 , H01L2924/00014 , H01L2924/01074 , H01L2924/013 , H01L2924/01027
摘要： Interconnect structures and methods of fabricating the same are provided. The interconnect structures provide highly reliable copper interconnect structures for improving current carrying capabilities (e.g., current spreading). The structure includes an under bump metallurgy formed in a trench. The under bump metallurgy includes at least: an adhesion layer; a plated barrier layer; and a plated conductive metal layer provided between the adhesion layer and the plated barrier layer. The structure further includes a solder bump formed on the under bump metallurgy.
摘要翻译：提供互连结构及其制造方法。互连结构提供用于改善载流能力（例如，电流扩展）的高可靠性铜互连结构。该结构包括在沟槽中形成的凸块下金属。凸起下冶金至少包括：粘合层; 电镀阻挡层; 以及设置在粘合层和镀层阻挡层之间的镀覆导电金属层。该结构还包括形成在凸块下金属上的焊料凸块。

3. 发明授权

US08652922B2 Compact thermally controlled thin film resistors utilizing substrate contacts and methods of manufacture 有权
标题翻译：紧凑的热控薄膜电阻器，利用基板触点和制造方法
公开(公告)号：US08652922B2
公开(公告)日：2014-02-18
申请号：US13008459
申请日：2011-01-18
申请人： Joseph M. Lukaitis , Jed H. Rankin , Robert R. Robison , Dustin K. Slisher , Timothy D. Sullivan
发明人： Joseph M. Lukaitis , Jed H. Rankin , Robert R. Robison , Dustin K. Slisher , Timothy D. Sullivan
IPC分类号： H01L21/20
CPC分类号： H01L28/20 , H01L27/0207 , H01L27/1203
摘要： A method of forming a semiconductor structure includes forming a resistor on an insulator layer over a substrate and forming a trench in the resistor and into the substrate. The method also includes forming a liner on sidewalls of the trench and forming a core comprising a high thermal conductivity material in the trench and on the liner.
摘要翻译：形成半导体结构的方法包括在衬底上的绝缘体层上形成电阻器，并在电阻器中形成沟槽并进入衬底。该方法还包括在沟槽的侧壁上形成衬垫，并在沟槽和衬垫上形成包括高导热性材料的芯。

4. 发明授权

US08647909B2 Array of alpha particle sensors 失效
标题翻译： α粒子传感器阵列
公开(公告)号：US08647909B2
公开(公告)日：2014-02-11
申请号：US13357728
申请日：2012-01-25
申请人： Ethan H. Cannon , Michael J. Hauser , Timothy D. Sullivan
发明人： Ethan H. Cannon , Michael J. Hauser , Timothy D. Sullivan
IPC分类号： H01L21/00
CPC分类号： H01L31/115 , H01L23/552 , H01L23/556 , H01L25/0657 , H01L2924/0002 , H01L2924/00
摘要： An array of radiation sensors or detectors is integrated within a three-dimensional semiconductor IC. The sensor array is located relatively close to the device layer of a circuit (e.g., a microprocessor) to be protected from the adverse effects of the ionizing radiation particles. As such, the location where the radiation particles intersect the device layer can be calculated with coarse precision (e.g., to within 10 s of microns).
摘要翻译：辐射传感器或检测器阵列集成在三维半导体IC内。传感器阵列相对靠近电路（例如，微处理器）的器件层定位，以防止电离辐射粒子的不利影响。因此，辐射粒子与器件层相交的位置可以用粗精度（例如，在10微米以内）来计算。

5. 发明申请

US20130299989A1 CHIP CONNECTION STRUCTURE AND METHOD OF FORMING 审中-公开
公开(公告)号：US20130299989A1
公开(公告)日：2013-11-14
申请号：US13468750
申请日：2012-05-10
申请人： Charles L. Arvin , Timothy H. Daubenspeck , Jeffrey P. Gambino , Christopher D. Muzzy , Wolfgang Sauter , Timothy D. Sullivan
发明人： Charles L. Arvin , Timothy H. Daubenspeck , Jeffrey P. Gambino , Christopher D. Muzzy , Wolfgang Sauter , Timothy D. Sullivan
IPC分类号： H01L23/52 , H01L21/768
CPC分类号： H01L24/11 , H01L23/49811 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/03452 , H01L2224/0346 , H01L2224/0348 , H01L2224/03912 , H01L2224/0401 , H01L2224/05026 , H01L2224/05147 , H01L2224/05571 , H01L2224/05572 , H01L2224/056 , H01L2224/11 , H01L2224/11005 , H01L2224/11452 , H01L2224/1146 , H01L2224/11472 , H01L2224/11903 , H01L2224/11906 , H01L2224/13 , H01L2224/13006 , H01L2224/13076 , H01L2224/13082 , H01L2224/13083 , H01L2224/13084 , H01L2224/131 , H01L2224/13147 , H01L2224/16238 , H01L2924/00014 , H01L2924/01029 , H01L2924/014 , H01L2924/12042 , H01L2924/00012 , H01L2224/05552 , H01L2924/00
摘要： Chip connection structures and related methods of forming such structures are disclosed. In one case, an interconnect structure is disclosed, the structure including: a pillar connecting an integrated circuit chip and a substrate, the pillar including a barrier layer, a first copper layer over the barrier layer, and a first solder layer over the first copper layer.

6. 发明授权

US08480302B2 Micro-electro-mechanical-system temperature sensor 失效
标题翻译：微机电系统温度传感器
公开(公告)号：US08480302B2
公开(公告)日：2013-07-09
申请号：US12892406
申请日：2010-09-28
申请人： Jason P. Gill , David L. Harmon , Timothy D. Sullivan
发明人： Jason P. Gill , David L. Harmon , Timothy D. Sullivan
IPC分类号： G01K5/00 , G01K7/00
CPC分类号： G01K5/52
摘要： The present invention provides a micro-electro-mechanical-system (MEMS) temperature sensor that employs a suspended spiral comprising a material with a positive coefficient of thermal expansion. The thermal expansion of the suspended spiral is guided to by a set of guideposts to provide a linear movement of the free end of the suspended spiral, which is converted to an electrical signal by a set of conductive rotor azimuthal fins that are interdigitated with a set of conductive stator azimuthal fins by measuring the amount of capacitive coupling therebetween. Real time temperature may thus be measured through the in-situ measurement of the capacitive coupling. Optionally, the MEMS temperature sensor may have a ratchet and a pawl to enable ex-situ measurement.
摘要翻译：本发明提供了一种微电子机械系统（MEMS）温度传感器，其采用悬浮螺旋，其包括具有正的热膨胀系数的材料。悬挂螺旋的热膨胀由一组导轨引导以提供悬挂螺旋的自由端的线性运动，其被一组导电转子方位角翅片转换成电信号，所述导电转子方位角翅片与组相互指向通过测量导电定子方位翅片之间的电容耦合量。因此可以通过电容耦合的原位测量来测量实时温度。可选地，MEMS温度传感器可以具有棘轮和棘爪以使得能够进行非原位测量。

7. 发明授权

US08409980B2 Underfill flow guide structures and method of using same 有权
标题翻译：底部填充流动导向结构及其使用方法
公开(公告)号：US08409980B2
公开(公告)日：2013-04-02
申请号：US13347087
申请日：2012-01-10
申请人： Timothy H. Daubenspeck , Jeffrey P. Gambino , Christopher D. Muzzy , Marie-Claude Paquet , Wolfgang Sauter , Timothy D. Sullivan
发明人： Timothy H. Daubenspeck , Jeffrey P. Gambino , Christopher D. Muzzy , Marie-Claude Paquet , Wolfgang Sauter , Timothy D. Sullivan
IPC分类号： H01L21/44
CPC分类号： H01L21/56 , H01L21/563 , H01L23/49816 , H01L24/743 , H01L24/97 , H01L29/0657 , H01L2224/73203 , H01L2224/73204 , H01L2224/97 , H01L2924/14 , H01L2924/15311 , H01L2224/83 , H01L2224/81 , H01L2924/00
摘要： Underfill flow guide structures and methods of using the same are provided with a module. The method includes mounting bumps on a substrate. The method also includes forming underfill flow guide structures on the substrate by patterning wires with an overlay of hard substance. The underfill flow guide structures are integrated with the substrate and formed between adjacent bumps. The underfill flow guide structures are further formed to uniformly guide underfill along the substrate during capillary underfill processing.
摘要翻译：底部填充流动引导结构及其使用方法具有模块。该方法包括在基板上安装凸块。该方法还包括通过用硬质材料的覆盖图案化线来在基底上形成底部填充流动引导结构。底部填充流动引导结构与基板集成并形成在相邻的凸块之间。底部填充流动引导结构进一步形成为在毛细管底部填充处理期间沿着基底均匀地引导底部填充物。

8. 发明申请

US20120299188A1 WIRING STRUCTURE AND METHOD OF FORMING THE STRUCTURE 有权
标题翻译：导线结构及形成结构的方法
公开(公告)号：US20120299188A1
公开(公告)日：2012-11-29
申请号：US13114079
申请日：2011-05-24
申请人： Fen Chen , Jeffrey P. Gambino , Anthony K. Stamper , Timothy D. Sullivan
发明人： Fen Chen , Jeffrey P. Gambino , Anthony K. Stamper , Timothy D. Sullivan
IPC分类号： H01L23/485 , H01L21/768
CPC分类号： H01L21/76816 , H01L21/76843 , H01L23/5283 , H01L23/53223 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： Disclosed is a wiring structure and method of forming the structure with a conductive diffusion barrier layer having a thick upper portion and thin lower portion. The thicker upper portion is located at the junction between the wiring structure and the adjacent dielectric materials. The thicker upper portion: (1) minimizes metal ion diffusion and, thereby TDDB; (2) allows a wire width to dielectric space width ratio that is optimal for low TDDB to be achieved at the top of the wiring structure; and (3) provides a greater surface area for via landing. The thinner lower portion: (1) allows a different wire width to dielectric space width ratio to be maintained in the rest of the wiring structure in order to balance other competing factors; (2) allows a larger cross-section of wire to reduce current density and, thereby reduce EM; and (3) avoids an increase in wiring structure resistivity.
摘要翻译：公开了一种具有导电扩散阻挡层的结构的布线结构和方法，所述导电扩散阻挡层具有较厚的上部和较薄的下部。较厚的上部位于布线结构和相邻电介质材料之间的接合处。较厚的上部：（1）最小化金属离子扩散，从而使TDDB; （2）允许在布线结构的顶部实现对于低TDDB最佳的电线宽度与电介质空间宽度比; 和（3）为通孔着陆提供更大的表面积。较薄的下部：（1）允许在布线结构的其余部分中保持不同的导线宽度与电介质空间宽度比，以平衡其他竞争因素; （2）允许更大的导线截面减小电流密度，从而减少EM; 和（3）避免了布线结构电阻率的增加。

9. 发明授权

US08264078B2 Metal wiring structures for uniform current density in C4 balls 有权
标题翻译： C4球中均匀电流密度的金属配线结构
公开(公告)号：US08264078B2
公开(公告)日：2012-09-11
申请号：US13324499
申请日：2011-12-13
申请人： Timothy H. Daubenspeck , Wolfgang Sauter , Timothy D. Sullivan , Steven L. Wright , Edmund Sprogis
发明人： Timothy H. Daubenspeck , Wolfgang Sauter , Timothy D. Sullivan , Steven L. Wright , Edmund Sprogis
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/03 , H01L23/5226 , H01L24/05 , H01L24/13 , H01L2224/036 , H01L2224/0391 , H01L2224/0401 , H01L2224/05006 , H01L2224/05022 , H01L2224/05094 , H01L2224/05095 , H01L2224/05098 , H01L2224/05124 , H01L2224/05147 , H01L2224/05558 , H01L2224/05559 , H01L2224/05567 , H01L2224/05572 , H01L2224/05624 , H01L2224/11334 , H01L2224/13007 , H01L2224/13022 , H01L2224/13099 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01059 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/10329 , H01L2924/1305 , H01L2924/1306 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/00 , H01L2224/05552
摘要： In one embodiment, a sub-pad assembly of metal structures is located directly underneath a metal pad. The sub-pad assembly includes an upper level metal line structure abutting the metal pad, a lower level metal line structure located underneath the upper level metal line structure, and a set of metal vias that provide electrical connection between the lower level metal line structure located underneath the upper level metal line structure. In another embodiment, the reliability of a C4 ball is enhanced by employing a metal pad structure having a set of integrated metal vias that are segmented and distributed to facilitate uniform current density distribution within the C4 ball. The areal density of the cross-sectional area in the plurality of metal vias is higher at the center portion of the metal pad than at the peripheral portion of the planar portion of the metal pad.
摘要翻译：在一个实施例中，金属结构的子垫组件位于金属垫的正下方。子焊盘组件包括邻接金属焊盘的上层金属线结构，位于上层金属线结构下方的下层金属线结构，以及一组在下层金属线结构之间提供电连接的金属通孔在上层金属线结构下方。在另一个实施例中，C4球的可靠性通过使用具有一组集成金属通孔的金属焊盘结构而被增强，所述集成金属通孔被分段和分配以便于在C4球内均匀的电流密度分布。在金属焊盘的中心部分，多个金属通孔中的横截面面积的面密度高于在金属焊盘的平面部分的周边部分。

10. 发明授权

US08212357B2 Combination via and pad structure for improved solder bump electromigration characteristics 有权
标题翻译：组合通孔和焊盘结构，用于改善焊料凸块电迁移特性
公开(公告)号：US08212357B2
公开(公告)日：2012-07-03
申请号：US12188235
申请日：2008-08-08
申请人： Timothy H. Daubenspeck , Jeffrey P. Gambino , Timothy D. Sullivan
发明人： Timothy H. Daubenspeck , Jeffrey P. Gambino , Timothy D. Sullivan
IPC分类号： H01L23/488 , H01L21/44
CPC分类号： H01L24/11 , H01L23/5226 , H01L24/05 , H01L24/13 , H01L2224/0401 , H01L2224/05022 , H01L2224/13028 , H01L2224/13099 , H01L2224/131 , H01L2224/16 , H01L2924/0001 , H01L2924/01005 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/1433
摘要： The invention generally relates to semiconductor devices, and more particularly to structures and methods for enhancing electromigration (EM) performance in solder bumps and related structures. A semiconductor structure includes a wire comprising first and second wire segments, a pad formed over the wire, and a ball limiting metallization (BLM) layer formed over the pad. The semiconductor structure also includes a solder bump formed over the BLM layer, a terminal via formed over the BLM layer, and at least one peripheral via formed between the second wire segment and the pad. The first and second wire segments are discrete wire segments.
摘要翻译：本发明一般涉及半导体器件，更具体地涉及用于增强焊料凸点和相关结构中的电迁移（EM）性能的结构和方法。半导体结构包括包括第一和第二线段的线，在线上形成的焊盘以及形成在焊盘上的球限制金属化（BLM）层。半导体结构还包括形成在BLM层上的焊料凸块，在BLM层上形成的端子通孔，以及形成在第二线段和焊盘之间的至少一个外围通孔。第一和第二线段是分立的线段。

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