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1. 发明授权

US08325127B2 Shift register and architecture of same on a display panel 有权
标题翻译：移位寄存器和结构在显示面板上
公开(公告)号：US08325127B2
公开(公告)日：2012-12-04
申请号：US12823237
申请日：2010-06-25
申请人： Chun-Huan Chang , Kuo-Chang Su , Yung-Chih Chen , Chun-Hsin Liu
发明人： Chun-Huan Chang , Kuo-Chang Su , Yung-Chih Chen , Chun-Hsin Liu
IPC分类号： G06F3/038 , G11C19/00
CPC分类号： G11C19/287 , G09G3/20 , G09G3/3677 , G09G2310/0205 , G09G2310/0281 , G09G2310/0286 , G09G2310/0297 , G09G2310/06
摘要： The present invention relates to a shift register and GOA architecture of the same in a display panel comprising a substrate and a plurality of pixels spatially formed on the substrate defining a number of pixel rows, each pixel row having a height of H. The shift register has the plurality of shift register stages disposed spatially and sequentially on the substrate in such a way that the layout of each shift register stage has a height of (j*H), j being an integer greater than one. Each shift register stages is configured to generate j scanning signals for driving j neighboring pixel rows, respectively.
摘要翻译：本发明涉及一种显示面板中的移位寄存器和GOA结构，包括基板和空间上形成在衬底上的多个像素，其限定多个像素行，每个像素行具有高度H.移位寄存器具有多个移位寄存器级，以这样的方式在基板上空间和顺序地布置，使得每个移位寄存器级的布局具有（j * H）的高度，j是大于1的整数。每个移位寄存器级被配置为分别产生用于驱动j个相邻像素行的j个扫描信号。

2. 发明申请

US20110316833A1 Shift Register and Architecture of Same on a Display Panel 有权
标题翻译：移位寄存器和显示面板上的相同结构
公开(公告)号：US20110316833A1
公开(公告)日：2011-12-29
申请号：US12823237
申请日：2010-06-25
申请人： Chun-Huan Chang , Kuo-Chang Su , Yung-Chih Chen , Chun-Hsin Liu
发明人： Chun-Huan Chang , Kuo-Chang Su , Yung-Chih Chen , Chun-Hsin Liu
IPC分类号： G06F3/038 , G11C19/00
CPC分类号： G11C19/287 , G09G3/20 , G09G3/3677 , G09G2310/0205 , G09G2310/0281 , G09G2310/0286 , G09G2310/0297 , G09G2310/06
摘要： The present invention relates to a shift register and GOA architecture of the same in a display panel comprising a substrate and a plurality of pixels spatially formed on the substrate defining a number of pixel rows, each pixel row having a height of H. The shift register has the plurality of shift register stages disposed spatially and sequentially on the substrate in such a way that the layout of each shift register stage has a height of (j*H), j being an integer greater than one. Each shift register stages is configured to generate j scanning signals for driving j neighboring pixel rows, respectively.
摘要翻译：本发明涉及一种显示面板中的移位寄存器和GOA结构，包括基板和空间上形成在衬底上的多个像素，其限定多个像素行，每个像素行具有高度H.移位寄存器具有多个移位寄存器级，以这样的方式在基板上空间和顺序地布置，使得每个移位寄存器级的布局具有（j * H）的高度，j是大于1的整数。每个移位寄存器级被配置为分别产生用于驱动j个相邻像素行的j个扫描信号。

3. 发明授权

US08581655B2 Clock signal supplying method and circuit for shift registers 有权
标题翻译：时钟信号提供方法和移位寄存器电路
公开(公告)号：US08581655B2
公开(公告)日：2013-11-12
申请号：US13270382
申请日：2011-10-11
申请人： Yung-Chih Chen , Kuo-Chang Su , Chun-Huan Chang , Yu-Chung Yang
发明人： Yung-Chih Chen , Kuo-Chang Su , Chun-Huan Chang , Yu-Chung Yang
IPC分类号： G06F1/04
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2300/0417 , G09G2310/0286 , G11C19/00
摘要： A clock signal supplying method for shift registers includes following steps: receiving a clock signal; and transmitting the clock signal to two first stage signal transmission paths simultaneously, the first stage signal transmission paths determined by a first control signal whether to be conducted, and further conducted at different time.
摘要翻译：用于移位寄存器的时钟信号提供方法包括以下步骤：接收时钟信号; 并且将时钟信号同时发送到两个第一级信号传输路径，由第一控制信号确定的第一级信号传输路径是否被导通，并且在不同的时间进一步进行。

4. 发明申请

US20120161842A1 CLOCK SIGNAL SUPPLYING METHOD AND CIRCUIT FOR SHIFT REGISTERS 有权
标题翻译：用于移位寄存器的时钟信号提供方法和电路
公开(公告)号：US20120161842A1
公开(公告)日：2012-06-28
申请号：US13270382
申请日：2011-10-11
申请人： Yung-Chih CHEN , Kuo-Chang Su , Chun-Huan Chang , Yu-Chung Yang
发明人： Yung-Chih CHEN , Kuo-Chang Su , Chun-Huan Chang , Yu-Chung Yang
IPC分类号： G06F1/04
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2300/0417 , G09G2310/0286 , G11C19/00
摘要： A clock signal supplying method for shift registers includes following steps: receiving a clock signal; and transmitting the clock signal to two first stage signal transmission paths simultaneously, the first stage signal transmission paths determined by a first control signal whether to be conducted, and further conducted at different time.
摘要翻译：用于移位寄存器的时钟信号提供方法包括以下步骤：接收时钟信号; 并且将时钟信号同时发送到两个第一级信号传输路径，由第一控制信号确定的第一级信号传输路径是否被导通，并且在不同的时间进一步进行。

5. 发明授权

US08456454B2 Display panel 有权
标题翻译：显示面板
公开(公告)号：US08456454B2
公开(公告)日：2013-06-04
申请号：US12488946
申请日：2009-06-22
申请人： Yung-Chih Chen , Chun-Hsin Liu , Tsung-Ting Tsai , Kuo-Chang Su
发明人： Yung-Chih Chen , Chun-Hsin Liu , Tsung-Ting Tsai , Kuo-Chang Su
IPC分类号： G06F3/038 , G09G5/00 , G02F1/1333
CPC分类号： G09G3/3677 , G09G2300/0426 , G09G2330/08 , G09G2330/12
摘要： A display panel is disclosed, which includes a substrate, a shift register array, plural scan lines, a compensating circuit, a first repair line, and a second repair line. The shift register array having plural shift registers is disposed on a non-display area of the substrate. The scan lines connect to the shift registers respectively to drive plural display units. The first repair line and the second repair line are connected to the compensating circuit and bridged over two ends of each scan line in the non-display area, respectively.
摘要翻译：公开了一种显示面板，其包括基板，移位寄存器阵列，多条扫描线，补偿电路，第一修复线和第二修复线。具有多个移位寄存器的移位寄存器阵列设置在基板的非显示区域上。扫描线分别连接到移位寄存器以驱动多个显示单元。第一修理线和第二修复线分别连接到补偿电路并桥接在非显示区域中的每条扫描线的两端。

6. 发明授权

US08175215B2 Shift register 有权
标题翻译：移位寄存器
公开(公告)号：US08175215B2
公开(公告)日：2012-05-08
申请号：US12572247
申请日：2009-10-01
申请人： Chun-Hsin Liu , Tsung-ting Tsai , Kuo-Chang Su , Yung-Chih Chen
发明人： Chun-Hsin Liu , Tsung-ting Tsai , Kuo-Chang Su , Yung-Chih Chen
IPC分类号： G11C19/00
CPC分类号： G11C19/28
摘要： A shift register includes multiple cascade-connected stages. Each stage generates an output signal in response to a clock signal and a first control signal. Each stage includes a pull-up module, a pull-up driving module, a first pull-down module, a second pull-down module, and a third pull-down module. The pull-up module is used for providing the output signal based on the clock signal. The pull-up driving module turns on the pull-up module in response to a first control signal. The first pull-down module adjusts voltage level on the first node to a first supply voltage in response to a second control signal. The second pull-down module adjusts voltage level on the output end to a second supply voltage in response to the second control signal. The third pull-down module adjusts voltage level on the second node to a third supply voltage in response to a third control signal.
摘要翻译：移位寄存器包括多个级联连接级。每一级响应于时钟信号和第一控制信号产生输出信号。每个级包括上拉模块，上拉驱动模块，第一下拉模块，第二下拉模块和第三下拉模块。上拉模块用于根据时钟信号提供输出信号。上拉驱动模块响应于第一控制信号而导通上拉模块。第一下拉模块响应于第二控制信号将第一节点上的电压电平调整到第一电源电压。第二下拉模块响应于第二控制信号将输出端上的电压电平调整到第二电源电压。第三下拉模块响应于第三控制信号将第二节点上的电压电平调整到第三电源电压。

7. 发明授权

US08027426B1 Shift register 有权
标题翻译：移位寄存器
公开(公告)号：US08027426B1
公开(公告)日：2011-09-27
申请号：US12837244
申请日：2010-07-15
申请人： Yu-Chung Yang , Kuo-Chang Su , Yung-Chih Chen , Chun-Hsin Liu
发明人： Yu-Chung Yang , Kuo-Chang Su , Yung-Chih Chen , Chun-Hsin Liu
IPC分类号： G11C19/00
CPC分类号： G11C19/28 , G09G2310/0286 , G11C19/184
摘要： An exemplary shift register includes a plurality of transistors. The transistors are subjected to the control of a start pulse signal, a first clock signal and a second clock signal to generate a gate driving signal. The first clock signal and the second clock signal are phase-inverted with respect to each other. A logic low level of the first clock signal and another logic low level of the second clock signal are different from each other. Moreover, the transistors are negative threshold voltage transistors. A potential at the gate of the each of the transistors is lower than another potential at the source/drain of the transistor at the situation of the transistor being switched-off state.
摘要翻译：示例性移位寄存器包括多个晶体管。对晶体管进行起始脉冲信号，第一时钟信号和第二时钟信号的控制，以产生栅极驱动信号。第一时钟信号和第二时钟信号相对于彼此相位反相。第一时钟信号的逻辑低电平和第二时钟信号的另一个逻辑低电平彼此不同。而且，晶体管是负阈值电压晶体管。在晶体管处于截止状态的情况下，每个晶体管的栅极处的电位低于晶体管的源极/漏极处的另一个电位。

8. 发明申请

US20110002437A1 SHIFT REGISTERS 有权
标题翻译：移位寄存器
公开(公告)号：US20110002437A1
公开(公告)日：2011-01-06
申请号：US12607156
申请日：2009-10-28
申请人： Kuo-Chang Su , Tsung-Ting Tsai , Yung-Chih Chen , Chun-Hsin Liu
发明人： Kuo-Chang Su , Tsung-Ting Tsai , Yung-Chih Chen , Chun-Hsin Liu
IPC分类号： G11C19/00
CPC分类号： G11C19/28
摘要： A shift register is provided and includes a first shift registering unit and a second shift registering unit. The first shift registering unit generates a first trigger signal at a first output terminal and includes a first pull-down circuit. The second shift registering unit receives the first trigger signal and generates a second trigger signal at a second output terminal. The first trigger signal and the second trigger signal are sequentially asserted. The second shift registering unit includes a second pull-down circuit. The first pull-down circuit and the second pull-down circuit perform pull-down operations at different times. When the first pull-down circuit does not perform the pull-down operation, the second pull-down circuit performs pull-down operations to the first output terminal.
摘要翻译：提供一个移位寄存器，包括一个第一移位寄存单元和一个第二移位寄存单元。第一移位寄存单元在第一输出端产生第一触发信号，并包括第一下拉电路。第二移位寄存单元接收第一触发信号并在第二输出端产生第二触发信号。第一触发信号和第二触发信号被依次断言。第二移位登记单元包括第二下拉电路。第一下拉电路和第二下拉电路在不同时间执行下拉操作。当第一下拉电路不执行下拉操作时，第二下拉电路对第一输出端子执行下拉操作。

9. 发明授权

US08422620B2 Shift registers 有权
标题翻译：移位寄存器
公开(公告)号：US08422620B2
公开(公告)日：2013-04-16
申请号：US12607156
申请日：2009-10-28
申请人： Kuo-Chang Su , Tsung-Ting Tsai , Yung-Chih Chen , Chun-Hsin Liu
发明人： Kuo-Chang Su , Tsung-Ting Tsai , Yung-Chih Chen , Chun-Hsin Liu
IPC分类号： G11C19/00
CPC分类号： G11C19/28
摘要： A shift register is provided and includes a first shift registering unit and a second shift registering unit. The first shift registering unit generates a first trigger signal at a first output terminal and includes a first pull-down circuit. The second shift registering unit receives the first trigger signal and generates a second trigger signal at a second output terminal. The first trigger signal and the second trigger signal are sequentially asserted. The second shift registering unit includes a second pull-down circuit. The first pull-down circuit and the second pull-down circuit perform pull-down operations at different times. When the first pull-down circuit does not perform the pull-down operation, the second pull-down circuit performs pull-down operations to the first output terminal.
摘要翻译：提供一个移位寄存器，包括一个第一移位寄存单元和一个第二移位寄存单元。第一移位寄存单元在第一输出端产生第一触发信号，并包括第一下拉电路。第二移位寄存单元接收第一触发信号并在第二输出端产生第二触发信号。第一触发信号和第二触发信号被依次断言。第二移位登记单元包括第二下拉电路。第一下拉电路和第二下拉电路在不同时间执行下拉操作。当第一下拉电路不执行下拉操作时，第二下拉电路对第一输出端子执行下拉操作。

10. 发明授权

US08331524B2 Shift register circuit 有权
标题翻译：移位寄存器电路
公开(公告)号：US08331524B2
公开(公告)日：2012-12-11
申请号：US13110948
申请日：2011-05-19
申请人： Kuo-Hua Hsu , Chun-Hsin Liu , Yung-Chih Chen , Chih-Ying Lin , Kuo-Chang Su , Yu-Chung Yang
发明人： Kuo-Hua Hsu , Chun-Hsin Liu , Yung-Chih Chen , Chih-Ying Lin , Kuo-Chang Su , Yu-Chung Yang
IPC分类号： G11C19/00
CPC分类号： G11C19/28 , G09G2310/0286
摘要： A shift register circuit with waveform-shaping function includes plural shift register stages. Each shift register stage includes a first input unit, a pull-up unit, a pull-down circuit, a second input unit, a control unit and a waveform-shaping unit. The first input unit is utilized for outputting a first driving control voltage in response to a first gate signal. The pull-up unit pulls up a second gate signal in response to the first driving control voltage. The pull-down circuit is employed to pull down the first driving control voltage and the second gate signal. The second input unit is utilized for outputting a second driving control voltage in response to the first gate signal. The control unit provides a control signal in response to the second driving control voltage and an auxiliary signal. The waveform-shaping unit performs a waveform-shaping operation on the second gate signal in response to the control signal.
摘要翻译：具有波形整形功能的移位寄存器电路包括多个移位寄存器级。每个移位寄存器级包括第一输入单元，上拉单元，下拉电路，第二输入单元，控制单元和波形整形单元。第一输入单元用于响应于第一门信号输出第一驱动控制电压。上拉单元响应于第一驱动控制电压拉起第二门信号。下拉电路用于下拉第一驱动控制电压和第二栅极信号。第二输入单元用于响应于第一门信号输出第二驱动控制电压。控制单元响应于第二驱动控制电压和辅助信号提供控制信号。波形整形单元响应于控制信号对第二门信号执行波形整形操作。

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