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    • 1. 发明申请
    • SHIFT REGISTER CIRCUIT
    • 移位寄存器电路
    • US20110216877A1
    • 2011-09-08
    • US13110948
    • 2011-05-19
    • Kuo-Hua HsuChun-Hsin LiuYung-Chih ChenChih-Ying LinKuo-Chang SuYu-Chung Yang
    • Kuo-Hua HsuChun-Hsin LiuYung-Chih ChenChih-Ying LinKuo-Chang SuYu-Chung Yang
    • G11C19/00
    • G11C19/28G09G2310/0286
    • A shift register circuit with waveform-shaping function includes plural shift register stages. Each shift register stage includes a first input unit, a pull-up unit, a pull-down circuit, a second input unit, a control unit and a waveform-shaping unit. The first input unit is utilized for outputting a first driving control voltage in response to a first gate signal. The pull-up unit pulls up a second gate signal in response to the first driving control voltage. The pull-down circuit is employed to pull down the first driving control voltage and the second gate signal. The second input unit is utilized for outputting a second driving control voltage in response to the first gate signal. The control unit provides a control signal in response to the second driving control voltage and an auxiliary signal. The waveform-shaping unit performs a waveform-shaping operation on the second gate signal in response to the control signal.
    • 具有波形整形功能的移位寄存器电路包括多个移位寄存器级。 每个移位寄存器级包括第一输入单元,上拉单元,下拉电路,第二输入单元,控制单元和波形整形单元。 第一输入单元用于响应于第一门信号输出第一驱动控制电压。 上拉单元响应于第一驱动控制电压拉起第二门信号。 下拉电路用于下拉第一驱动控制电压和第二栅极信号。 第二输入单元用于响应于第一门信号输出第二驱动控制电压。 控制单元响应于第二驱动控制电压和辅助信号提供控制信号。 波形整形单元响应于控制信号对第二门信号执行波形整形操作。
    • 2. 发明授权
    • Shift register circuit
    • 移位寄存器电路
    • US08331524B2
    • 2012-12-11
    • US13110948
    • 2011-05-19
    • Kuo-Hua HsuChun-Hsin LiuYung-Chih ChenChih-Ying LinKuo-Chang SuYu-Chung Yang
    • Kuo-Hua HsuChun-Hsin LiuYung-Chih ChenChih-Ying LinKuo-Chang SuYu-Chung Yang
    • G11C19/00
    • G11C19/28G09G2310/0286
    • A shift register circuit with waveform-shaping function includes plural shift register stages. Each shift register stage includes a first input unit, a pull-up unit, a pull-down circuit, a second input unit, a control unit and a waveform-shaping unit. The first input unit is utilized for outputting a first driving control voltage in response to a first gate signal. The pull-up unit pulls up a second gate signal in response to the first driving control voltage. The pull-down circuit is employed to pull down the first driving control voltage and the second gate signal. The second input unit is utilized for outputting a second driving control voltage in response to the first gate signal. The control unit provides a control signal in response to the second driving control voltage and an auxiliary signal. The waveform-shaping unit performs a waveform-shaping operation on the second gate signal in response to the control signal.
    • 具有波形整形功能的移位寄存器电路包括多个移位寄存器级。 每个移位寄存器级包括第一输入单元,上拉单元,下拉电路,第二输入单元,控制单元和波形整形单元。 第一输入单元用于响应于第一门信号输出第一驱动控制电压。 上拉单元响应于第一驱动控制电压拉起第二门信号。 下拉电路用于下拉第一驱动控制电压和第二栅极信号。 第二输入单元用于响应于第一门信号输出第二驱动控制电压。 控制单元响应于第二驱动控制电压和辅助信号提供控制信号。 波形整形单元响应于控制信号对第二门信号执行波形整形操作。
    • 4. 发明申请
    • SHIFT REGISTER CIRCUIT
    • 移位寄存器电路
    • US20120140871A1
    • 2012-06-07
    • US13049863
    • 2011-03-16
    • Yu-Chung YangYung-Chih ChenKuo-Hua HsuKuo-Chang Su
    • Yu-Chung YangYung-Chih ChenKuo-Hua HsuKuo-Chang Su
    • G11C19/28G11C19/00
    • G09G3/20G09G3/3674G09G2310/0267G09G2310/0286G09G2310/08G09G2330/021G11C19/28
    • A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes an input unit, a pull-up unit, a pull-down unit, a control unit and an auxiliary pull-down unit. The input unit is put in use for outputting a driving control voltage according to at least one first input signal. The pull-up unit pulls up a corresponding gate signal according to the driving control voltage and a system clock. The pull-down unit pulls down the corresponding gate signal to a first power voltage according to a control signal. The control unit is utilized for generating the control signal according to the corresponding gate signal. The auxiliary pull-down unit pulls down the driving control voltage to a second power voltage according to a second input signal.
    • 移位寄存器电路包括用于提供多个门信号的多个移位寄存器级。 每个移位寄存器级包括输入单元,上拉单元,下拉单元,控制单元和辅助下拉单元。 输入单元被用于根据至少一个第一输入信号输出驱动控制电压。 上拉单元根据驱动控制电压和系统时钟提取相应的门信号。 下拉单元根据控制信号将相应的门信号拉低至第一电源电压。 控制单元用于根据相应的门信号产生控制信号。 辅助下拉单元根据第二输入信号将驱动控制电压下拉到第二电源电压。
    • 5. 发明授权
    • Shift register circuit
    • 移位寄存器电路
    • US08396183B2
    • 2013-03-12
    • US13049863
    • 2011-03-16
    • Yu-Chung YangYung-Chih ChenKuo-Hua HsuKuo-Chang Su
    • Yu-Chung YangYung-Chih ChenKuo-Hua HsuKuo-Chang Su
    • G11C19/00
    • G09G3/20G09G3/3674G09G2310/0267G09G2310/0286G09G2310/08G09G2330/021G11C19/28
    • A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes an input unit, a pull-up unit, a pull-down unit, a control unit and an auxiliary pull-down unit. The input unit is put in use for outputting a driving control voltage according to at least one first input signal. The pull-up unit pulls up a corresponding gate signal according to the driving control voltage and a system clock. The pull-down unit pulls down the corresponding gate signal to a first power voltage according to a control signal. The control unit is utilized for generating the control signal according to the corresponding gate signal. The auxiliary pull-down unit pulls down the driving control voltage to a second power voltage according to a second input signal.
    • 移位寄存器电路包括用于提供多个门信号的多个移位寄存器级。 每个移位寄存器级包括输入单元,上拉单元,下拉单元,控制单元和辅助下拉单元。 输入单元被用于根据至少一个第一输入信号输出驱动控制电压。 上拉单元根据驱动控制电压和系统时钟提取相应的门信号。 下拉单元根据控制信号将相应的门信号拉低至第一电源电压。 控制单元用于根据相应的门信号产生控制信号。 辅助下拉单元根据第二输入信号将驱动控制电压下拉到第二电源电压。
    • 8. 发明授权
    • Shift register circuit
    • 移位寄存器电路
    • US08351563B2
    • 2013-01-08
    • US13206518
    • 2011-08-10
    • Yu-Chung YangYung-Chih ChenKuo-Hua HsuKuo-Chang Su
    • Yu-Chung YangYung-Chih ChenKuo-Hua HsuKuo-Chang Su
    • G11C19/00
    • G09G3/3677G09G2310/0286G11C19/287
    • A shift register circuit includes plural shift register stages for providing plural gate signals. The Nth shift register stage of the shift register stages includes an input unit, a pull-up unit and a pull-down unit. The input unit is put in use for outputting an Nth driving control voltage according to an (N−1)th gate signal and an (N−2)th driving control voltage which are generated respectively by the (N−1) th shift register stage and the (N−2) th shift register stage of the shift register stages. The pull-up unit pulls up an Nth gate signal according to the Nth driving control voltage and a system clock. The pull-down unit pulls down the Nth gate signal and the Nth driving control voltage according to an (N+2)th gate signal generated by the (N+2)th shift register stage of the shift register stages.
    • 移位寄存器电路包括用于提供多个门信号的多个移位寄存器级。 移位寄存器级的第N个移位寄存器级包括一个输入单元,一个上拉单元和一个下拉单元。 输入单元被用于根据第(N-1)个第(N-1)个移位寄存器产生的第(N-1)门信号和第(N-2)个驱动控制电压来输出第N驱动控制电压 级和移位寄存器级的(N-2)移位寄存器级。 上拉单元根据第N个驱动控制电压和系统时钟提取第N个门信号。 下拉单元根据由移位寄存器级的第(N + 2)个移位寄存器级产生的第(N + 2)门信号来拉下第N栅极信号和第N驱动控制电压。
    • 10. 发明申请
    • SHIFT REGISTER CIRCUIT
    • 移位寄存器电路
    • US20120155604A1
    • 2012-06-21
    • US13206518
    • 2011-08-10
    • Yu-Chung YangYung-Chih ChenKuo-Hua HsuKuo-Chang Su
    • Yu-Chung YangYung-Chih ChenKuo-Hua HsuKuo-Chang Su
    • G11C19/28G11C19/00
    • G09G3/3677G09G2310/0286G11C19/287
    • A shift register circuit includes plural shift register stages for providing plural gate signals. The Nth shift register stage of the shift register stages includes an input unit, a pull-up unit and a pull-down unit. The input unit is put in use for outputting an Nth driving control voltage according to an (N−1)th gate signal and an (N−2)th driving control voltage which are generated respectively by the (N−1) th shift register stage and the (N−2) th shift register stage of the shift register stages. The pull-up unit pulls up an Nth gate signal according to the Nth driving control voltage and a system clock. The pull-down unit pulls down the Nth gate signal and the Nth driving control voltage according to an (N+2)th gate signal generated by the (N+2)th shift register stage of the shift register stages.
    • 移位寄存器电路包括用于提供多个门信号的多个移位寄存器级。 移位寄存器级的第N个移位寄存器级包括一个输入单元,一个上拉单元和一个下拉单元。 输入单元被用于根据第(N-1)个第(N-1)个移位寄存器产生的第(N-1)门信号和第(N-2)个驱动控制电压来输出第N驱动控制电压 级和移位寄存器级的(N-2)移位寄存器级。 上拉单元根据第N个驱动控制电压和系统时钟提取第N个门信号。 下拉单元根据由移位寄存器级的第(N + 2)个移位寄存器级产生的第(N + 2)门信号来拉下第N栅极信号和第N驱动控制电压。