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1. 发明授权

US5847443A Porous dielectric material with improved pore surface properties for electronics applications 失效
公开(公告)号：US5847443A
公开(公告)日：1998-12-08
申请号：US746689
申请日：1996-11-14
申请人： Chi-Chen Cho , Bruce E. Gnade , Douglas M. Smith , Jin Changming , William C. Ackerman , Gregory C. Johnston
发明人： Chi-Chen Cho , Bruce E. Gnade , Douglas M. Smith , Jin Changming , William C. Ackerman , Gregory C. Johnston
IPC分类号： H01L21/768 , H01L21/316 , H01L21/469 , H01L23/522 , H01L23/532 , H01L23/58
CPC分类号： H01L23/5329 , H01L21/7682 , H01L23/5222 , H01L2221/1047 , H01L2924/0002
摘要： This invention provides an improved porous structure for semiconductor devices and a process for making the same. This process may be applied to an existing porous structure 28, which may be deposited, for example, between patterned conductors 24. The method may comprise providing a substrate comprising a microelectronic circuit and a porous silica layer, the porous silica layer having an average pore diameter between 2 and 80 nm; and heating the substrate to one or more temperatures between 100 and 490 degrees C. in a substantially halogen-free atmosphere, whereby one or more dielectric properties of the porous dielectric are improved. In some embodiments, the atmosphere comprises a phenyl-containing atmosphere, such as hexaphenyldisilazane. In some embodiments, the method further comprises cooling the substrate and exposing the substrate to a substantially halogen-free atmosphere comprising either a phenyl-containing compound, such as hexaphenyldisilazane; or a methyl-containing compound, such as hexamethyldisilazane. It has been found that a porous structure treated in such a manner generally exhibits improved dielectric properties relative to an untreated sample.

2. 发明授权

US5523615A Porous dielectric material with improved pore surface properties for electronics applications 失效
标题翻译：多孔电介质材料，具有改进的孔表面性能，适用于电子应用
公开(公告)号：US5523615A
公开(公告)日：1996-06-04
申请号：US474273
申请日：1995-06-07
申请人： Chi-Chen Cho , Bruce E. Gnade , Douglas M. Smith
发明人： Chi-Chen Cho , Bruce E. Gnade , Douglas M. Smith
IPC分类号： H01L21/768 , H01L21/316 , H01L21/469 , H01L23/522 , H01L23/532 , H01L23/58 , H01L29/40
CPC分类号： H01L23/5329 , H01L21/7682 , H01L23/5222 , H01L2221/1047 , H01L2924/0002
摘要： This invention provides an improved porous structure for semiconductor devices and a process for making the same. This process may be applied to an existing porous structure 28, which may be deposited, for sample, between patterned conductors 24. The process may include baking the structure in a reducing atmosphere, preferably a forming gas, to dehydroxylate the pore surfaces. The process may include baking the structure in a halogen-containing atmosphere to bond halogens to the pore surfaces. It has been found that a porous structure treated in such a manner generally exhibits improved dielectric properties relative to an untreated sample.
摘要翻译：本发明提供一种用于半导体器件的改进的多孔结构及其制造方法。该方法可以应用于可以在图案化导体24之间沉积用于样品的现有多孔结构28.该方法可以包括在还原性气氛（优选形成气体）中烘烤该结构以使孔表面脱羟基化。该方法可以包括在含卤素气氛中烘烤该结构以将卤素键合到孔表面。已经发现，以这种方式处理的多孔结构通常相对于未处理的样品表现出改善的介电性能。

3. 发明授权

US5723368A Porous dielectric material with improved pore surface properties for electronics applications 失效
公开(公告)号：US5723368A
公开(公告)日：1998-03-03
申请号：US472683
申请日：1995-06-07
申请人： Chi-Chen Cho , Bruce E. Gnade , Douglas M. Smith
发明人： Chi-Chen Cho , Bruce E. Gnade , Douglas M. Smith
IPC分类号： H01L21/768 , H01L21/316 , H01L21/469 , H01L23/522 , H01L23/532
CPC分类号： H01L23/5329 , H01L21/7682 , H01L23/5222 , H01L2221/1047 , H01L2924/0002
摘要： This invention provides an improved porous structure for semiconductor devices and a process for making the same. This process may be applied to an existing porous structure 28, which may be deposited, for example, between patterned conductors 24. The process may include baking the structure in a reducing atmosphere, preferably a forming gas, to dehydroxylate the pore surfaces. The process may include baking the structure in a halogen-containing atmosphere to bond halogens to the pore surfaces. It has been found that a porous structure treated in such a manner generally exhibits improved dielectric properties relative to an untreated sample.

4. 发明授权

US5504042A Porous dielectric material with improved pore surface properties for electronics applications 失效
标题翻译：多孔电介质材料，具有改进的孔表面性能，适用于电子应用
公开(公告)号：US5504042A
公开(公告)日：1996-04-02
申请号：US263572
申请日：1994-06-23
申请人： Chi-Chen Cho , Bruce E. Gnade , Douglas M. Smith
发明人： Chi-Chen Cho , Bruce E. Gnade , Douglas M. Smith
IPC分类号： H01L21/768 , H01L21/316 , H01L21/469 , H01L23/522 , H01L23/532 , H01L21/324
CPC分类号： H01L23/5329 , H01L21/7682 , H01L23/5222 , H01L2221/1047 , H01L2924/0002
摘要： This invention provides an improved porous structure for semiconductor devices and a process for making the same. This process may be applied to an existing porous structure 28, which may be deposited, for example, between patterned conductors 24. The process may include baking the structure in a reducing atmosphere, preferably a forming gas, to dehydroxylate the pore surfaces. The process may include baking the structure in a halogen-containing atmosphere to bond halogens to the pore surfaces. It has been found that a porous structure treated in such a manner generally exhibits improved dielectric properties relative to an untreated sample.
摘要翻译：本发明提供一种用于半导体器件的改进的多孔结构及其制造方法。该方法可以应用于可以例如在图案化导体24之间沉积的现有的多孔结构28.该方法可以包括在还原气氛中烘烤该结构，优选地形成气体以使孔表面脱羟基化。该方法可以包括在含卤素气氛中烘烤该结构以将卤素键合到孔表面。已经发现，以这种方式处理的多孔结构通常相对于未处理的样品表现出改善的介电性能。

5. 发明授权

US06673715B2 Methods of forming conductive contacts 有权
公开(公告)号：US06673715B2
公开(公告)日：2004-01-06
申请号：US10002335
申请日：2001-10-24
申请人： Jigish D. Trivedi , Zhongze Wang , Chi-Chen Cho
发明人： Jigish D. Trivedi , Zhongze Wang , Chi-Chen Cho
IPC分类号： H01L2144
CPC分类号： H01L21/76888 , H01L21/76897
摘要： Methods of forming conductive contacts are described. According to one implementation, the method includes forming a transistor gate structure over a substrate. The gate structure includes a conductive silicide covered by insulative material. A dielectric layer is formed over the substrate and the gate structure. A contact opening is etched into the dielectric layer adjacent the gate structure. After the etching, the substrate is exposed to oxidizing conditions effective to oxidize any conductive silicide within the contact opening which was exposed during the contact opening etch. After the oxidizing, conductive material is formed within the contact opening. According to another embodiment, after the etching, it is determined whether conductive silicide of the gate structure was exposed during the etching. The substrate is then exposed to oxidizing conditions only if conductive silicide of the gate structure was exposed during the etching.

6. 发明授权

US06872660B2 Methods of forming conductive contacts 失效
标题翻译：形成导电触点的方法
公开(公告)号：US06872660B2
公开(公告)日：2005-03-29
申请号：US10703778
申请日：2003-11-07
申请人： Jigish D. Trivedi , Zhongze Wang , Chi-Chen Cho
发明人： Jigish D. Trivedi , Zhongze Wang , Chi-Chen Cho
IPC分类号： H01L21/60 , H01L21/768 , H01L21/44
CPC分类号： H01L21/76888 , H01L21/76897
摘要： Methods of forming conductive contacts are described. According to one implementation, the method includes forming a transistor gate structure over a substrate. The gate structure includes a conductive silicide covered by insulative material. A dielectric layer is formed over the substrate and the gate structure. A contact opening is etched into the dielectric layer adjacent the gate structure. After the etching, the substrate is exposed to oxidizing conditions effective to oxidize any conductive silicide within the contact opening which was exposed during the contact opening etch. After the oxidizing, conductive material is formed within the contact opening. According to another embodiment, after the etching, it is determined whether conductive silicide of the gate structure was exposed during the etching. The substrate is then exposed to oxidizing conditions only if conductive silicide of the gate structure was exposed during the etching.
摘要翻译：描述形成导电触头的方法。根据一个实施方案，该方法包括在衬底上形成晶体管栅极结构。栅极结构包括由绝缘材料覆盖的导电硅化物。在衬底和栅极结构之上形成介电层。接触开口被蚀刻到与栅极结构相邻的电介质层中。在蚀刻之后，将衬底暴露于有效氧化在接触开口蚀刻期间暴露的接触开口内的任何导电硅化物的氧化条件。在氧化之后，在接触开口内形成导电材料。根据另一实施例，在蚀刻之后，确定在蚀刻期间是否露出栅极结构的导电硅化物。只有当在蚀刻期间露出栅极结构的导电硅化物时，才将衬底暴露于氧化条件。

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