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    • 1. 发明授权
    • Thin film transistor, thin film transistor substrate, and methods for manufacturing the same
    • 薄膜晶体管,薄膜晶体管基板及其制造方法
    • US08139175B2
    • 2012-03-20
    • US12197416
    • 2008-08-25
    • Chin-Lung TingCheng-Chi Wang
    • Chin-Lung TingCheng-Chi Wang
    • G02F1/136
    • H01L29/78696H01L29/66757H01L29/78606H01L29/78675
    • A thin film transistor includes a channel layer of a specific shape, a thermal gradient inducer body, a gate insulating film, a gate electrode and an interlayer insulating film, a source electrode and a drain electrode. The channel layer is formed on a substrate. The channel layer has a nucleation region and a crystal end. The thermal gradient inducer body partially circumscribes the channel layer. The gate insulating film is formed on the substrate, and the channel layer is at least partially covered with the gate insulating film. The gate electrode is formed on the gate insulating film. The interlayer insulating film is formed on the gate insulating film, and the gate electrode is at least partially covered with the interlayer insulating film. The source electrode and the drain electrode are formed on the interlayer insulating film, passed through the gate insulating film and the interlayer insulating film, and electrically connected to the channel layer.
    • 薄膜晶体管包括特定形状的沟道层,热梯度诱导体,栅极绝缘膜,栅电极和层间绝缘膜,源电极和漏电极。 沟道层形成在基板上。 沟道层具有成核区域和晶体端部。 热梯度诱导体主体部分地界定通道层。 栅极绝缘膜形成在基板上,沟道层至少部分地被栅极绝缘膜覆盖。 栅电极形成在栅极绝缘膜上。 层间绝缘膜形成在栅极绝缘膜上,并且栅电极至少部分被层间绝缘膜覆盖。 源电极和漏极形成在层间绝缘膜上,通过栅极绝缘膜和层间绝缘膜,并与沟道层电连接。
    • 2. 发明申请
    • Thin Film Transistor, Thin Film Transistor Substrate, and Methods for Manufacturing the Same
    • 薄膜晶体管,薄膜晶体管基板及其制造方法
    • US20080316386A1
    • 2008-12-25
    • US12197416
    • 2008-08-25
    • Chin-Lung TingCheng-Chi Wang
    • Chin-Lung TingCheng-Chi Wang
    • G02F1/136
    • H01L29/78696H01L29/66757H01L29/78606H01L29/78675
    • A thin film transistor includes a channel layer of a specific shape, a thermal gradient inducer body, a gate insulating film, a gate electrode and an interlayer insulating film, a source electrode and a drain electrode. The channel layer is formed on a substrate. The channel layer has a nucleation region and a crystal end. The thermal gradient inducer body partially circumscribes the channel layer. The gate insulating film is formed on the substrate, and the channel layer is at least partially covered with the gate insulating film. The gate electrode is formed on the gate insulating film. The interlayer insulating film is formed on the gate insulating film, and the gate electrode is at least partially covered with the interlayer insulating film. The source electrode and the drain electrode are formed on the interlayer insulating film, passed through the gate insulating film and the interlayer insulating film, and electrically connected to the channel layer.
    • 薄膜晶体管包括特定形状的沟道层,热梯度诱导体,栅极绝缘膜,栅电极和层间绝缘膜,源电极和漏电极。 沟道层形成在基板上。 沟道层具有成核区域和晶体端部。 热梯度诱导体主体部分地界定通道层。 栅极绝缘膜形成在基板上,沟道层至少部分地被栅极绝缘膜覆盖。 栅电极形成在栅极绝缘膜上。 层间绝缘膜形成在栅极绝缘膜上,并且栅电极至少部分被层间绝缘膜覆盖。 源电极和漏极形成在层间绝缘膜上,通过栅极绝缘膜和层间绝缘膜,并与沟道层电连接。
    • 3. 发明授权
    • Thin film transistor, thin film transistor substrate, and methods for manufacturing the same
    • 薄膜晶体管,薄膜晶体管基板及其制造方法
    • US07432140B2
    • 2008-10-07
    • US11623214
    • 2007-01-15
    • Chin-Lung TingCheng-Chi Wang
    • Chin-Lung TingCheng-Chi Wang
    • H01L21/00
    • H01L29/78696H01L29/66757H01L29/78606H01L29/78675
    • A thin film transistor includes a channel layer of a specific shape, a thermal gradient inducer body, a gate insulating film, a gate electrode and an interlayer insulating film, a source electrode and a drain electrode. The channel layer is formed on a substrate. The channel layer has a nucleation region and a crystal end. The thermal gradient inducer body partially circumscribes the channel layer. The gate insulating film is formed on the substrate, and the channel layer is at least partially covered with the gate insulating film. The gate electrode is formed on the gate insulating film. The interlayer insulating film is formed on the gate insulating film, and the gate electrode is at least partially covered with the interlayer insulating film. The source electrode and the drain electrode are formed on the interlayer insulating film, passed through the gate insulating film and the interlayer insulating film, and electrically connected to the channel layer.
    • 薄膜晶体管包括特定形状的沟道层,热梯度诱导体,栅极绝缘膜,栅电极和层间绝缘膜,源电极和漏电极。 沟道层形成在基板上。 沟道层具有成核区域和晶体端部。 热梯度诱导体主体部分地界定通道层。 栅极绝缘膜形成在基板上,沟道层至少部分地被栅极绝缘膜覆盖。 栅电极形成在栅极绝缘膜上。 层间绝缘膜形成在栅极绝缘膜上,并且栅电极至少部分被层间绝缘膜覆盖。 源电极和漏极形成在层间绝缘膜上,通过栅极绝缘膜和层间绝缘膜,并与沟道层电连接。
    • 4. 发明授权
    • Thin film transistor structure
    • 薄膜晶体管结构
    • US06998640B2
    • 2006-02-14
    • US10659117
    • 2003-09-10
    • Cheng-Chi WangChin-Lung Ting
    • Cheng-Chi WangChin-Lung Ting
    • H01L29/04
    • H01L29/66765
    • The invention provides a method of manufacturing a thin film transistor capable of reducing the induced photo-electric current and thus improving the quality of the liquid crystal display, and reducing the number of required photo masks saving on the cost of fabrication. A stack structure is formed first, by successively depositing a gate electrode, a first insulation layer, a semiconductor layer, an ohmic contact layer, and a photoresist layer. Subsequently, a second insulation layer is deposited on the substrate, and the photoresist layer and the second insulation layer on the photoresist layer are removed in a lift-off process. Last, a source electrode, a drain electrode, a passivation layer, and a transparent electrode layer, are formed to complete the thin film transistor process.
    • 本发明提供了一种能够减少感应光电流并因此提高液晶显示器质量的薄膜晶体管的制造方法,并且减少了所需的照相掩模的数量,从而节省了制造成本。 首先通过依次沉积栅电极,第一绝缘层,半导体层,欧姆接触层和光致抗蚀剂层来形成堆叠结构。 随后,在衬底上沉积第二绝缘层,并且在剥离过程中去除光致抗蚀剂层上的光致抗蚀剂层和第二绝缘层。 最后,形成源电极,漏电极,钝化层和透明电极层,以完成薄膜晶体管工艺。
    • 5. 发明授权
    • Method of manufacturing liquid crystal display
    • 制造液晶显示器的方法
    • US07796235B2
    • 2010-09-14
    • US11446164
    • 2006-06-05
    • Chin-Lung TingChun-Bin Wen
    • Chin-Lung TingChun-Bin Wen
    • G02F1/13G02F1/1333G02F1/1335
    • G02F1/133351G02F1/133528H01L27/1214
    • In a method of manufacturing a liquid crystal display, first, a panel assembly structure including a first substrate, a second substrate and several sealants connecting inner surfaces of the first and second substrate is provided. The first substrate includes several third substrates. The second substrate includes several fourth substrates corresponding to the third substrates, respectively. Each third substrate, the corresponding fourth substrate and the corresponding sealant form a panel. First and second polarizers are adhered correspondingly to outer surfaces of the third and fourth substrates. The panels are separated after the adherence of the first and second polarizers.
    • 在制造液晶显示器的方法中,首先,提供包括第一基板,第二基板和连接第一和第二基板的内表面的多个密封剂的面板组装结构。 第一衬底包括几个第三衬底。 第二基板分别包括对应于第三基板的几个第四基板。 每个第三衬底,相应的第四衬底和相应的密封剂形成一个面板。 第一和第二偏振器相应地粘附在第三和第四基板的外表面上。 在第一和第二偏振器的粘附之后,将面板分开。
    • 7. 发明授权
    • Multi-domain vertical alignment liquid crystal display and driving method thereof
    • 多域垂直取向液晶显示及其驱动方法
    • US06922183B2
    • 2005-07-26
    • US10285412
    • 2002-11-01
    • Chin-Lung TingWen-Fu Huang
    • Chin-Lung TingWen-Fu Huang
    • G02F1/1333G02F1/1343G02F1/136G02F1/139G09G3/36
    • G02F1/133707G02F1/134336G02F1/13624G02F1/1393G02F2001/134345G09G3/3614G09G3/3659G09G2300/0434G09G2320/0209G09G2320/0247G09G2320/0252G09G2330/08
    • A multi-domain vertical alignment (MVA) liquid crystal display (LCD), including a first substrate and a second substrate, a common electrode, a number of pixel electrodes, a number of first switches and second switches, and liquid crystals (LCs). The common electrode is formed on one surface of the first substrate. The pixel electrodes are formed on a surface of the second substrate and are opposite to the common electrode. Each of the pixel electrodes includes a slit and a first sub-pixel electrode and a second sub-pixel electrode which are electrically isolated to each other by the slit. Each of the first switches is used for controlling corresponding first sub-pixel electrode, and each of the second switches is used for controlling corresponding second sub-pixel electrode. The liquid crystals (LCs) are sealed between the first substrate and the second substrate. The first and second sub-pixel electrodes of one of the pixel electrodes incline the liquid crystals in the proximity of the slit when the corresponding first and the second switches are enabled and data signals of opposite polarities are respectively applied to the first sub-pixel electrode and the second sub-pixel of the one of the pixel electrode.
    • 包括第一基板和第二基板的多畴垂直取向(MVA)液晶显示器(LCD),公共电极,多个像素电极,多个第一开关和第二开关以及液晶(LC) 。 公共电极形成在第一基板的一个表面上。 像素电极形成在第二基板的表面上并且与公共电极相对。 每个像素电极包括狭缝和通过狭缝彼此电隔离的第一子像素电极和第二子像素电极。 每个第一开关用于控制对应的第一子像素电极,并且每个第二开关用于控制相应的第二子像素电极。 液晶(LC)被密封在第一基板和第二基板之间。 当对应的第一和第二开关被使能时,像素电极之一的第一和第二子像素电极使狭缝附近的液晶倾斜,并且将相反极性的数据信号分别施加到第一子像素电极 和像素电极之一的第二子像素。
    • 10. 发明授权
    • Apparatus for testing flat panel display
    • 用于测试平板显示器的装置
    • US06281701B1
    • 2001-08-28
    • US09325771
    • 1999-06-04
    • Jenn-Fang YangWen-Jyh SahChin-Lung Ting
    • Jenn-Fang YangWen-Jyh SahChin-Lung Ting
    • G01R3100
    • G09G3/006
    • Apparatus for testing flat panel display (liquid crystal display) panel is disclosed herein. Testing apparatus for sending a plurality of electrical signals to a plurality of pads of a display panel, the testing apparatus includes the following devices. A plurality of probe pins is used to contact the plurality of pads of the display panel. The amount of the plurality of probe pins in the present invention is larger than the amount of the plurality of pads, besides, the pitches between the plurality of probe pins is smaller than the width of etch of the plurality of pads of the display panel. The signal generating means is used to generate the signals to be sent to the plurality of pads of the display panel through the plurality of probe pins. The switching means is used to provide the conductive paths between the signal generating means and the plurality of probe pins.
    • 本文公开了用于测试平板显示器(液晶显示器)面板的装置。 用于将多个电信号发送到显示面板的多个焊盘的测试装置,所述测试装置包括以下装置。 使用多个探针来接触显示面板的多个焊盘。 本发明中的多个探针的量大于多个焊盘的数量,此外,多个探针之间的间距小于显示面板的多个焊盘的蚀刻宽度。 信号发生装置用于通过多个探针产生要发送到显示面板的多个焊盘的信号。 开关装置用于在信号发生装置和多个探针之间提供导电路径。