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    • 2. 发明授权
    • Infrared sensor and method of calibrating the same
    • 红外传感器及其校准方法
    • US07795589B2
    • 2010-09-14
    • US12175304
    • 2008-07-17
    • Seth PrejeanMiguel Santana, Jr.Ronald M. Potok
    • Seth PrejeanMiguel Santana, Jr.Ronald M. Potok
    • G01J5/02
    • G12B13/00
    • A method includes determining a transmission of a transmissive window and a transmission of a transmissive fluid. In addition, an infrared emission of the transmissive window is determined along with an infrared emission of the transmissive fluid for at least one temperature. In a system that has an infrared sensor and an optical pathway to the infrared sensor, the transmissive window and the transmissive fluid are placed in the optical pathway. A semiconductor chip is placed in the optical pathway proximate the transmissive fluid. Radiation from the optical pathway is measured with the infrared sensor. An emissivity of the semiconductor chip is determined using the measured radiation and the determined transmissions and emissions of the transmissive window and the transmissive fluid.
    • 一种方法包括确定透射窗的透射和透射流体的透射。 此外,透射窗的红外发射与至少一个温度的透射流体的红外发射一起确定。 在具有红外传感器和到红外传感器的光路的系统中,透射窗和透射流体被放置在光路中。 将半导体芯片放置在靠近透射流体的光学路径中。 用红外线传感器测量光路径的辐射。 使用所测量的辐射和所确定的透射窗和透射流体的透射和发射来确定半导体芯片的发射率。
    • 5. 发明授权
    • Position-selective and material-selective silicon etching to form measurement structures for semiconductor fabrication
    • 位置选择性和材料选择性硅蚀刻,以形成用于半导体制造的测量结构
    • US06507044B1
    • 2003-01-14
    • US09277024
    • 1999-03-25
    • Miguel Santana, Jr.Markangelo S. D'Souza
    • Miguel Santana, Jr.Markangelo S. D'Souza
    • H01L2358
    • H01L22/34H01L2924/0002H01L2924/00
    • A method for position-selective and material-selective etching of silicon, and examination structures formed using the method, are presented. A semiconductor topography is exposed to an electron beam in the presence of xenon difluoride (XeF2) gas. The beam is scanned over a portion of the semiconductor topography, and silicon portions of the topography contacted by the electron beam and the XeF2 gas are etched. Non-silicon portions, such as dielectrics, metals, and/or metal silicides, are not believed to be etched. Shorter exposure times may be used to remove polycrystalline silicon portions of a topography, while leaving monocrystalline silicon portions intact. Removal of silicon and non-silicon portions of the topography by other means may be used to expose silicon portions of the topography. The electron beam controlled etching recited herein may be used alone or combined with such removal by other means to form examination structures for use in evaluation of semiconductor manufacturing techniques.
    • 提出了一种用于硅的位置选择和材料选择性蚀刻的方法,以及使用该方法形成的检查结构。 半导体形貌在二氟化氙(XeF 2)气体存在下暴露于电子束。 在半导体拓扑的一部分上扫描光束,并且蚀刻与电子束和XeF 2气体接触的形貌的硅部分。 不认为非硅部分,例如电介质,金属和/或金属硅化物被蚀刻。 较短的曝光时间可用于去除形貌的多晶硅部分,同时保留单晶硅部分。 通过其他方法去除地形的硅和非硅部分可以用于暴露地形的硅部分。 本文所述的电子束控制蚀刻可以单独使用或通过其它方式与这种去除组合使用,以形成用于评估半导体制造技术的检查结构。
    • 8. 发明授权
    • Photon detection enhancement of superconducting hot-electron photodetectors
    • 超导热电子探测器的光子检测增强
    • US06828809B1
    • 2004-12-07
    • US10324324
    • 2002-12-20
    • Michael R. BruceRobert PowellBrennan DavisRama GoruganthuThomas ChuMiguel Santana, Jr.
    • Michael R. BruceRobert PowellBrennan DavisRama GoruganthuThomas ChuMiguel Santana, Jr.
    • G01R31302
    • G01R31/308
    • Various methods of hot-electron imaging a workpiece are provided. In one aspect, a method of examining a workpiece is provided that includes directing a first photon at a photodetector at a first known time and stimulating a circuit device of the workpiece at a second known time to produce a condition in the circuit device conducive to photon emission. At least one photon emitted by the circuit device in response to the stimulation is detected. The first photon increases the quantum efficiency of the photodetector in detecting the at least one photon. The detection of the at least one photon relative to the first known time and the second known time is time correlated to temporally distinguish the first photon and the at least one photon and to temporally correlate the stimulation of the circuit device to the detection of the at least one photon.
    • 提供了对工件进行热电子成像的各种方法。 在一个方面,提供了一种检查工件的方法,其包括在第一已知时间引导光电检测器处的​​第一光子并在第二已知时间刺激工件的电路装置,以产生有利于光子的电路器件中的状态 排放。 检测由电路装置响应于刺激而发射的至少一个光子。 在检测至少一个光子时,第一光子增加了光电检测器的量子效率。 相对于第一已知时间和第二已知时间的至少一个光子的检测是时间相关的,以便在时间上区分第一光子和至少一个光子,并且将电路装置的刺激与at 至少一个光子。
    • 9. 发明授权
    • Highly selective, highly uniform plasma etch process for spin-on glass
    • 用于旋涂玻璃的高选择性,高度均匀的等离子体蚀刻工艺
    • US5549786A
    • 1996-08-27
    • US520758
    • 1995-08-29
    • Stephen A. JonesShyam G. GargJames F. BullerMiguel Santana, Jr.
    • Stephen A. JonesShyam G. GargJames F. BullerMiguel Santana, Jr.
    • H01L21/311H01L21/00
    • H01L21/31116
    • An SOG plasma etch process is presented which is optimized for selectivity to PECVD silicon nitride. The present process also produces a uniform etch across the exposed surface of a semiconductor wafer. The etch process finds utility in dielectric-SOG-dielectric structures used as passivation layers. Silicon nitride is deposited using a PECVD technique to form the dielectric layers. By etching SOG at a faster rate than the rate at which it etches PECVD silicon nitride, the SOG plasma etch process removes enough of the SOG layer to prevent delamination problems associated with SOG layers interposed between dielectric layers without significantly reducing the thickness of the first dielectric layer. SOG remains only in troughs between closely-spaced interconnects and adjacent to the vertical steps between widely-spaced interconnects. Flow rates of He, CHF.sub.3, and N.sub.2 gases are established through a reaction chamber of a plasma etch system. The method includes pre-stabilizing steps, followed by an etch step, which is then followed by a post-stabilizing step and a particle removal or by-product flush step.
    • 提出了针对PECVD氮化硅的选择性优化的SOG等离子体蚀刻工艺。 本方法还在半导体晶片的暴露表面上产生均匀蚀刻。 蚀刻工艺在用作钝化层的介电SOG介电结构中发挥作用。 使用PECVD技术沉积氮化硅以形成电介质层。 通过以比其蚀刻PECVD氮化硅的速率更快的速率蚀刻SOG,SOG等离子体蚀刻工艺去除足够的SOG层,以防止与介于介电层之间的SOG层相关的分层问题,而不显着地减小第一电介质的厚度 层。 SOG仅保留在紧密间隔的互连之间的槽中,并且与广泛间隔的互连之间的垂直台阶相邻。 通过等离子体蚀刻系统的反应室建立He,CHF 3和N 2气体的流速。 该方法包括预稳定步骤,随后是蚀刻步骤,然后进行后稳定化步骤和颗粒去除或副产物冲洗步骤。