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    • 1. 发明申请
    • Method and apparatus for automating the design of programmable logic devices
    • 用于自动化可编程逻辑器件设计的方法和装置
    • US20050183055A1
    • 2005-08-18
    • US10771596
    • 2004-02-04
    • Alfredo Herrera
    • Alfredo Herrera
    • G06F17/50
    • G06F17/5054G06F17/5072
    • The design of programmable logic devices, such as FPGAs, may be automated to allow scripts, setup files, and other tool files to be created directly from hollowed and filled netlist, and data-path and design constraint files without extensive human intervention. This allows an FPGA design to be created directly from a logic file to accelerate the FPGA design process. Once hollowed and filled netlists, and data-path and design constraint files have been generated from a design in a standard fashion, the implementation of that design onto an FPGA in an optimized fashion is automated by providing a computer program that is capable of implementing the design, testing the design, evaluating the test results, and altering the design to arrive at a more optimal design. The process may include several steps, such as initial placement of logic groups, sizing of logic groups and FPGA selection, timing analysis, and filled netlist complete design review. The steps may be iterative.
    • 可编程逻辑器件(例如FPGA)的设计可以自动化,以便直接从中空填充的网表,数据路径和设计约束文件直接创建脚本,设置文件和其他工具文件,而无需广泛的人为干预。 这允许直接从逻辑文件创建FPGA设计,以加速FPGA设计过程。 一旦中空和填充的网表,并且已经以标准方式从设计生成了数据路径和设计约束文件,则以优化的方式将该设计实现到FPGA上,通过提供能够实现 设计,测试设计,评估测试结果,改变设计以获得更优化的设计。 该过程可以包括几个步骤,例如逻辑组的初始放置,逻辑组的大小和FPGA选择,时序分析和填充的网表完整设计审查。 这些步骤可能是迭代的。