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1. 发明授权

US5978029A Real-time encoding of video sequence employing two encoders and statistical analysis 失效
标题翻译：使用两个编码器的视频序列的实时编码和统计分析
公开(公告)号：US5978029A
公开(公告)日：1999-11-02
申请号：US8281
申请日：1998-01-16
申请人： Charles E. Boice , Barbara A. Hall , John M. Kaczmarczyk , Agnes Yee Ngai , Stephen P. Pokrinchak
发明人： Charles E. Boice , Barbara A. Hall , John M. Kaczmarczyk , Agnes Yee Ngai , Stephen P. Pokrinchak
IPC分类号： H04N7/32 , G06T9/00 , H03M7/30 , H04N7/26 , H04N7/50 , H04N7/36
CPC分类号： H04N19/87 , H04N19/124 , H04N19/137 , H04N19/14 , H04N19/142 , H04N19/149 , H04N19/154 , H04N19/176 , H04N19/179 , H04N19/61 , H04N19/85 , H04N19/146 , H04N19/30
摘要： Method, system and computer program product are provided for adaptively encoding in hardware, software or a combination thereof a sequence of video frames in real-time. A first encoding subsystem analyzes the sequence of video frames to derive information on at least one characteristic thereof, such as motion statistics, non-motion statistics, scene change statistics, or scene fade statistics. The gathered information may be either an intraframe characteristic or an interframe characteristic. A control processor is coupled to the first encoding subsystem to automatically analyze the gathered information in real time and dynamically produce a set of control parameters. A second encoding subsystem, coupled to the control processor, then encodes each frame of the sequence of video frames employing the corresponding set of control parameters.
摘要翻译：提供方法，系统和计算机程序产品，用于在硬件，软件或其组合中自动编码一系列视频帧。第一编码子系统分析视频帧的序列以得到关于其至少一个特征的信息，例如运动统计，非运动统计，场景变化统计或场景渐变统计。所收集的信息可以是帧内特性或帧间特性。控制处理器耦合到第一编码子系统以实时自动分析所收集的信息，并且动态地产生一组控制参数。耦合到控制处理器的第二编码子系统然后使用相应的一组控制参数对视频帧序列的每个帧进行编码。

2. 发明授权

US6040875A Method to compensate for a fade in a digital video input sequence 失效
标题翻译：补偿数字视频输入序列中的褪色的方法
公开(公告)号：US6040875A
公开(公告)日：2000-03-21
申请号：US046290
申请日：1998-03-23
申请人： Charles E. Boice , John M. Kaczmarczyk , Agnes Y. Ngai , Michael P. Vachon
发明人： Charles E. Boice , John M. Kaczmarczyk , Agnes Y. Ngai , Michael P. Vachon
IPC分类号： H04N5/265 , H04N7/26 , H04N7/50 , H04N9/74 , H04N5/14 , H04N7/12
CPC分类号： H04N5/265
摘要： A method to compensate for a fade in a digital video input sequence is provided where the video input sequence is to be compressed according to the MPEG-2 video compression standard. The method comprises a first step of dividing each frame of a current frame into two fields. In a second step, each field of the current frame is divided into at least one field band. In a third step, the luminance and chrominance pixel values are individually summed for the pixels in each field of the current frame. In a fourth step, the luminance pixel values are summed for the pixels in each field band of the current frame. In a fifth step, each respective field band sum and field sum of the current frame is compared with that of the previous frame in the video input sequence. In a sixth step, detection of whether or not a fade has occurred is provided, based upon the comparison in the fifth step. In a seventh step, the encoding algorithm is adjusted if a fade has occurred. Lastly, the first through seventh steps are repeated for at least one subsequent frame in the input video sequence.
摘要翻译：提供一种补偿数字视频输入序列中的褪色的方法，其中视频输入序列将根据MPEG-2视频压缩标准进行压缩。该方法包括将当前帧的每帧划分成两个场的第一步骤。在第二步骤中，当前帧的每个场被划分成至少一个场频带。在第三步骤中，针对当前帧的每个场中的像素对亮度和色度像素值进行单独相加。在第四步骤中，针对当前帧的每个场频带中的像素求和亮度像素值。在第五步骤中，将当前帧的每个相应的场频和和和与视频输入序列中的前一帧的场和进行比较。在第六步骤中，基于第五步的比较，提供是否发生褪色的检测。在第七步中，如果发生褪色，则调整编码算法。最后，对输入视频序列中的至少一个后续帧重复第一至第七步骤。

3. 发明授权

US06198772B1 Motion estimation processor for a digital video encoder 失效
标题翻译：用于数字视频编码器的运动估计处理器
公开(公告)号：US06198772B1
公开(公告)日：2001-03-06
申请号：US08996856
申请日：1997-12-23
申请人： Charles E. Boice , Lawrence D. Curley , John M. Kaczmarczyk , Agnes Y. Ngai , Charles J. Stein
发明人： Charles E. Boice , Lawrence D. Curley , John M. Kaczmarczyk , Agnes Y. Ngai , Charles J. Stein
IPC分类号： H04N750
CPC分类号： H04N19/423 , H04N5/147 , H04N11/044 , H04N11/20 , H04N19/42 , H04N19/61
摘要： A digital video encoder system having a motion estimation processor, and an interface to the motion estimation processor. The motion estimation processor includes a reference memory interface, and inverse quantization processor, an inverse discrete cosine transform processor, and a motion estimation processor unit including a hierarchal search unit. The motion estimation processor is utilized generating temporally compressed datastreams, that is, I-P and I-P-B datastreams.
摘要翻译：一种具有运动估计处理器的数字视频编码器系统以及与运动估计处理器的接口。运动估计处理器包括参考存储器接口和逆量化处理器，反相离散余弦变换处理器，以及包括分级搜索单元的运动估计处理器单元。使用运动估计处理器来生成时间压缩的数据流，即I-P和I-P-B数据流。

4. 发明授权

US07278681B2 Vehicle console 有权
公开(公告)号：US07278681B2
公开(公告)日：2007-10-09
申请号：US11232506
申请日：2005-09-22
申请人： Lev Lilov , Chain S. Sandhu , John M. Kaczmarczyk
发明人： Lev Lilov , Chain S. Sandhu , John M. Kaczmarczyk
IPC分类号： A47C7/62
CPC分类号： B60R7/04 , B60N2/773 , B60N2/793
摘要： A vehicle console with unique utilitarian features. One feature includes a table member that extends from a compartment to provide at least a writing surface. Another feature includes a slideable armrest and tray device. The tray device includes a rotatable tray that alternately provides a tray and a writing surface. Yet another feature is a storage compartment that can be opened by rotating the compartment about an axis.

5. 发明授权

US5625796A Method and apparatus for concurrently accessing multiple memories with different timing requirements 失效
标题翻译：用于同时访问具有不同时序要求的多个存储器的方法和装置
公开(公告)号：US5625796A
公开(公告)日：1997-04-29
申请号：US584725
申请日：1996-01-11
申请人： John M. Kaczmarczyk , Dale R. Buchholz , Jeffrey A. Slawecki
发明人： John M. Kaczmarczyk , Dale R. Buchholz , Jeffrey A. Slawecki
IPC分类号： G06F15/16 , G06F9/52 , G06F12/06 , G06F13/16 , G06F15/177
CPC分类号： G06F13/1663 , G06F13/1657 , G06F13/1689
摘要： A data processing system in which a plurality of processors or other memory access devices operate either synchronously or asynchronously with a memory interface device, which in turn provides access to one or more memory units on a time-division basis. This is accomplished by providing each memory unit a series of time-divisioned access opportunities and controlling the phase relationship between these time-divisioned access opportunities. Accordingly, two or more access devices can address an equal number of memory units simultaneously.
摘要翻译：一种数据处理系统，其中多个处理器或其他存储器访问设备与存储器接口设备同步地或异步地操作，该存储器接口设备又在时分的基础上提供对一个或多个存储器单元的访问。这通过为每个存储器单元提供一系列时间分割的访问机会并且控制这些时分的访问机会之间的阶段关系来实现。因此，两个或多个访问设备可以同时寻址相同数量的存储器单元。

6. 发明授权

US06961378B1 On-chip dynamic buffer level indicators for digital video encoder 失效
标题翻译：用于数字视频编码器的片上动态缓冲器电平指示器
公开(公告)号：US06961378B1
公开(公告)日：2005-11-01
申请号：US09186584
申请日：1998-11-05
申请人： James D. Greenfield , John M. Kaczmarczyk , Agnes Y. Ngai
发明人： James D. Greenfield , John M. Kaczmarczyk , Agnes Y. Ngai
IPC分类号： H04N7/26 , H04N7/32 , H04N7/46 , H04N7/50
CPC分类号： H04N19/00 , H04N19/152 , H04N19/50 , H04N19/51 , H04N19/577 , H04N19/61
摘要： Method and encoder for encoding a digital video image stream. The encoding includes spatial compression of still images in the video stream and temporal compression between the still images. The spatial compression is carried out by converting a time domain image of a macroblock to a frequency domain image of the macroblock, taking the discrete cosine transform of the frequency domain image, transforming the discrete cosine transformed macroblock image by a quantization factor, and run length encoding the quantized discrete cosine transformed macroblock image. The temporal compression is carried out by reconstructing the run length encoded, quantized, discrete cosine transformed image of the macroblock, searching for a best match macroblock, and constructing a motion vector between them. This forms a bitstream of run length encoded, quantized, discrete cosine transform macroblocks and of motion vectors. This bitstream is passed to and through an external buffer to a transmission medium. The number encoded bits read by a host from the external buffer is fed back to the encoder for calculation in real time of a dynamic buffer level indicator indicative of the fullness of the external buffer. The encoder may generate a BUFFER—EMPTY flag, BUFFER—ALMOST—FULL flag and/or BUFFER—FULL flag for the host.
摘要翻译：用于对数字视频图像流进行编码的方法和编码器。编码包括视频流中的静止图像的空间压缩和静止图像之间的时间压缩。空间压缩通过将宏块的时域图像转换为宏块的频域图像，以频域图像的离散余弦变换为单位，将离散余弦变换的宏块图像变换为量化因子，运行长度对量化的离散余弦变换宏块图像进行编码。通过重建宏块的游程长度编码，量化，离散余弦变换图像，搜索最佳匹配宏块，并在它们之间构建运动矢量来执行时间压缩。这形成游程长度编码，量化，离散余弦变换宏块和运动矢量的比特流。该比特流被传递到外部缓冲器并传送到传输介质。主机从外部缓冲器读取的编码比特数被反馈给编码器，用于实时地计算表示外部缓冲器的饱和度的动态缓冲器级别指示符。编码器可以生成BUFFER EMPTY标志，BUFFER _{- ALMOST _{- FULL标志和/或BUFFER _{- FULL 标志为主机。}}}

7. 发明授权

US6040861A Adaptive real-time encoding of video sequence employing image statistics 失效
标题翻译：使用图像统计的视频序列的自适应实时编码
公开(公告)号：US6040861A
公开(公告)日：2000-03-21
申请号：US948442
申请日：1997-10-10
申请人： Lilla Boroczky , Charlene Ann Gebler , John M. Kaczmarczyk , Edward F. Westermann , Robert L. Woodard
发明人： Lilla Boroczky , Charlene Ann Gebler , John M. Kaczmarczyk , Edward F. Westermann , Robert L. Woodard
IPC分类号： G06T9/00 , H04N7/26 , H04N7/50 , H04N7/18
CPC分类号： H04N19/87 , H04N19/124 , H04N19/137 , H04N19/14 , H04N19/142 , H04N19/149 , H04N19/154 , H04N19/176 , H04N19/179 , H04N19/85
摘要： Method, system and computer program product are provided for adaptively encoding in hardware, software or a combination thereof a sequence of video frames in real-time. A first encoding subsystem is employed to analyze the sequence of video frames to derive information on at least one characteristic thereof, such as motion statistics, non-motion statistics, scene change statistics, or scene fade statistics. The gathered information may comprise either an intraframe characteristic or an interframe characteristic. A second encoding subsystem, coupled to the first encoding subsystem, encodes the sequence of video frames employing at least one controllable parameter. The second encoding subsystem dynamically adapts intraframe or interframe encoding of the sequence of video frames by adjusting the at least one controllable parameter used in the encoding process in response to the derived information from the first encoding subsystem.
摘要翻译：提供方法，系统和计算机程序产品，用于在硬件，软件或其组合中自动编码一系列视频帧。使用第一编码子系统来分析视频帧的序列以得到关于其至少一个特征的信息，例如运动统计，非运动统计，场景变化统计或场景渐变统计。收集的信息可以包括帧内特性或帧间特性。耦合到第一编码子系统的第二编码子系统使用至少一个可控参数对视频帧序列进行编码。第二编码子系统通过响应于来自第一编码子系统的导出信息调整编码过程中使用的至少一个可控参数来动态地适应视频帧序列的帧内或帧间编码。

8. 发明授权

US5477541A Addressing technique for storing and referencing packet data 失效
标题翻译：用于存储和引用分组数据的寻址技术
公开(公告)号：US5477541A
公开(公告)日：1995-12-19
申请号：US165789
申请日：1993-12-13
申请人： Richard E. White , Dale R. Buchholz , Thomas A. Freeburg , Hungkun J. Chang , Michael P. Nolan , John M. Kaczmarczyk , Lisa B. Johanson
发明人： Richard E. White , Dale R. Buchholz , Thomas A. Freeburg , Hungkun J. Chang , Michael P. Nolan , John M. Kaczmarczyk , Lisa B. Johanson
IPC分类号： G06F13/42 , H04B1/16 , H04B1/38 , H04L12/56 , H04L12/64 , H04M1/73 , H04W92/02
CPC分类号： H04W92/02 , G06F13/423 , H04B1/1615 , H04B1/38 , H04L12/56 , H04L12/64 , H04L12/6402 , H04W52/0245
摘要： A hierarchical addressing technique is employed in a packet communications system to enhance flexibility in storing and referencing packet information. This method permits packet message data and certain packet control data to be stored in memory locations without having to be duplicated at a different memory location prior to transmission of the packet. This method is preferably employed in a ring configuration in which a series of packets have addressing mechanisms which points sequentially to each other to form a ring of packets received or to be transmitted.
摘要翻译：在分组通信系统中采用分层寻址技术来提高存储和参考分组信息的灵活性。该方法允许分组消息数据和某些分组控制数据存储在存储器位置中，而不必在传输分组之前在不同的存储器位置被复制。该方法优选地采用环形配置，其中一系列分组具有彼此顺序指向以形成接收或要发送的分组环的寻址机制。

9. 发明授权

US5495482A Packet transmission system and method utilizing both a data bus and dedicated control lines 失效
标题翻译：分组传输系统和方法利用数据总线和专用控制线
公开(公告)号：US5495482A
公开(公告)日：1996-02-27
申请号：US719212
申请日：1991-06-21
申请人： Richard E. White , Dale R. Buchholz , Thomas A. Freeburg , John M. Kaczmarczyk , Rita O'Brien
发明人： Richard E. White , Dale R. Buchholz , Thomas A. Freeburg , John M. Kaczmarczyk , Rita O'Brien
IPC分类号： G06F13/42 , H04B1/16 , H04B1/38 , H04L12/56 , H04L12/64 , H04M1/73 , H04W92/02 , H04L12/40
CPC分类号： H04W92/02 , G06F13/423 , H04B1/1615 , H04B1/38 , H04J3/0697 , H04L12/56 , H04L12/64 , H04L12/6402 , H04W52/0245
摘要： A common communication controller is linked to a plurality of peripheral devices by a network interface bus. Packets containing information is communicated between the controller and the peripherals over the bus which consists of a parallel packet bus and a plurality of control lines utilized to implement a communication protocol which increases the efficiencies of packet communications by the utilization of additional direct command lines between the communications controller and peripherals.
摘要翻译：公共通信控制器通过网络接口总线链接到多个外围设备。包含信息的包通过总线通过总线传送，该总线由并行包总线和用于实现通信协议的多个控制线组成，该通信协议通过利用附加的直接命令行来提高分组通信的效率通信控制器和外设。

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