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    • 10. 发明授权
    • Shielded gate trench MOSFET device and fabrication
    • 屏蔽栅沟槽MOSFET器件和制造
    • US08193580B2
    • 2012-06-05
    • US12583191
    • 2009-08-14
    • John ChenIl Kwan LeeHong ChangWenjun LiAnup BhallaHamza Yilmaz
    • John ChenIl Kwan LeeHong ChangWenjun LiAnup BhallaHamza Yilmaz
    • H01L29/78
    • H01L29/7813H01L29/407H01L29/41766H01L29/42368H01L29/42372H01L29/4238H01L29/66719H01L29/66727H01L29/66734H01L29/7811
    • A semiconductor device embodiment includes a substrate, an active gate trench in the substrate, and an asymmetric trench in the substrate. The asymmetric trench has a first trench wall and a second trench wall, the first trench wall is lined with oxide having a first thickness, and the second trench wall is lined with oxide having a second thickness that is different from the first thickness. Another semiconductor device embodiment includes a substrate, an active gate trench in the substrate; and a source polysilicon pickup trench in the substrate. The source polysilicon pickup trench includes a polysilicon electrode, and top surface of the polysilicon electrode is below a bottom of a body region. Another semiconductor device includes a substrate, an active gate trench in the substrate, the active gate trench has a first top gate electrode and a first bottom source electrode, and a gate runner trench comprising a second top gate electrode and a second bottom source electrode. The second top gate electrode is narrower than the second bottom source electrode.
    • 半导体器件实施例包括衬底,衬底中的有源栅极沟槽和衬底中的不对称沟槽。 非对称沟槽具有第一沟槽壁和第二沟槽壁,第一沟槽壁衬有具有第一厚度的氧化物,并且第二沟槽壁衬有具有不同于第一厚度的第二厚度的氧化物。 另一半导体器件实施例包括衬底,衬底中的有源栅极沟槽; 以及衬底中的源极多晶硅拾取沟槽。 源多晶硅拾取沟槽包括多晶硅电极,并且多晶硅电极的顶表面在身体区域的底部之下。 另一个半导体器件包括衬底,衬底中的有源栅极沟槽,有源栅极沟槽具有第一顶部栅电极和第一底部源极电极,以及包括第二顶部栅电极和第二底部源极电极的栅极流道沟槽。 第二顶栅电极比第二底源电极窄。