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1. 发明申请

US20090251656A1 DISPLAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：显示基板及其制造方法
公开(公告)号：US20090251656A1
公开(公告)日：2009-10-08
申请号：US12391541
申请日：2009-02-24
申请人： Bong-Kyu Shin , Seung-Jae Jung , Sang-Uk Lim , Sang-Woo Whangbo , Jae-Ho Choi , Hwa-Yeul Oh , Yong-Mo Choi
发明人： Bong-Kyu Shin , Seung-Jae Jung , Sang-Uk Lim , Sang-Woo Whangbo , Jae-Ho Choi , Hwa-Yeul Oh , Yong-Mo Choi
IPC分类号： G02F1/1333 , H05K3/00
CPC分类号： G02F1/133345 , G02F1/13454
摘要： A display substrate includes a soda-lime glass substrate, a barrier pattern, and first, second and third conductive patterns. The soda-lime glass substrate has a pixel area. The first conductive pattern includes a gate line formed on the soda-lime glass substrate and from a first conductive layer. The barrier pattern is formed between the first conductive pattern and the soda-lime glass substrate. The second conductive pattern includes a data line crossing the gate line. The data line is formed on the first conductive pattern and from a second conductive layer. The third conductive pattern includes a pixel electrode formed in the pixel area of the soda-lime glass substrate. The pixel electrode is formed on the second conductive pattern and from a third conductive layer.
摘要翻译：显示基板包括钠钙玻璃基板，阻挡图案以及第一，第二和第三导电图案。钠钙玻璃基板具有像素面积。第一导电图案包括形成在钠钙玻璃基板上和从第一导电层形成的栅极线。在第一导电图案和钠钙玻璃基板之间形成阻挡图案。第二导电图案包括与栅极线交叉的数据线。数据线形成在第一导电图案上和从第二导电层形成。第三导电图案包括形成在钠钙玻璃基板的像素区域中的像素电极。像素电极形成在第二导电图案上并由第三导电层形成。

2. 发明授权

US09685609B2 Variable resistance memory devices and methods of manufacturing the same 有权
公开(公告)号：US09685609B2
公开(公告)日：2017-06-20
申请号：US14963947
申请日：2015-12-09
申请人： Seung-Jae Jung , Youn-Seon Kang
发明人： Seung-Jae Jung , Youn-Seon Kang
IPC分类号： H01L27/24 , H01L45/00
CPC分类号： H01L45/147 , H01L27/2409 , H01L27/2481 , H01L45/06 , H01L45/08 , H01L45/1233 , H01L45/1266 , H01L45/141 , H01L45/145 , H01L45/146 , H01L45/16
摘要： A variable resistance memory device includes a plurality of first conductive lines, each of the first conductive lines extends in a first direction, a plurality of second conductive lines are above the first conductive lines, and each of the second conductive lines extend in a second direction transverse to the first direction. A plurality of first memory cells are at intersections where the first and second conductive lines overlap each other, each of the first memory cells including a first variable resistance structure having a first variable resistance pattern, a first sacrificial pattern and a second variable resistance pattern sequentially stacked in the first direction on a first plane. A plurality of third conductive lines are above the second conductive lines, each of the third conductive lines extend in the first direction, and a plurality of second memory cells are at intersections where the second and the third conductive lines overlap each other. Each of the second memory cells includes a second variable resistance structure having a third variable resistance pattern, a second sacrificial pattern and a fourth variable resistance pattern sequentially stacked in the first direction on second plane.

3. 发明申请

US20150214478A1 VARIABLE RESISTANCE MEMORY DEVICES 有权
标题翻译：可变电阻存储器件
公开(公告)号：US20150214478A1
公开(公告)日：2015-07-30
申请号：US14457439
申请日：2014-08-12
申请人： Jung-Moo Lee , Youn-Seon Kang , Seung-Jae Jung , Jung-Dal Choi
发明人： Jung-Moo Lee , Youn-Seon Kang , Seung-Jae Jung , Jung-Dal Choi
IPC分类号： H01L45/00 , H01L27/24
CPC分类号： H01L45/1233 , H01L27/2436 , H01L27/2481 , H01L45/04 , H01L45/08 , H01L45/1675
摘要： A variable resistance memory device includes a plurality of first conductive lines, a plurality of second conductive lines, a plurality of memory cells, a plurality of first air gaps and a plurality of second air gaps. The first conductive line extends in a first direction. The second conductive line is over the first conductive line and extends in a second direction crossing the first direction. The memory cell includes a variable resistance device. The memory cell is located at an intersection region of the first conductive line and the second conductive line. The first air gap extends in the first direction between the memory cells. The second air gap extends in the second direction between the memory cells.
摘要翻译：可变电阻存储器件包括多个第一导线，多个第二导线，多个存储单元，多个第一气隙和多个第二气隙。第一导线沿第一方向延伸。第二导线在第一导线上方并且沿与第一方向交叉的第二方向延伸。存储单元包括可变电阻器件。存储单元位于第一导线和第二导线的交叉区域。第一气隙在存储单元之间沿第一方向延伸。第二气隙沿第二方向在存储单元之间延伸。

4. 发明授权

US07932576B2 Transparent conductive layer and method of manufacturing the same 失效
标题翻译：透明导电层及其制造方法
公开(公告)号：US07932576B2
公开(公告)日：2011-04-26
申请号：US12413979
申请日：2009-03-30
申请人： Seung-Jae Jung , Yuk-Hyun Nam , Czang-Ho Lee , Myung-Hun Shin , Min-Seok Oh , Byoung-Kyu Lee , Mi-Hwa Lim , Joon-Young Seo
发明人： Seung-Jae Jung , Yuk-Hyun Nam , Czang-Ho Lee , Myung-Hun Shin , Min-Seok Oh , Byoung-Kyu Lee , Mi-Hwa Lim , Joon-Young Seo
IPC分类号： H01L31/075
CPC分类号： H01L31/022466 , H01L31/022483 , H01L31/02366 , H01L31/1884 , Y02E10/50
摘要： A transparent conductive layer includes a substrate, a first conductive layer disposed on the substrate, and a second conductive layer disposed on the first conductive layer, wherein the second conductive layer comprises a textured surface and an opening which exposes the first conductive layer, wherein the opening comprises a diameter of about 1 micrometer to about 3 micrometers. Also disclosed is a method of manufacturing the transparent conductive layer and a photoelectric device.
摘要翻译：透明导电层包括衬底，设置在衬底上的第一导电层和设置在第一导电层上的第二导电层，其中第二导电层包括纹理表面和暴露第一导电层的开口，其中，开口包括约1微米至约3微米的直径。还公开了制造透明导电层和光电器件的方法。

5. 发明授权

US09373664B2 Variable resistance memory devices and methods of manufacturing the same 有权
标题翻译：可变电阻存储器件及其制造方法
公开(公告)号：US09373664B2
公开(公告)日：2016-06-21
申请号：US14682506
申请日：2015-04-09
申请人： Dong-Jun Seong , Youn-Seon Kang , Seung-Jae Jung , Jung-Dal Choi
发明人： Dong-Jun Seong , Youn-Seon Kang , Seung-Jae Jung , Jung-Dal Choi
IPC分类号： H01L29/06 , H01L27/24 , H01L45/00
CPC分类号： H01L27/2463 , H01L27/2409 , H01L27/2481 , H01L45/06 , H01L45/08 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/1675
摘要： A variable resistance memory device, and methods of manufacturing the same, include a plurality of first conductive structures extending in a first direction, a plurality of second conductive structures extending in a second direction crossing the first direction over the first conductive structures, the second conductive structures, and a plurality of memory cells that are formed at intersections at which the first conductive structures and the second conductive structures overlap each other, and each includes a selection element and a variable resistance element sequentially stacked. An upper surface of each of the first conductive structures has a width in the second direction less than a width of a bottom surface of each of the selection elements.
摘要翻译：可变电阻存储器件及其制造方法包括沿第一方向延伸的多个第一导电结构，沿与第一导电结构相交的第一方向的第二方向延伸的多个第二导电结构，第二导电结构和形成在第一导电结构和第二导电结构彼此重叠的交点处的多个存储单元，并且每个存储单元包括依次堆叠的选择元件和可变电阻元件。每个第一导电结构的上表面在第二方向上的宽度小于每个选择元件的底表面的宽度。

6. 发明授权

US08969713B2 Method of manufacturing photoelectric conversion device 有权
标题翻译：制造光电转换装置的方法
公开(公告)号：US08969713B2
公开(公告)日：2015-03-03
申请号：US13359606
申请日：2012-01-27
申请人： Min-Seok Oh , Jung-Tae Kim , Nam-Kyu Song , Min Park , Yun-Seok Lee , Czang-Ho Lee , Myung-Hun Shin , Byoung-Kyu Lee , Yuk-Hyun Nam , Seung-Jae Jung , Mi-Hwa Lim , Joon-Young Seo , Dong-Uk Choi , Dong-Seop Kim , Byoung-June Kim
发明人： Min-Seok Oh , Jung-Tae Kim , Nam-Kyu Song , Min Park , Yun-Seok Lee , Czang-Ho Lee , Myung-Hun Shin , Byoung-Kyu Lee , Yuk-Hyun Nam , Seung-Jae Jung , Mi-Hwa Lim , Joon-Young Seo , Dong-Uk Choi , Dong-Seop Kim , Byoung-June Kim
IPC分类号： H01L31/0224 , H01L31/0376 , H01L31/068 , H01L31/078 , H01L31/0236 , H01L31/18 , H01L31/072 , H01L31/0368
CPC分类号： H01L31/022441 , H01L31/022425 , H01L31/022466 , H01L31/02363 , H01L31/03682 , H01L31/03762 , H01L31/068 , H01L31/0682 , H01L31/072 , H01L31/078 , H01L31/182 , Y02E10/52 , Y02E10/547 , Y02E10/548
摘要： Disclosed herein is a photoelectric conversion device having a semiconductor substrate including a front side and back side, a protective layer formed on the front side of the semiconductor substrate, a first non-single crystalline semiconductor layer formed on the back side of the semiconductor substrate, a first conductive layer including a first impurity formed on a first portion of a back side of the first non-single crystalline semiconductor layer, and a second conductive layer including the first impurity and a second impurity formed on a second portion of the back side of the first non-single crystalline semiconductor layer.
摘要翻译：这里公开了一种光电转换装置，其具有包括正面和背面的半导体衬底，形成在半导体衬底的正面上的保护层，形成在半导体衬底背面的第一非单晶半导体层，第一导电层，包括形成在第一非单晶半导体层的背面的第一部分上的第一杂质，以及第二导电层，其包含第一杂质和第二杂质，所述第二杂质形成在第一非杂质半导体层的背面的第二部分上第一非单晶半导体层。

7. 发明授权

US08293069B2 Inductively coupled plasma apparatus 有权
标题翻译：电感耦合等离子体装置
公开(公告)号：US08293069B2
公开(公告)日：2012-10-23
申请号：US12331981
申请日：2008-12-10
申请人： Geun-Young Yeom , Kyong-Nam Kim , Seung-Jae Jung
发明人： Geun-Young Yeom , Kyong-Nam Kim , Seung-Jae Jung
IPC分类号： C23C16/00 , C23F1/00 , H01L21/306 , H05B31/26
CPC分类号： H01J37/321
摘要： A inductively coupled plasma apparatus includes reaction chamber in which a substrate is loaded, and a double comb type antenna structure including first linear antennas and second linear antennas respectively arranged horizontally to pass through the reaction chamber inside the reaction chamber. The first and second linear antenna are alternately aligned each other. First ends the first linear antennas are protruded out of the reaction chamber and coupled to each other so as to be coupled to a first induced RF power, and first ends of the second linear antennas are protruded out of the reaction chamber in opposition to the first ends of the first linear antennas and coupled to each other so as to be coupled to a second induced RF power. Plasma uniformity is improved and superior plasma uniformity is maintained by adjusting a distance between antennas according to a size of the substrate.
摘要翻译：电感耦合等离子体装置包括其中装载有基板的反应室，以及包括分别水平布置以通过反应室内的反应室的第一线性天线和第二线性天线的双梳型天线结构。第一和第二线性天线彼此交替地对准。首先，第一线性天线从反应室突出并彼此耦合，以便耦合到第一感应RF功率，并且第二线性天线的第一端与第一线性天线相反地突出出反应室第一线性天线的端部并且彼此耦合，以便耦合到第二感应RF功率。等离子体均匀性得到改善，并且通过根据基板的尺寸调节天线之间的距离来维持优异的等离子体均匀性。

8. 发明申请

US20100159633A1 METHOD OF MANUFACTURING PHOTOVOLTAIC DEVICE 失效
标题翻译：制造光伏器件的方法
公开(公告)号：US20100159633A1
公开(公告)日：2010-06-24
申请号：US12642527
申请日：2009-12-18
申请人： Byoung-Kyu LEE , Se-Jin Chung , Byoung-June Kim , Czang-Ho Lee , Myung-Hun Shin , Min-Seok Oh , Ku-Hyun Kang , Yuk-Hyun Nam , Seung-Jae Jung , Min Park , Mi-Hwa Lim , Joon-Young Seo
发明人： Byoung-Kyu LEE , Se-Jin Chung , Byoung-June Kim , Czang-Ho Lee , Myung-Hun Shin , Min-Seok Oh , Ku-Hyun Kang , Yuk-Hyun Nam , Seung-Jae Jung , Min Park , Mi-Hwa Lim , Joon-Young Seo
IPC分类号： H01L21/326 , H01L31/02
CPC分类号： H01L21/324 , H01L21/02667 , H01L31/03921 , H01L31/046 , H01L31/075 , H01L31/1872 , Y02E10/548 , Y02P70/521
摘要： Provided is a method of manufacturing a photovoltaic device using a Joule heating-induced crystallization method. The method includes: forming a first conductive pattern on a substrate; forming a photoelectric conversion layer on the substrate having the first conductive pattern; and crystallizing at least part of the photoelectric conversion layer by applying an electric field to the photoelectric conversion layer, wherein the photoelectric conversion layer includes a first amorphous semiconductor layer containing first impurities, a second intrinsic, amorphous semiconductor layer, and a third amorphous semiconductor layer containing second impurities.
摘要翻译：提供了使用焦耳加热诱导结晶法制造光伏器件的方法。该方法包括：在衬底上形成第一导电图案; 在具有第一导电图案的基板上形成光电转换层; 以及通过向所述光电转换层施加电场而使所述光电转换层的至少一部分结晶，其中所述光电转换层包括含有第一杂质的第一非晶半导体层，第二本征非晶半导体层和第三非晶半导体层含有第二杂质。

9. 发明申请

US20100154869A1 PHOTOELECTRIC CONVERSION DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：光电转换装置及其制造方法
公开(公告)号：US20100154869A1
公开(公告)日：2010-06-24
申请号：US12476645
申请日：2009-06-02
申请人： Min-Seok Oh , Jung-Tae Kim , Nam-Kyu Song , Min Park , Yun-Seok Lee , Czang-Ho Lee , Myung-Hun Shin , Byoung-Kyu Lee , Yuk-Hyun Nam , Seung-Jae Jung , Mi-Hwa Lim , Joon-Young Seo , Dong-Uk Choi , Dong-Seop Kim , Byoung-June Kim
发明人： Min-Seok Oh , Jung-Tae Kim , Nam-Kyu Song , Min Park , Yun-Seok Lee , Czang-Ho Lee , Myung-Hun Shin , Byoung-Kyu Lee , Yuk-Hyun Nam , Seung-Jae Jung , Mi-Hwa Lim , Joon-Young Seo , Dong-Uk Choi , Dong-Seop Kim , Byoung-June Kim
IPC分类号： H01L31/0216 , H01L31/0224 , H01L31/00
CPC分类号： H01L31/022441 , H01L31/022425 , H01L31/022466 , H01L31/02363 , H01L31/03682 , H01L31/03762 , H01L31/068 , H01L31/0682 , H01L31/072 , H01L31/078 , H01L31/182 , Y02E10/52 , Y02E10/547 , Y02E10/548
摘要： Disclosed herein is a photoelectric conversion device having a semiconductor substrate including a front side and back side, a protective layer formed on the front side of the semiconductor substrate, a first non-single crystalline semiconductor layer formed on the back side of the semiconductor substrate, a first conductive layer including a first impurity formed on a first portion of a back side of the first non-single crystalline semiconductor layer, and a second conductive layer including the first impurity and a second impurity formed on a second portion of the back side of the first non-single crystalline semiconductor layer.
摘要翻译：这里公开了一种光电转换装置，其具有包括正面和背面的半导体衬底，形成在半导体衬底的正面上的保护层，形成在半导体衬底背面的第一非单晶半导体层，第一导电层，包括形成在第一非单晶半导体层的背面的第一部分上的第一杂质，以及第二导电层，其包含第一杂质和第二杂质，所述第二杂质形成在第一非杂质半导体层的背面的第二部分上第一非单晶半导体层。

10. 发明申请

US20090229596A1 SOLAR ENERGY MODULE HAVING REPAIR LINE, SOLAR ENERGY ASSEMBLY HAVING THE SAME, METHOD OF REPAIRING THE SOLAR ENERGY MODULE AND METHOD OF TRIMMING THE SOLAR ENERGY ASSEMBLY 审中-公开
标题翻译：具有修理线的太阳能模块，具有该修复线的太阳能组件，修复太阳能模块的方法和太阳能组件的调整方法
公开(公告)号：US20090229596A1
公开(公告)日：2009-09-17
申请号：US12400444
申请日：2009-03-09
申请人： Myung-Hun Shin , Dong-Uk Choi , Byoung-June Kim , Jin-Seock Kim , Czang-Ho Lee , Seung-Jae Jung , Joon-Young Seo
发明人： Myung-Hun Shin , Dong-Uk Choi , Byoung-June Kim , Jin-Seock Kim , Czang-Ho Lee , Seung-Jae Jung , Joon-Young Seo
IPC分类号： F24J2/00
CPC分类号： H01L31/042 , H01L31/0201 , H01L31/046 , H01L31/05 , H02S40/36 , H02S50/10 , Y02E10/50 , Y10T307/50
摘要： A method of electrically eliminating defective solar cell units that are disposed within an integrated solar cells module and a method of trimming an output voltage of the integrated solar cells module are provided, where the solar cells module has a large number (e.g., 50 or more) of solar cell units integrally disposed therein and initially connected in series one to the next. The method includes providing a corresponding plurality of repair pads, each integrally extending from a respective electrode layer of the solar cell units, and providing a bypass conductor integrated within the module and extending adjacent to the repair pads. Pad-to-pad spacings and pad-to-bypass spacings are such that pad-to-pad connecting bridges may be selectively created between adjacent ones of the repair pads and such that pad-to-bypass connecting bridges may be selectively created between the repair pads and the adjacently extending bypass conductor.
摘要翻译：提供了一种电除去集成太阳能电池模块内的有缺陷的太阳能电池单元的方法和一种微调集成太阳能电池组件的输出电压的方法，其中太阳能电池模块具有大量（例如，50个或更多个））的太阳能电池单元整体地设置在其中并且最初串联连接到下一个。该方法包括提供相应的多个修复焊盘，每个修补焊盘从太阳能电池单元的相应电极层整体延伸，并且提供集成在模块内并在修补焊盘附近延伸的旁路导体。垫到衬垫间距和衬垫到旁路间隔使得可以在相邻的修补焊盘之间选择性地创建焊盘到焊盘的连接桥，并且可以在焊盘到旁路的连接桥之间选择性地创建焊盘到旁路的连接桥修补垫和相邻延伸的旁路导体。

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