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1. 发明授权

US5253262A Semiconductor laser device with multi-directional reflector arranged therein 失效
标题翻译：其中布置有多向反射器的半导体激光器件
公开(公告)号：US5253262A
公开(公告)日：1993-10-12
申请号：US784711
申请日：1991-10-30
申请人： Atsushi Kurobe , Tsutomu Tezuka , Tetsuo Sadamasa , Mitsuhiro Kushibe , Yoshito Kawakyu
发明人： Atsushi Kurobe , Tsutomu Tezuka , Tetsuo Sadamasa , Mitsuhiro Kushibe , Yoshito Kawakyu
IPC分类号： H01S5/10 , H01S5/12 , H01S5/183 , H01S5/20 , H01S5/22 , H01S5/227 , H01S5/323 , H01S5/40 , H01S3/19
CPC分类号： H01S5/18327 , B82Y20/00 , H01S5/18388 , H01S5/227 , H01S2301/18 , H01S5/1042 , H01S5/1071 , H01S5/1078 , H01S5/1082 , H01S5/1228 , H01S5/18305 , H01S5/18308 , H01S5/18319 , H01S5/1835 , H01S5/18352 , H01S5/2004 , H01S5/2027 , H01S5/2205 , H01S5/2275 , H01S5/32308 , H01S5/34313 , H01S5/4056
摘要： A microcavity semiconductor laser disclosed therein includes a double-heterostructure section including an intermediate active layer sandwiched between a first or lower cladding layer and a second or upper cladding layer above a semiconductive substrate. A first multi-layered reflector section is arranged between the substrate and the double-heterostructure section to have its reflectance which becomes maximum near the oscillation wavelength of the laser. The upper cladding layer is semi-spherically formed. A three-dimensional optical reflector covers the double-heterostructure section, for controlling spontaneous emission obtained in the double-heterostructure section along various directions, and for increasing the coupling ratio of spontaneous emission with a specific laser mode, thereby to decrease the threshold current.
摘要翻译：其中公开的微腔半导体激光器包括双异质结构部分，其包括夹在第一或下包层之间的中间有源层和半导体衬底之上的第二或上覆层。第一多层反射器部分布置在基板和双异质结构部分之间，使其反射率在激光器的振荡波长附近变得最大。上覆层是半球形的。三维光反射器覆盖双异质结构部分，用于控制沿着各个方向的双异质结构部分中获得的自发辐射，并且用于增加具有特定激光模式的自发发射的耦合比，从而降低阈值电流。

2. 发明授权

US5763904A Non-single crystal semiconductor apparatus thin film transistor and liquid crystal display apparatus 失效
标题翻译：非单晶半导体装置薄膜晶体管和液晶显示装置
公开(公告)号：US5763904A
公开(公告)日：1998-06-09
申请号：US710110
申请日：1996-09-12
申请人： Mitsuo Nakajima , Yasumasa Gotou , Yoshito Kawakyu
发明人： Mitsuo Nakajima , Yasumasa Gotou , Yoshito Kawakyu
IPC分类号： G02F1/1368 , H01L21/285 , H01L21/336 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/786 , H01L29/76
CPC分类号： H01L29/78618 , H01L21/28512 , H01L27/1214 , H01L29/66757 , G02F1/1368 , H01L29/78603
摘要： A thin film transistor is disclosed, that comprises a first substrate protection film formed on a transparent insulation substrate, a second substrate protection film formed in a predetermined shape on the first substrate protection film, a semiconductor film having a channel region and a contact region formed on the second substrate protection film, the channel region being surrounded by the contact region, a gate insulation film formed above the semiconductor film, the gate insulation film having an opening portion for the contact region of the semiconductor film, a gate electrode formed in a region corresponding to the channel region of the semiconductor film on the gate insulation film, an inter-layer insulation film formed above the gate electrode, the inter-layer insulation film having an opening portion for the contact region of the semiconductor film, and a plurality of electrodes formed on the inter-layer insulation film, the plurality of electrodes being connected to the contact region of the semiconductor film through the opening portion. The edge surfaces of the second substrate protection film may be tapered. A contact state between the gate electrode and the inter-layer insulation film is controlled corresponding to the concentration of hydrogen of the inter-layer insulation film.
摘要翻译：公开了一种薄膜晶体管，其包括形成在透明绝缘基板上的第一基板保护膜，在第一基板保护膜上形成为预定形状的第二基板保护膜，形成有沟道区域和接触区域的半导体膜在所述第二基板保护膜上，所述沟道区域被所述接触区域包围，形成在所述半导体膜上方的栅极绝缘膜，所述栅极绝缘膜具有用于所述半导体膜的接触区域的开口部分，对应于栅极绝缘膜上的半导体膜的沟道区域的区域，形成在栅极电极上方的层间绝缘膜，层间绝缘膜具有用于半导体膜的接触区域的开口部分和多个形成在所述层间绝缘膜上的电极，所述多个电极连接到所述层间绝缘膜通过开口部分的半导体膜的作用区域。第二基板保护膜的边缘表面可以是锥形的。对应于层间绝缘膜的氢浓度来控制栅电极和层间绝缘膜之间的接触状态。

3. 发明授权

US06255199B1 Method of producing polycrystalline silicon 失效
标题翻译：生产多晶硅的方法
公开(公告)号：US06255199B1
公开(公告)日：2001-07-03
申请号：US09413539
申请日：1999-10-06
申请人： Hiroshi Mitsuhashi , Yoshito Kawakyu
发明人： Hiroshi Mitsuhashi , Yoshito Kawakyu
IPC分类号： H01L2120
CPC分类号： H01L21/02675 , H01L21/02532 , H01L21/02691 , H01L21/2026
摘要： A thin film transistor to be adapted to each pixel switch in a liquid crystal display has a polycrystalline silicon layer which is acquired by crystallizing amorphous silicon deposited on a glass substrate by laser annealing. A characteristic curve indicating the intensity distribution of a laser beam in this laser annealing has a peak shifted on the upstream side in the direction the glass substrate is moved. In the laser annealing of amorphous silicon, the laser beam is irradiated on the amorphous silicon in such a way that a higher-intensity portion of the laser beam hits the amorphous silicon first. This can make the fluence margin of a laser beam in laser annealing wide enough to achieve a high field-effect mobility and a high yield.
摘要翻译：适用于液晶显示器中的每个像素开关的薄膜晶体管具有通过激光退火使沉积在玻璃基板上的非晶硅结晶而获得的多晶硅层。在该激光退火中，表示激光束的强度分布的特性曲线在玻璃基板移动的方向的上游侧具有偏移。在非晶硅的激光退火中，将激光束照射在非晶硅上，使得较高强度的激光束部分首先撞击非晶硅。这可以使激光退火中的激光束的能量密度足够宽，以获得高的场效应迁移率和高产率。

4. 发明授权

US5970368A Method for manufacturing polycrystal semiconductor film 失效
标题翻译：多晶半导体膜的制造方法
公开(公告)号：US5970368A
公开(公告)日：1999-10-19
申请号：US939660
申请日：1997-09-29
申请人： Hideyuki Sasaki , Michihiro Oose , Isao Suzuki , Shiro Takeno , Mitsuhiro Tomita , Yoshito Kawakyu , Yuki Matsuura , Hiroshi Mitsuhashi
发明人： Hideyuki Sasaki , Michihiro Oose , Isao Suzuki , Shiro Takeno , Mitsuhiro Tomita , Yoshito Kawakyu , Yuki Matsuura , Hiroshi Mitsuhashi
IPC分类号： H01L21/20 , H01L21/205 , H01L29/04
CPC分类号： H01L21/2026
摘要： There is disclosed a method for manufacturing a polycrystal semiconductor film comprising the steps of applying a high energy beam to a surface of a semiconductor film comprising an amorphous or a polycrystal semiconductor provided on a surface of a substrate to melt only the semiconductor film, and solidifying the film via a solid and liquid coexisting state to form a semiconductor film comprising a polycrystal semiconductor having a large grain diameter, by heating a liquid part using a difference in an electric resistance in the liquid and solid coexisting state to heat only the liquid part, and by extending the solidification time until the completion of solidifying of the molten liquid crystal film. Furthermore, as the base film of the semiconductor film, a material having a melting point of 1600.degree. C. and a thermal conductivity of 0.01 cal/cm.s..degree. C. is used to suppress heat dissipation from the molten liquid of the semiconductor to the substrate so that time until the complete solidification can be prolonged. Furthermore, the beam is irradiated so as to form a standing wave at a predetermined position of the surface of the semiconductor film to generate the heat density distribution having the same cycle with the standing wave and to melt the semiconductor film with the result that a polycrystal semiconductor film comprising a uniform and a large crystal grains by controlling the distribution of the crystal nuclei at the interface between the base film and the substrate.
摘要翻译：公开了一种制造多晶半导体膜的方法，包括以下步骤：将高能束施加到包括设置在基板表面上的非晶或多晶半导体的半导体膜的表面，以仅熔化半导体膜，并固化通过固体和液体共存状态形成包含具有大粒径的多晶半导体的半导体膜，通过使用液体中的电阻差和固体共存状态加热液体部分以仅加热液体部分，并延长凝固时间直到熔融液晶膜凝固完成。此外，作为半导体膜的基膜，具有熔点为1600℃，导热率为0.01cal / cm 3的材料。使用DEG来抑制从半导体的熔融液体到基板的散热，从而可以延长直到完全凝固的时间。此外，照射光束以在半导体膜的表面的预定位置处形成驻波，以产生具有与驻波相同周期的热密度分布并熔化半导体膜，结果是多晶通过控制在基膜和基板之间的界面处的晶核的分布而包含均匀和大的晶粒的半导体膜。

5. 发明授权

US5585647A Integrated circuit device having an insulating substrate, and a liquid crystal display device having an insulating substrate 失效
标题翻译：具有绝缘基板的集成电路装置和具有绝缘基板的液晶显示装置
公开(公告)号：US5585647A
公开(公告)日：1996-12-17
申请号：US266467
申请日：1994-06-27
申请人： Mitsuo Nakajima , Mitsuaki Suzuki , Takaaki Kamimura , Yoshito Kawakyu
发明人： Mitsuo Nakajima , Mitsuaki Suzuki , Takaaki Kamimura , Yoshito Kawakyu
IPC分类号： G02F1/136 , G02F1/1368 , H01L27/12 , H01L29/78 , H01L29/786 , H01L31/0392 , H01L31/20 , H01L31/113 , G02F1/1343
CPC分类号： H01L27/1251 , H01L27/1214
摘要： A thin-film transistor device comprising a pixel section including a plurality of pixel electrodes arranged in rows and columns on a substrate and a plurality of thin-film transistors of reverse stagger type, connected as switching elements to the pixel electrodes, respectively, and a drive section including a plurality of thin-film transistors of coplanar type, each having a gate insulating film, for driving the thin-film transistors of the reverse stagger type. A lower insulating film is located beneath the thin-film transistors of the reverse stagger type. The lower insulating film and the gate insulating films of the thin-film transistors of the coplanar type are formed of a first insulating film provided on the substrate.
摘要翻译：一种薄膜晶体管器件，包括：像素部分，其包括在衬底上排列成行和列的多个像素电极;以及反向交错型的多个薄膜晶体管，分别作为开关元件连接到像素电极;以及驱动部分包括共面型的多个薄膜晶体管，每个具有栅极绝缘膜，用于驱动反向交错型薄膜晶体管。下部绝缘膜位于反向交错型薄膜晶体管的下方。共面型薄膜晶体管的下绝缘膜和栅极绝缘膜由设置在基板上的第一绝缘膜形成。

6. 发明授权

US5213654A Vapor-phase epitaxial growth method for semiconductor crystal layers 失效
标题翻译：半导体晶体层的气相外延生长方法
公开(公告)号：US5213654A
公开(公告)日：1993-05-25
申请号：US701865
申请日：1991-05-17
申请人： Masahiro Sasaki , Yoshito Kawakyu , Hironori Ishikawa , Masao Mashita
发明人： Masahiro Sasaki , Yoshito Kawakyu , Hironori Ishikawa , Masao Mashita
IPC分类号： C30B25/10 , C30B25/14
CPC分类号： C30B29/40 , C30B25/105 , C30B25/14
摘要： A vapor-phase epitaxial growth method for group III-V compound semiconductor crystal layers by which alternating layers of (InAs)1 and (GaAs)1 are grown on an InP substrate by means of vapor-phase epitaxy while different material gases are supplied alternately. The substrate is irradiated with excimer laser light when a specific layer of the crystal layers is grown, thereby controlling the thickness of the specific crystal layer on a monoatomic scale.
摘要翻译：对于III-V族化合物半导体晶体层的气相外延生长方法，通过交替层（InAs）1和（GaAs）1在InP衬底上通过气相外延生长，同时交替地供给不同的材料气体。当生长特定层的晶体层时，用准分子激光照射衬底，从而以单原子尺度控制特定晶体层的厚度。

7. 发明授权

US4594528A Thin film electroluminescence device and method of manufacturing the same 失效
标题翻译：薄膜电致发光器件及其制造方法
公开(公告)号：US4594528A
公开(公告)日：1986-06-10
申请号：US532977
申请日：1983-09-16
申请人： Yoshito Kawakyu , Toyoki Higuchi , Hiroshi Ito
发明人： Yoshito Kawakyu , Toyoki Higuchi , Hiroshi Ito
IPC分类号： C09K11/65 , H01L33/34 , H05B33/14 , B05D3/06
CPC分类号： H01L33/343 , C09K11/65 , H05B33/14 , Y10S438/931
摘要： A thin film electroluminescence device which comprises a pair of electrodes, at least one of which is transparent, and a light-emitting layer consisting essentially of oxygen-containing amorphous hydrogenated silicon carbide and being interposed between said paired electrodes.
摘要翻译：一种薄膜电致发光器件，其包括一对电极，其至少一个是透明的，以及基本上由含氧非晶氢化碳化硅组成的并且插在所述成对电极之间的发光层。

8. 发明授权

US5710606A LCD TFT having two layer region adjacent base region in which the layers have opposite conductivities and have two density gradients 失效
标题翻译： LCD TFT具有相邻基极区域的两个层区域，其中层具有相反的电导率并具有两个密度梯度
公开(公告)号：US5710606A
公开(公告)日：1998-01-20
申请号：US517635
申请日：1995-08-22
申请人： Mitsuo Nakajima , Yoshito Kawakyu
发明人： Mitsuo Nakajima , Yoshito Kawakyu
IPC分类号： H01L21/336 , G02F1/1362 , H01L29/786 , G02F1/136 , G02F1/1345 , H01L27/01 , H01L29/04
CPC分类号： G02F1/13454 , H01L29/78621
摘要： A polycrystalline silicon active layer is provided on a transparent insulating substrate. Phosphorus is ion-implanted into the active layer, to form a pair of n-type source/drain regions with a base region interposed therebetween. In this ion-implantation, a density gradient of phosphorus is formed in the thicknesses direction of the active layer. Boron is ion-implanted into each of the source/drain regions, to be adjacent to the base region. In this ion-implantation, a density gradient of boron is formed, and the position providing a maximum density of boron is set to be deeper than the position which provides a maximum density of phosphorus. By the ion-implantation of boron, an n-type LDD portion having a high resistance and a p-type portion are formed on the upper and lower sides, respectively, adjacent to the base region within each of the source/drain regions.
摘要翻译：在透明绝缘基板上设置多晶硅有源层。将磷离子注入到有源层中，形成一对具有介于其间的基极区域的n型源极/漏极区域。在该离子注入中，在有源层的厚度方向上形成磷的密度梯度。硼离子注入每个源极/漏极区域中以与基极区域相邻。在该离子注入中，形成硼的密度梯度，并且提供硼的最大密度的位置被设定为比提供磷的最大密度的位置更深。通过硼的离子注入，分别在每个源极/漏极区域内与基极区域相邻的上侧和下侧形成具有高电阻的n型LDD部分和p型部分。

9. 发明授权

US5300185A Method of manufacturing III-V group compound semiconductor 失效
标题翻译：制备III-V族化合物半导体的方法
公开(公告)号：US5300185A
公开(公告)日：1994-04-05
申请号：US858690
申请日：1992-03-27
申请人： Hisao Hori , Yoshito Kawakyu , Hironori Ishikawa , Masao Mashita
发明人： Hisao Hori , Yoshito Kawakyu , Hironori Ishikawa , Masao Mashita
IPC分类号： C23C16/30 , C30B25/02
CPC分类号： C30B25/02 , C23C16/301 , C30B29/40
摘要： Disclosed is a method of efficiently manufacturing a III-V group compound semiconductor that carbon mixing is reduced, wherein a compound represented by the formula (1) or (2) is used as a V group source: ##STR1## wherein X represents a V group element, n represents integer of 1 to 3, and Y represents electron-releasing group bonded to a position selected from 2-, 4-, and 6-positions, ##STR2## wherein X represents a V group element, m represents an integer of 1 or 2, and Y represents electron-releasing group bonded to a position selected from 2- and 4-positions.
摘要翻译：公开了一种有效地制造碳组合化合物的III-V族化合物半导体的方法，其中使用由式（1）或（2）表示的化合物作为V族源：1式（1）（* CHEMICAL 结构*）（1）其中X表示V族元素，n表示1〜3的整数，Y表示与选自2-，4-和6-位的1种式（2）所示的释放电子基团）（*化学结构*）（2）其中X表示V族元素，m表示1或2的整数，Y表示键合在选自2-和4-位的位置的释放电子基团。

10. 发明授权

US5229319A Method for producing compound semiconductors and apparatus therefor 失效
标题翻译：生产化合物半导体的方法及其设备
公开(公告)号：US5229319A
公开(公告)日：1993-07-20
申请号：US618928
申请日：1990-11-28
申请人： Yoshito Kawakyu , Hironori Ishikawa , Masahiro Sasaki , Masao Mashita
发明人： Yoshito Kawakyu , Hironori Ishikawa , Masahiro Sasaki , Masao Mashita
IPC分类号： H01L21/205 , C23C16/44 , C23C16/455 , C30B25/02 , H01L21/20 , H01L21/32
CPC分类号： C23C16/45525 , C30B25/02 , C30B29/40 , H01L21/02395 , H01L21/02546 , H01L21/0262 , H01L21/02639 , H01L21/32 , Y10S148/056 , Y10S148/065 , Y10S438/935
摘要： Disclosed is a method of selective chemical vapor deposition for selectively forming thin films of a semiconductor, dielectric or metal on a semiconductor by providing a mask of SiO.sub.2 having a plurality of openings in various forms on the substrate, wherein a trimethyl gallium (TMG) gas as a Group III material, 10% hydrogen-based arsine (AsH.sub.3) gas as a Group V material, and 500 ppm hydrogen-based disilane (Si.sub.2 H.sub.6) gas as an n-type impurity material are alternately supplied onto the substrate, and each supply amount of the material gases is controlled at a value to obtain a film growth rate for forming the corresponding monoatomic layer or monomolecular layer to each material at each opening. Also disclosed is an apparatus for performing the above-disclosed method of chemical vapor deposition, wherein four reaction chambers are included, and the material gases are supplied to the respective reaction chambers in accordance with the following gas supply sequences: Chamber 1: TMG+H.sub.2 /H.sub.2 (for gas replacement)/AsH.sub.3 +H.sub.2 /H.sub.2 (for gas replacement); Chamber 2: H.sub.2 (for gas replacement)/AsH.sub.3 +H.sub.2 /H.sub.2 (for gas replacement)/TMG+H.sub.2 ; Chamber 3: AsH.sub.3 +H.sub.2 /H.sub.2 (for gas replacement)/TMG+H.sub.2 /H.sub.2 (for gas replacement); Chamber 4: H.sub.2 (for gas replacement)/TMG+H.sub.2 /H.sub.2 (for gas replacement)/AsH.sub.3 +H.sub.2.
摘要翻译：公开了一种选择性化学气相沉积的方法，通过在衬底上提供具有各种形式的多个开口的SiO 2掩模，在半导体上选择性地形成半导体，电介质或金属的薄膜，其中三甲基镓（TMG）气体作为III族材料，作为第V族材料的10％氢基胂（AsH 3）气体和作为n型杂质材料的500ppm氢基乙硅烷（Si 2 H 6）气体交替供给到基板上，将材料气体的量控制在一个值以获得用于在每个开口处形成每个材料的相应单原子层或单分子层的膜生长速率。还公开了一种用于执行上述化学气相沉积方法的装置，其中包括四个反应室，并且根据以下气体供应顺序将材料气体供应到各个反应室：腔室1：TMG + H2 / H2（用于更换气体）/ AsH3 + H2 / H2（用于更换气体）; 室2：H2（用于气体置换）/ AsH3 + H2 / H2（用于气体置换）/ TMG + H2; 室3：AsH3 + H2 / H2（用于气体置换）/ TMG + H2 / H2（用于气体替换）; 室4：H2（用于更换气体）/ TMG + H2 / H2（用于气体置换）/ AsH3 + H2。

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