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1. 发明申请

US20120220091A1 METHODS OF MAKING POWER SEMICONDUCTOR DEVICES WITH THICK BOTTOM OXIDE LAYER 有权
标题翻译：制造具有厚底层氧化层的功率半导体器件的方法
公开(公告)号：US20120220091A1
公开(公告)日：2012-08-30
申请号：US13418128
申请日：2012-03-12
申请人： Ashok Challa , Alan Elbanhawy , Thomas E. Grebs , Nathan L. Kraft , Dean E. Probst , Rodney S. Ridley , Steven P. Sapp , Qi Wang , Chongman Yun , J.G. Lee , Peter H. Wilson , Joseph A. Yedinak , J.Y. Jung , H.C. Jang , Babak S. Sani , Richard Stokes , Gary M. Dolny , John Mytych , Becky Losee , Adam Selsley , Robert Herrick , James J. Murphy , Gordon K. Madson , Bruce D. Marchant , Christopher L. Rexer , Christopher B. Kocon , Debra S. Woolsey
发明人： Ashok Challa , Alan Elbanhawy , Thomas E. Grebs , Nathan L. Kraft , Dean E. Probst , Rodney S. Ridley , Steven P. Sapp , Qi Wang , Chongman Yun , J.G. Lee , Peter H. Wilson , Joseph A. Yedinak , J.Y. Jung , H.C. Jang , Babak S. Sani , Richard Stokes , Gary M. Dolny , John Mytych , Becky Losee , Adam Selsley , Robert Herrick , James J. Murphy , Gordon K. Madson , Bruce D. Marchant , Christopher L. Rexer , Christopher B. Kocon , Debra S. Woolsey
IPC分类号： H01L21/336 , H01L21/311
CPC分类号： H01L29/407 , H01L21/26586 , H01L21/3065 , H01L21/30655 , H01L21/31116 , H01L21/6835 , H01L23/4952 , H01L23/49816 , H01L29/0623 , H01L29/0634 , H01L29/0653 , H01L29/0661 , H01L29/0696 , H01L29/1095 , H01L29/165 , H01L29/402 , H01L29/41766 , H01L29/4236 , H01L29/42368 , H01L29/4238 , H01L29/4933 , H01L29/495 , H01L29/66348 , H01L29/66734 , H01L29/7396 , H01L29/7802 , H01L29/7804 , H01L29/7805 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7815 , H01L29/7828 , H01L29/7831 , H01L2221/6834 , H01L2221/68363 , H01L2224/16 , H01L2924/01012 , H01L2924/01019 , H01L2924/01078 , H01L2924/10253 , H01L2924/12032 , H01L2924/1301 , H01L2924/13034 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/15311 , H01L2924/1532 , H01L2924/19041 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H02M3/00 , H02M3/33592 , H02M7/48 , Y02B70/1475 , H01L2924/00 , H01L2924/00014
摘要： A method for forming thick oxide at the bottom of a trench formed in a semiconductor substrate includes forming a conformal oxide film by a sub-atmospheric chemical vapor deposition process that fills the trench and covers a top surface of the substrate. The method also includes etching the oxide film off the top surface of the substrate and inside the trench to leave a substantially flat layer of oxide having a target thickness at the bottom of the trench.
摘要翻译：在半导体衬底中形成的沟槽的底部形成厚氧化物的方法包括通过填充沟槽并覆盖衬底顶表面的亚大气压化学气相沉积工艺形成共形氧化膜。该方法还包括将氧化膜从衬底的顶表面和沟槽内部蚀刻，以留下在沟槽底部具有目标厚度的基本平坦的氧化物层。

2. 发明申请

US20080135931A1 Power Semiconductor Devices Having Termination Structures and Methods of Manufacture 有权
标题翻译：具有终端结构和制造方法的功率半导体器件
公开(公告)号：US20080135931A1
公开(公告)日：2008-06-12
申请号：US12032123
申请日：2008-02-15
申请人： Ashok Challa , Alan Elbanhawy , Thomas E. Grebs , Nathan L. Kraft , Dean E. Probst , Rodney S. Ridlay , Steven P. Sapp , Qi Wang , Chongman Yun , J.G. Lee , Peter H. Wilson , Joseph A. Yedinak , J.Y. Jung , H.C. Jang , Babak S. Sanl , Richard Stokes , Gary M. Dolny , John Mytych , Becky Losee , Adam Selsley , Robert Herrick , James J. Murphy , Gordon K. Madson , Bruce D. Marchant , Christopher L. Rexer , Christopher B. Kocon , Debra S. Woolsey
发明人： Ashok Challa , Alan Elbanhawy , Thomas E. Grebs , Nathan L. Kraft , Dean E. Probst , Rodney S. Ridlay , Steven P. Sapp , Qi Wang , Chongman Yun , J.G. Lee , Peter H. Wilson , Joseph A. Yedinak , J.Y. Jung , H.C. Jang , Babak S. Sanl , Richard Stokes , Gary M. Dolny , John Mytych , Becky Losee , Adam Selsley , Robert Herrick , James J. Murphy , Gordon K. Madson , Bruce D. Marchant , Christopher L. Rexer , Christopher B. Kocon , Debra S. Woolsey
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/407 , H01L21/26586 , H01L21/3065 , H01L21/30655 , H01L21/31116 , H01L21/6835 , H01L23/4952 , H01L23/49816 , H01L29/0623 , H01L29/0634 , H01L29/0653 , H01L29/0661 , H01L29/0696 , H01L29/1095 , H01L29/165 , H01L29/402 , H01L29/41766 , H01L29/4236 , H01L29/42368 , H01L29/4238 , H01L29/4933 , H01L29/495 , H01L29/66348 , H01L29/66734 , H01L29/7396 , H01L29/7802 , H01L29/7804 , H01L29/7805 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7815 , H01L29/7828 , H01L29/7831 , H01L2221/6834 , H01L2221/68363 , H01L2224/16 , H01L2924/01012 , H01L2924/01019 , H01L2924/01078 , H01L2924/10253 , H01L2924/12032 , H01L2924/1301 , H01L2924/13034 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/15311 , H01L2924/1532 , H01L2924/19041 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H02M3/00 , H02M3/33592 , H02M7/48 , Y02B70/1475 , H01L2924/00 , H01L2924/00014
摘要： A semiconductor power device includes a drift region of a first conductivity type, a well region extending above the drift region and having a second conductivity type opposite the first conductivity type, an active trench extending through the well region and into the drift region, source regions having the first conductivity type formed in the well region adjacent the active trench, and a first termination trench extending below the well region and disposed at an outer edge of an active region of the device. The sidewalls and bottom of the active trench are lined with dielectric material, and substantially filled with a first conductive layer forming an upper electrode and a second conductive layer forming a lower electrode, the upper electrode being disposed above the lower electrode and separated therefrom by inter-electrode dielectric material. The first termination trench can be lined with a layer of dielectric material that is thicker than the dielectric material lining the sidewalls of the active trench, and is substantially filled with conductive material.
摘要翻译：半导体功率器件包括第一导电类型的漂移区域，在漂移区域上方延伸并且具有与第一导电类型相反的第二导电类型的阱区域，延伸穿过阱区域并进入漂移区域的有源沟槽，源极区域具有形成在邻近有源沟槽的阱区中的第一导电类型，以及在阱区下延伸并设置在器件的有源区的外边缘处的第一端接沟槽。有源沟槽的侧壁和底部衬有介电材料，并且基本上填充有形成上电极的第一导电层和形成下电极的第二导电层，上电极设置在下电极之上，电介质材料。第一端接沟槽可以衬有一层电介质材料，其比在有源沟槽侧壁上的电介质材料更厚，并且基本上填充有导电材料。

3. 发明申请

US20080150020A1 Trenched Shield Gate Power Semiconductor Devices and Methods of Manufacture 有权
标题翻译：宽屏蔽门功率半导体器件及其制造方法
公开(公告)号：US20080150020A1
公开(公告)日：2008-06-26
申请号：US12018166
申请日：2008-01-22
申请人： Ashok Challa , Alan Elbanhawy , Thomas E. Grebs , Nathan L. Kraft , Dean E. Probst , Rodney S. Ridley , Steven P. Sapp , Qi Wang , Chongman Yun , J. G. Lee , Peter H. Wilson , Joseph A. Yedinak , J. Y. Jung , H. C. Jang , Babak S. Sani , Richard Stokes , Gary M. Dolny , John Mytych , Becky Losee , Adam Selsley , Robert Herrick , James J. Murphy , Gordon K. Madson , Bruce D. Marchant , Christopher L. Rexer , Christopher B. Kocon , Debra S. Woolsey
发明人： Ashok Challa , Alan Elbanhawy , Thomas E. Grebs , Nathan L. Kraft , Dean E. Probst , Rodney S. Ridley , Steven P. Sapp , Qi Wang , Chongman Yun , J. G. Lee , Peter H. Wilson , Joseph A. Yedinak , J. Y. Jung , H. C. Jang , Babak S. Sani , Richard Stokes , Gary M. Dolny , John Mytych , Becky Losee , Adam Selsley , Robert Herrick , James J. Murphy , Gordon K. Madson , Bruce D. Marchant , Christopher L. Rexer , Christopher B. Kocon , Debra S. Woolsey
IPC分类号： H01L29/78
CPC分类号： H01L29/407 , H01L21/26586 , H01L21/3065 , H01L21/30655 , H01L21/31116 , H01L21/6835 , H01L23/4952 , H01L23/49816 , H01L29/0623 , H01L29/0634 , H01L29/0653 , H01L29/0661 , H01L29/0696 , H01L29/1095 , H01L29/165 , H01L29/402 , H01L29/41766 , H01L29/4236 , H01L29/42368 , H01L29/4238 , H01L29/4933 , H01L29/495 , H01L29/66348 , H01L29/66734 , H01L29/7396 , H01L29/7802 , H01L29/7804 , H01L29/7805 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7815 , H01L29/7828 , H01L29/7831 , H01L2221/6834 , H01L2221/68363 , H01L2224/16 , H01L2924/01012 , H01L2924/01019 , H01L2924/01078 , H01L2924/10253 , H01L2924/12032 , H01L2924/1301 , H01L2924/13034 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/15311 , H01L2924/1532 , H01L2924/19041 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H02M3/00 , H02M3/33592 , H02M7/48 , Y02B70/1475 , H01L2924/00 , H01L2924/00014
摘要： A semiconductor power device includes a drift region of a first conductivity type, a well region extending above the drift region and having a second conductivity type opposite the first conductivity type, an active trench extending through the well region and into the drift region. The active trench, which includes sidewalls and bottom lined with dielectric material, is substantially filled with a first conductive layer and a second conductive layer. The second conductive layer forms a gate electrode and is disposed above the first conductive layer and is separated from the first conductive layer by an inter-electrode dielectric material. The device also includes source regions having the first conductivity type formed inside the well region and adjacent the active trench and a charge control trench that extends deeper into the drift region than the active trench and is substantially filled with material to allow for vertical charge control in the drift region. The charge control trench can be lined with a layer of dielectric material and substantially filled with conductive material. The active trench can include a second shield electrode made of conductive material disposed below the first shield electrode. The first conductive layer inside the active trench can form a secondary gate electrode that is configured to be electrically biased to a desired potential. The semiconductor device can also include a Schottky structure formed between the charge control trench and a second adjacent charge control trench.
摘要翻译：半导体功率器件包括第一导电类型的漂移区域，在漂移区域上方延伸并且具有与第一导电类型相反的第二导电类型的阱区域，延伸穿过阱区域并进入漂移区域的有源沟槽。主要沟槽包括侧壁和衬底与介电材料的底部，其基本上被第一导电层和第二导电层填充。第二导电层形成栅极，并且设置在第一导电层的上方，并且通过电极间电介质材料与第一导电层分离。该器件还包括形成在阱区内并且邻近有源沟槽的第一导电类型的源极区域以及充电控制沟槽，该电荷控制沟槽比有源沟槽更深地延伸到漂移区域中，并且基本上填充有材料以允许垂直电荷控制漂移区域。电荷控制沟槽可以衬有介电材料层并且基本上填充有导电材料。有源沟槽可以包括由设置在第一屏蔽电极下方的导电材料制成的第二屏蔽电极。有源沟槽内的第一导电层可以形成辅助栅电极，其被配置为电偏置到期望的电位。半导体器件还可以包括形成在电荷控制沟槽和第二相邻电荷控制沟槽之间的肖特基结构。

4. 发明申请

US20080138953A1 Methods of Making Power Semiconductor Devices with Thick Bottom Oxide Layer 有权
标题翻译：制造具有厚底层氧化物层的功率半导体器件的方法
公开(公告)号：US20080138953A1
公开(公告)日：2008-06-12
申请号：US12032599
申请日：2008-02-15
申请人： Ashok Challa , Alan Elbanhawy , Dean E. Probst , Steven P. Sapp , Peter H. Wilson , Babak S. Sani , Becky Losee , Robert Herrick , James J. Murphy , Gordon K. Madson , Bruce D. Marchant , Christopher B. Kocon , Debra S. Woolsey
发明人： Ashok Challa , Alan Elbanhawy , Dean E. Probst , Steven P. Sapp , Peter H. Wilson , Babak S. Sani , Becky Losee , Robert Herrick , James J. Murphy , Gordon K. Madson , Bruce D. Marchant , Christopher B. Kocon , Debra S. Woolsey
IPC分类号： H01L21/336 , H01L21/762
CPC分类号： H01L29/407 , H01L21/26586 , H01L21/3065 , H01L21/30655 , H01L21/31116 , H01L21/6835 , H01L23/4952 , H01L23/49816 , H01L29/0623 , H01L29/0634 , H01L29/0653 , H01L29/0661 , H01L29/0696 , H01L29/1095 , H01L29/165 , H01L29/402 , H01L29/41766 , H01L29/4236 , H01L29/42368 , H01L29/4238 , H01L29/4933 , H01L29/495 , H01L29/66348 , H01L29/66734 , H01L29/7396 , H01L29/7802 , H01L29/7804 , H01L29/7805 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7815 , H01L29/7828 , H01L29/7831 , H01L2221/6834 , H01L2221/68363 , H01L2224/16 , H01L2924/01012 , H01L2924/01019 , H01L2924/01078 , H01L2924/10253 , H01L2924/12032 , H01L2924/1301 , H01L2924/13034 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/15311 , H01L2924/1532 , H01L2924/19041 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H02M3/00 , H02M3/33592 , H02M7/48 , Y02B70/1475 , H01L2924/00 , H01L2924/00014
摘要： A method for forming thick oxide at the bottom of a trench formed in a semiconductor substrate includes forming a conformal oxide film that fills the trench and covers a top surface of the substrate. and etching the oxide film off the top surface of the substrate and inside the trench to leave a substantially flat layer of oxide having a target thickness at the bottom of the trench. The oxide film can be deposited by sub-atmospheric chemical vapor deposition processes, directional Tetraethoxysilate (TEOS) processes, or high density plasma deposition processes that form a thicker oxide at the bottom of the trench than on the sidewalls of the trench.
摘要翻译：在半导体衬底中形成的沟槽的底部形成厚氧化物的方法包括形成填充沟槽并覆盖衬底的顶表面的共形氧化物膜。并且将氧化膜从衬底的顶表面和沟槽内部蚀刻，以留下在沟槽底部具有目标厚度的基本平坦的氧化物层。氧化膜可以通过亚大气压化学气相沉积工艺，定向四乙氧基硅油（TEOS）工艺或高密度等离子体沉积工艺进行沉积，其在沟槽底部形成比在沟槽的侧壁上更厚的氧化物。

5. 发明授权

US08936985B2 Methods related to power semiconductor devices with thick bottom oxide layers 有权
标题翻译：与厚底层氧化物层的功率半导体器件相关的方法
公开(公告)号：US08936985B2
公开(公告)日：2015-01-20
申请号：US13418128
申请日：2012-03-12
申请人： Ashok Challa , Alan Elbanhawy , Dean E. Probst , Steven P. Sapp , Peter H. Wilson , Babak S. Sani , Becky Losee , Robert Herrick , James J. Murphy , Gordon K. Madson , Bruce D. Marchant , Christopher B. Kocon , Debra S. Woolsey
发明人： Ashok Challa , Alan Elbanhawy , Dean E. Probst , Steven P. Sapp , Peter H. Wilson , Babak S. Sani , Becky Losee , Robert Herrick , James J. Murphy , Gordon K. Madson , Bruce D. Marchant , Christopher B. Kocon , Debra S. Woolsey
IPC分类号： H01L29/78 , H01L29/66 , H01L21/683 , H01L21/311 , H01L29/40 , H01L29/06 , H01L21/3065 , H01L29/739 , H02M3/335 , H02M3/00 , H01L29/10 , H02M7/48 , H01L29/49 , H01L29/423 , H01L29/165 , H01L23/495 , H01L21/265 , H01L29/417 , H01L23/498
CPC分类号： H01L29/407 , H01L21/26586 , H01L21/3065 , H01L21/30655 , H01L21/31116 , H01L21/6835 , H01L23/4952 , H01L23/49816 , H01L29/0623 , H01L29/0634 , H01L29/0653 , H01L29/0661 , H01L29/0696 , H01L29/1095 , H01L29/165 , H01L29/402 , H01L29/41766 , H01L29/4236 , H01L29/42368 , H01L29/4238 , H01L29/4933 , H01L29/495 , H01L29/66348 , H01L29/66734 , H01L29/7396 , H01L29/7802 , H01L29/7804 , H01L29/7805 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7815 , H01L29/7828 , H01L29/7831 , H01L2221/6834 , H01L2221/68363 , H01L2224/16 , H01L2924/01012 , H01L2924/01019 , H01L2924/01078 , H01L2924/10253 , H01L2924/12032 , H01L2924/1301 , H01L2924/13034 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/15311 , H01L2924/1532 , H01L2924/19041 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H02M3/00 , H02M3/33592 , H02M7/48 , Y02B70/1475 , H01L2924/00 , H01L2924/00014
摘要： A method can include forming a drift region, forming a well region above the drift region, and forming an active trench extending through the well region and into the drift region. The method can include forming a first source region in contact with a first sidewall of the active trench and a second source region in contact with a second sidewall of the active trench. The method also includes forming a charge control trench where the charge control trench is aligned parallel to the active trench and laterally separated from the active trench by a mesa region, and where the portion of the well region is in contact with the charge control trench and excludes any source region. The method also includes forming an oxide along a bottom of the active trench having a thickness greater than a thickness of an oxide along the first sidewall of the active trench.
摘要翻译：一种方法可以包括形成漂移区，在漂移区上形成阱区，以及形成延伸穿过阱区并进入漂移区的有源沟槽。该方法可以包括形成与有源沟槽的第一侧壁接触的第一源极区域和与有源沟槽的第二侧壁接触的第二源极区域。该方法还包括形成电荷控制沟槽，其中电荷控制沟槽平行于有源沟槽对齐并且通过台面区域与有源沟槽横向分离，并且其中阱区域的部分与电荷控制沟槽接触，排除任何来源地区。该方法还包括沿有源沟槽的底部沿着有源沟槽的第一侧壁形成厚度大于氧化物厚度的氧化物。

6. 发明授权

US08143124B2 Methods of making power semiconductor devices with thick bottom oxide layer 有权
标题翻译：制造具有厚底层氧化物层的功率半导体器件的方法
公开(公告)号：US08143124B2
公开(公告)日：2012-03-27
申请号：US12032599
申请日：2008-02-15
申请人： Ashok Challa , Alan Elbanhawy , Dean E. Probst , Steven P. Sapp , Peter H. Wilson , Babak S. Sani , Becky Losee , Robert Herrick , James J. Murphy , Gordon K. Madson , Bruce D. Marchant , Christopher B. Kocon , Debra S. Woolsey
发明人： Ashok Challa , Alan Elbanhawy , Dean E. Probst , Steven P. Sapp , Peter H. Wilson , Babak S. Sani , Becky Losee , Robert Herrick , James J. Murphy , Gordon K. Madson , Bruce D. Marchant , Christopher B. Kocon , Debra S. Woolsey
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/407 , H01L21/26586 , H01L21/3065 , H01L21/30655 , H01L21/31116 , H01L21/6835 , H01L23/4952 , H01L23/49816 , H01L29/0623 , H01L29/0634 , H01L29/0653 , H01L29/0661 , H01L29/0696 , H01L29/1095 , H01L29/165 , H01L29/402 , H01L29/41766 , H01L29/4236 , H01L29/42368 , H01L29/4238 , H01L29/4933 , H01L29/495 , H01L29/66348 , H01L29/66734 , H01L29/7396 , H01L29/7802 , H01L29/7804 , H01L29/7805 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7815 , H01L29/7828 , H01L29/7831 , H01L2221/6834 , H01L2221/68363 , H01L2224/16 , H01L2924/01012 , H01L2924/01019 , H01L2924/01078 , H01L2924/10253 , H01L2924/12032 , H01L2924/1301 , H01L2924/13034 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/15311 , H01L2924/1532 , H01L2924/19041 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H02M3/00 , H02M3/33592 , H02M7/48 , Y02B70/1475 , H01L2924/00 , H01L2924/00014
摘要： A method of manufacturing a semiconductor device having a charge control trench and an active control trench with a thick oxide bottom includes forming a drift region, a well region extending above the drift region, an active trench extending through the well region and into the drift region, a charge control trench extending deeper into the drift region than the active trench, an oxide film that fills the active trench, the charge control trench and covers a top surface of the substrate, an electrode in the active trench, and source regions. The method also includes etching the oxide film off the top surface of the substrate and inside the active trench to leave a substantially flat layer of thick oxide having a target thickness at the bottom of the active trench.
摘要翻译：制造具有电荷控制沟槽和具有厚氧化物底部的有源控制沟槽的半导体器件的方法包括形成漂移区，在漂移区上延伸的阱区，延伸穿过阱区并进入漂移区的有源沟槽，比有源沟槽更深地延伸到漂移区域中的电荷控制沟槽，填充有源沟槽，电荷控制沟槽并覆盖衬底的顶表面的氧化物膜，有源沟槽中的电极和源极区域。该方法还包括将氧化膜从衬底的顶表面和有源沟槽内部蚀刻，以留下在有源沟槽的底部具有目标厚度的基本平坦的厚氧化物层。

7. 发明申请

US20100187602A1 METHODS FOR MAKING SEMICONDUCTOR DEVICES USING NITRIDE CONSUMPTION LOCOS OXIDATION 审中-公开
标题翻译：使用氮化物消耗LOCOS氧化制备半导体器件的方法
公开(公告)号：US20100187602A1
公开(公告)日：2010-07-29
申请号：US12362321
申请日：2009-01-29
申请人： Debra S. Woolsey , Tony L. Olsen , Gordon K. Madson
发明人： Debra S. Woolsey , Tony L. Olsen , Gordon K. Madson
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7813 , H01L21/28229 , H01L21/3105 , H01L21/76202 , H01L29/407 , H01L29/42368 , H01L29/513 , H01L29/66719 , H01L29/66734
摘要： Semiconductor devices and methods for making such devices using nitride consumption LOCOS oxidation are described. The semiconductor devices contain a planar field oxide structure that has been grown using a nitride layer as an oxidation mask. Once the field oxide structure has been grown, the nitride mask is not etched away, but rather converted to an oxide layer by an oxidation process using radicals of hydrogen and oxygen. The semiconductor devices also contain a shielded gate trench MOSFET that can be created using an oxide layer with an overlying nitride layer as the channel (sidewall) gate dielectric. An inter-poly-dielectric (IPD) layer can be formed from a thermally grown oxide which uses the nitride layer as a oxidation mask. The thickness of the IPD layer can be adjusted to any thickness needed with minimal effect of the channel gate dielectric layer. An oxidation process using radicals of hydrogen and oxygen can be preformed to consume the nitride layer and form the gate oxide in the channel region. Since the gate channel nitride acts as a barrier to the oxidation, the IPD oxide layer can be grown to any needed thickness with minimal oxidation to the channel gate and the nitride layer can be removed without any etching processes. Other embodiments are described.
摘要翻译：描述了使用氮化物消耗LOCOS氧化来制造这种器件的半导体器件和方法。半导体器件包含已经使用氮化物层作为氧化掩模生长的平面场氧化物结构。一旦场氧化物结构已经生长，则氮化物掩模不被蚀刻掉，而是通过使用氢和氧的自由基的氧化工艺转化为氧化物层。半导体器件还包含可以使用具有上覆氮化物层作为沟道（侧壁）栅极电介质的氧化物层来产生的屏蔽栅极沟槽MOSFET。可以由使用氮化物层作为氧化掩模的热生长氧化物形成多晶硅电介质（IPD）层。 IPD层的厚度可以通过沟道栅介质层的最小影响来调节到所需的任何厚度。可以进行使用氢和氧的自由基的氧化过程以消耗氮化物层并在沟道区域中形成栅极氧化物。由于栅极沟道氮化物作为氧化的屏障，所以可以将IPD氧化物层生长至任何所需的厚度，同时对沟道栅极进行最小的氧化，并且氮化物层可以在没有任何蚀刻工艺的情况下被去除。描述其他实施例。

8. 发明授权

US08497549B2 Method and structure for shielded gate trench FET 有权
标题翻译：屏蔽栅沟槽FET的方法和结构
公开(公告)号：US08497549B2
公开(公告)日：2013-07-30
申请号：US11848124
申请日：2007-08-30
申请人： Gordon K. Madson
发明人： Gordon K. Madson
IPC分类号： H01L29/66
CPC分类号： H01L29/7813 , H01L29/407 , H01L29/41766 , H01L29/66727 , H01L29/66734
摘要： A shielded gate field effect transistor includes a trench extending into a semiconductor region. A shield electrode is in a lower portion of the trench, and is insulated from the semiconductor region by a shield dielectric. The shield dielectric comprises first and second dielectric layers, the first dielectric layer extending between the second dielectric layer and the semiconductor region. The second dielectric layer comprises a material which during oxidation process inhibits growth of oxide along surfaces of the semiconductor region covered by the second dielectric layer. An inter-electrode dielectric overlies the shield electrode, and a gate dielectric lines upper trench sidewalls. A gate electrode is in an upper portion of the trench over the inter-electrode dielectric.
摘要翻译：屏蔽栅场效应晶体管包括延伸到半导体区域中的沟槽。屏蔽电极位于沟槽的下部，并通过屏蔽电介质与半导体区域绝缘。屏蔽电介质包括第一和第二介电层，第一介电层在第二介电层和半导体区之间延伸。第二电介质层包括在氧化过程中抑制氧化物沿着由第二电介质层覆盖的半导体区域的表面生长的材料。电极间电介质覆盖在屏蔽电极上，并且栅极介电线路上沟槽侧壁。栅极电极位于电极间电介质上方的沟槽的上部。

9. 发明申请

US20090050959A1 Method and Structure for Shielded Gate Trench FET 有权
标题翻译：屏蔽栅沟槽FET的方法和结构
公开(公告)号：US20090050959A1
公开(公告)日：2009-02-26
申请号：US11848124
申请日：2007-08-30
申请人： Gordon K. Madson
发明人： Gordon K. Madson
IPC分类号： H01L29/94 , H01L21/336
CPC分类号： H01L29/7813 , H01L29/407 , H01L29/41766 , H01L29/66727 , H01L29/66734
摘要： A shielded gate field effect transistor includes a trench extending into a semiconductor region. A shield electrode is in a lower portion of the trench, and is insulated from the semiconductor region by a shield dielectric. The shield dielectric comprises first and second dielectric layers, the first dielectric layer extending between the second dielectric layer and the semiconductor region. The second dielectric layer comprises a material which during oxidation process inhibits growth of oxide along surfaces of the semiconductor region covered by the second dielectric layer. An inter-electrode dielectric overlies the shield electrode, and a gate dielectric lines upper trench sidewalls. A gate electrode is in an upper portion of the trench over the inter-electrode dielectric.
摘要翻译：屏蔽栅场效应晶体管包括延伸到半导体区域中的沟槽。屏蔽电极位于沟槽的下部，并通过屏蔽电介质与半导体区域绝缘。屏蔽电介质包括第一和第二介电层，第一介电层在第二介电层和半导体区之间延伸。第二电介质层包括在氧化过程中抑制氧化物沿着由第二电介质层覆盖的半导体区域的表面生长的材料。电极间电介质覆盖在屏蔽电极上，并且栅极介电线路上沟槽侧壁。栅极电极位于电极间电介质上方的沟槽的上部。

10. 发明授权

US06635534B2 Method of manufacturing a trench MOSFET using selective growth epitaxy 失效
标题翻译：使用选择性生长外延制造沟槽MOSFET的方法
公开(公告)号：US06635534B2
公开(公告)日：2003-10-21
申请号：US09780040
申请日：2001-02-09
申请人： Gordon K. Madson
发明人： Gordon K. Madson
IPC分类号： H01L21336
CPC分类号： H01L29/7813 , H01L21/02381 , H01L21/02532 , H01L21/02639 , H01L21/823487 , H01L29/42368
摘要： A method of manufacturing a trench structure for a trench MOSFET, including the steps of providing a semiconductor substrate having a major surface, forming a dielectric pillar on the substrate major surface (the dielectric pillar extending substantially perpendicularly from the major surface of the substrate), selectively forming a semiconductor layer around the dielectric pillar, and removing a predetermined length of the dielectric pillar to create a trench in the substrate, the trench defined by sidewalls and a bottom. The method permits the controlled formation of a dielectric plug at the bottom of the trench, the plug having predetermined dimensions.
摘要翻译：一种制造用于沟槽MOSFET的沟槽结构的方法，包括以下步骤：提供具有主表面的半导体衬底，在衬底主表面（介质柱从衬底的主表面大致垂直延伸）形成介电柱，选择性地在电介质柱周围形成半导体层，以及去除预定长度的电介质柱以在衬底中形成沟槽，沟槽由侧壁和底部限定。该方法允许在沟槽的底部受控地形成电介质塞，塞具有预定的尺寸。

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