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1. 发明授权

US07045372B2 Apparatus and method for forming a battery in an integrated circuit 有权
公开(公告)号：US07045372B2
公开(公告)日：2006-05-16
申请号：US10632652
申请日：2003-08-02
申请人： Arne W. Ballantine , Robert A. Groves , Jennifer L. Lund , James S. Nakos , Michael B. Rice , Anthony K. Stamper
发明人： Arne W. Ballantine , Robert A. Groves , Jennifer L. Lund , James S. Nakos , Michael B. Rice , Anthony K. Stamper
IPC分类号： H01L21/00
CPC分类号： H01M10/052 , H01L23/522 , H01L23/58 , H01L2924/0002 , H01M4/5825 , H01M6/42 , H01M10/0562 , H01M10/058 , H01M10/425 , H01L2924/00
摘要： A method and structure that provides a battery within an integrated circuit for providing voltage to low-current electronic devices that exist within the integrated circuit. The method includes Front-End-Of-Line (FEOL) processing for generating a layer of electronic devices on a semiconductor wafer, followed by Back-End-Of-Line (BEOL) integration for wires connecting the electronic devices together to form completed electrical circuits of the integrated circuit. The BEOL integration includes forming a multilayered structure of wiring levels on the layer of electronic devices. Each wiring level includes conductive metallization (e.g., metal-plated vias, conductive wiring lines, etc.) embedded in insulative material. The battery is formed during BEOL integration within one or more wiring levels, and the conductive metallization conductively couples positive and negative terminals of the battery to the electronic devices. The battery may have several different topologies relative to the structural and geometrical relationships among the battery electrodes and electrolyte. Multiple batteries may be formed within one or more wiring levels, and may be conductively coupled to the electronic devices. The multiple batteries may be connected in series or in parallel.

2. 发明授权

US06563464B2 Integrated on-chip half-wave dipole antenna structure 失效
公开(公告)号：US06563464B2
公开(公告)日：2003-05-13
申请号：US09811940
申请日：2001-03-19
申请人： Arne W. Ballantine , Jennifer L. Lund , Anthony K. Stamper
发明人： Arne W. Ballantine , Jennifer L. Lund , Anthony K. Stamper
IPC分类号： H01Q138
CPC分类号： H01Q19/10 , H01Q1/2283 , H01Q1/38 , H01Q9/28
摘要： A semiconductor device is presented which is composed of two adjacent semiconductor chips. Each semiconductor chip has an integrated half-wave dipole antenna structure located thereon. The semiconductor chips are oriented so that the half-wave dipole antenna segments extend away from each other, allowing the segments to be effectively mated and thus form a complete full-wave dipole antenna. The two solder bumps which form the antenna are separated by a gap of approximately 200 microns. The length of each solder bump antenna is based on the wavelength and the medium of collection. Phased array antenna arrays may also be constructed from a plurality of these semiconductor chip antennae.

3. 发明授权

US06650000B2 Apparatus and method for forming a battery in an integrated circuit 失效
标题翻译：用于在集成电路中形成电池的装置和方法
公开(公告)号：US06650000B2
公开(公告)日：2003-11-18
申请号：US09761123
申请日：2001-01-16
申请人： Arne W. Ballantine , Robert A. Groves , Jennifer L. Lund , James S. Nakos , Michael B. Rice , Anthony K. Stamper
发明人： Arne W. Ballantine , Robert A. Groves , Jennifer L. Lund , James S. Nakos , Michael B. Rice , Anthony K. Stamper
IPC分类号： H01L2900
CPC分类号： H01M10/052 , H01L23/522 , H01L23/58 , H01L2924/0002 , H01M4/5825 , H01M6/42 , H01M10/0562 , H01M10/058 , H01M10/425 , H01L2924/00
摘要： A method and structure that provides a battery within an integrated circuit for providing voltage to low-current electronic devices that exist within the integrated circuit. The method includes Front-End-Of-Line (FEOL) processing for generating a layer of electronic devices on a semiconductor wafer, followed by Back-End-Of-Line (BEOL) integration for wires connecting the electronic devices together to form completed electrical circuits of the integrated circuit. The BEOL integration includes forming a multilayered structure of wiring levels on the layer of electronic devices. Each wiring level includes conductive metallization (e.g., metal-plated vias, conductive wiring lines, etc.) embedded in insulative material. The battery is formed during BEOL integration within one or more wiring levels, and the conductive metallization conductively couples positive and negative terminals of the battery to the electronic devices. The battery may have several different topologies relative to the structural and geometrical relationships among the battery electrodes and electrolyte. Multiple batteries may be formed within one or more wiring levels, and may be conductively coupled to the electronic devices. The multiple batteries may be connected in series or in parallel.
摘要翻译：在集成电路内提供电池的方法和结构，用于向存在于集成电路内的低电流电子器件提供电压。该方法包括用于在半导体晶片上产生电子器件层的前端在线（FEOL）处理，随后是用于将电子器件连接在一起的线的后端（BEOL）集成，以形成完整的电集成电路的电路。 BEOL集成包括在电子设备层上形成布线层的多层结构。每个布线层包括嵌入在绝缘材料中的导电金属化（例如，金属镀通孔，导电布线等）。电池在BEOL集成期间在一个或多个布线层次内形成，并且导电金属化将电池的正端子和负极端子电连接到电子设备。相对于电池电极和电解质之间的结构和几何关系，电池可能具有几种不同的拓扑结构。多个电池可以形成在一个或多个布线层中，并且可以导电地耦合到电子设备。多个电池可以串联或并联连接。

4. 发明授权

US08440522B2 Increasing an electrical resistance of a resistor by oxidation 有权
标题翻译：通过氧化增加电阻的电阻
公开(公告)号：US08440522B2
公开(公告)日：2013-05-14
申请号：US11968686
申请日：2008-01-03
申请人： Arne W. Ballantine , Daniel C. Edelstein , Anthony K. Stamper
发明人： Arne W. Ballantine , Daniel C. Edelstein , Anthony K. Stamper
IPC分类号： H01L21/8234 , H01L21/20
CPC分类号： C23C8/02 , C23C8/04 , C23C8/10 , C23C8/24 , C25D11/00 , C25D11/02 , C25D11/026 , H01C7/006 , H01C17/26 , H01L21/263 , H01L27/0802 , H01L29/8605 , Y10S257/904 , Y10S257/914
摘要： A method for increasing an electrical resistance of a resistor that is within a semiconductor structure. A fraction of a surface layer of the resistor is oxidized with oxygen particles. In an embodiment, the fraction of the surface layer is heated by a beam of particles, such that the semiconductor structure is within a chamber that includes the oxygen particles as gaseous oxygen-comprising molecules. In an embodiment, the semiconductor structure is immersed in a chemical solution which includes the oxygen particles, wherein the oxygen particles includes oxygen-comprising liquid molecules, oxygen ions, or an oxygen-comprising gas dissolved in the chemical solution under pressurization. In an embodiment, the resistor is tested to determine whether the electrical resistance of the resistor after being oxidized with the oxygen particles is within a tolerance of a predetermined target resistance.
摘要翻译：一种用于增加在半导体结构内的电阻器的电阻的方法。电阻的表面层的一部分被氧颗粒氧化。在一个实施方案中，表面层的分数由颗粒束加热，使得半导体结构在包含作为气态含氧分子的氧颗粒的室内。在一个实施方案中，将半导体结构浸入包括氧颗粒的化学溶液中，其中氧颗粒包括在加压下溶解在化学溶液中的含氧液体分子，氧离子或含氧气体。在一个实施例中，测试电阻器以确定在用氧颗粒氧化后电阻器的电阻是否在预定目标电阻的容限内。

5. 发明申请

US20080314754A1 INCREASING AN ELECTRICAL RESISTANCE OF A RESISTOR BY NITRIDIZATION 审中-公开
标题翻译：通过硝化提高电阻的耐电性
公开(公告)号：US20080314754A1
公开(公告)日：2008-12-25
申请号：US12202487
申请日：2008-09-02
申请人： Arne W. Ballantine , Daniel C. Edelstein , Anthony K. Stamper
发明人： Arne W. Ballantine , Daniel C. Edelstein , Anthony K. Stamper
IPC分类号： C25D11/32
CPC分类号： C23C8/02 , C23C8/04 , C23C8/10 , C23C8/24 , C25D11/00 , C25D11/02 , C25D11/026 , H01C7/006 , H01C17/26 , H01L21/263 , H01L27/0802 , H01L29/8605 , Y10S257/904 , Y10S257/914
摘要： A method for increasing an electrical resistance of a resistor. A fraction F of an exterior surface of a surface layer of a resistor of a semiconductor structure is exposed to the nitrogen-comprising molecules. An anodization electrical circuit is formed and includes: a DC power supply, an electrolytic solution including nitrogen, and the resistor partially immersed in the electrolytic solution. The DC power supply is activated and generates a voltage output, that causes an electrolytic reaction in the electrolytic solution near the resistor. The electrolytic reaction generates nitrogen ions from the nitrogen in the electrolytic solution. The fraction F is exposed to the nitrogen ions. A portion of the surface layer is nitridized by being reacted with the nitrogen ions at a temperature above ambient room temperature such that an electrical resistance of the resistor is increased.
摘要翻译：一种用于增加电阻器的电阻的方法。半导体结构的电阻器的表面层的外表面的分数F暴露于含氮分子。形成阳极氧化电路，包括：直流电源，含氮的电解液，部分浸入电解液中的电阻。直流电源被激活，产生电压输出，导致电解液附近的电解液中产生电解反应。电解反应从电解液中的氮中产生氮离子。馏分F暴露于氮离子。通过在高于环境室温的温度下与氮离子反应使表面层的一部分氮化，使得电阻器的电阻增加。

6. 发明授权

US07456074B2 Increasing an electrical resistance of a resistor by nitridization 失效
标题翻译：通过氮化增加电阻器的电阻
公开(公告)号：US07456074B2
公开(公告)日：2008-11-25
申请号：US11836308
申请日：2007-08-09
申请人： Arne W. Ballantine , Daniel C. Edelstein , Anthony K. Stamper
发明人： Arne W. Ballantine , Daniel C. Edelstein , Anthony K. Stamper
IPC分类号： H01L21/20
CPC分类号： C23C8/02 , C23C8/04 , C23C8/10 , C23C8/24 , C25D11/00 , C25D11/02 , C25D11/026 , H01C7/006 , H01C17/26 , H01L21/263 , H01L27/0802 , H01L29/8605 , Y10S257/904 , Y10S257/914
摘要： A method for increasing an electrical resistance of a resistor, by nitridizing a fraction of a surface layer of the resistor with nitrogen particles. An embodiment comprises heating the fraction of the surface layer by a beam of radiation or particles, such that the resistor is within a chamber that includes the nitrogen-comprising molecules. An embodiment comprises using an anodization circuit to electrolytically generate nitrogen ions in an electrolytic solution in which the resistor is immersed, wherein the nitrogen particles include the electrolytically-generated nitrogen ions. An embodiment comprises immersing the resistor in a chemical solution which includes the nitrogen particles, wherein the nitrogen particles may include nitrogen-comprising liquid molecules, nitrogen ions, or a nitrogen-comprising gas dissolved in the chemical solution under pressurization. An embodiment comprises testing the resistor during a nitridizing step to determine whether the electrical resistance of the resistor is within a tolerance.
摘要翻译：通过用氮颗粒氮化电阻表面层的一部分来提高电阻器的电阻的方法。一个实施方案包括通过辐射束或颗粒束加热表面层的部分，使得电阻在包含含氮分子的室内。一个实施例包括使用阳极氧化电路在其中浸入电阻器的电解液中电解产生氮离子，其中氮颗粒包括电解产生的氮离子。一个实施方案包括将电阻器浸入包括氮颗粒的化学溶液中，其中氮颗粒可以包括在加压下溶解在化学溶液中的含氮液体分子，氮离子或含氮气体。一个实施例包括在氮化步骤期间测试电阻器以确定电阻器的电阻是否在公差范围内。

7. 发明授权

US06489663B2 Spiral inductor semiconducting device with grounding strips and conducting vias 有权
公开(公告)号：US06489663B2
公开(公告)日：2002-12-03
申请号：US09753284
申请日：2001-01-02
申请人： Arne W. Ballantine , Robert A. Groves , Michael B. Rice , Anthony K. Stamper
发明人： Arne W. Ballantine , Robert A. Groves , Michael B. Rice , Anthony K. Stamper
IPC分类号： H01L2900
CPC分类号： H01L28/10 , H01L23/5227 , H01L27/08 , H01L2924/0002 , H01L2924/00
摘要： An integrated semiconducting device comprises a semiconducting substrate, a plurality of grounding strips disposed above the substrate in a lower metal level of the semiconducting device, an inductor positioned in an upper metal level of the semiconducting device, and a plurality of conducting vias connected to and extending away from the grounding strips towards the inductor. The inductor, conducting via, ground strips structure forms a Faraday cage that acts as a shield against electromagnetic radiation. The number and placement of the conductive vias are adjustable and can be optimized based on the relative importance of maximizing the quality factor Q of the inductor or minimizing the capacitance between the inductor and ground.

8. 发明授权

US07804391B2 Changing an electrical resistance of a resistor 失效
标题翻译：改变电阻的电阻
公开(公告)号：US07804391B2
公开(公告)日：2010-09-28
申请号：US11758746
申请日：2007-06-06
申请人： Arne W. Ballantine , Cyril Cabral, Jr. , Daniel C. Edelstein , Anthony K. Stamper
发明人： Arne W. Ballantine , Cyril Cabral, Jr. , Daniel C. Edelstein , Anthony K. Stamper
IPC分类号： H01C10/00
CPC分类号： H01L28/20 , H01C7/006 , H01C17/242 , Y10T29/49082 , Y10T29/49099 , Y10T29/49105
摘要： An electrical structure. The electrical structure includes a resistor having a length L and an electrical resistance R(t) at a time t; and a laser radiation directed onto a portion of the resistor, wherein the portion of the resistor includes a fraction F of the length L, wherein the laser radiation heats the portion of the resistor such that the electrical resistance R(t) instantaneously changes at a rate dR/dt, and wherein the resistor is coupled to a semiconductor substrate.
摘要翻译：电气结构。电气结构包括在时间t具有长度L和电阻R（t）的电阻器; 以及引导到电阻器的一部分的激光辐射，其中电阻器的该部分包括长度为L的分数F，其中激光辐射加热电阻器的部分，使得电阻R（t）瞬时地在速率dR / dt，并且其中所述电阻器耦合到半导体衬底。

9. 发明授权

US06647614B1 Method for changing an electrical resistance of a resistor 失效
标题翻译：改变电阻器电阻的方法
公开(公告)号：US06647614B1
公开(公告)日：2003-11-18
申请号：US09693765
申请日：2000-10-20
申请人： Arne W. Ballantine , Cyril Cabral, Jr. , Daniel C. Edelstein , Anthony K. Stamper
发明人： Arne W. Ballantine , Cyril Cabral, Jr. , Daniel C. Edelstein , Anthony K. Stamper
IPC分类号： H01C1700
CPC分类号： H01L28/20 , H01C7/006 , H01C17/242 , Y10T29/49082 , Y10T29/49099 , Y10T29/49105
摘要： A method for changing an electrical resistance of a resistor. Initially, the resistor is provided, wherein the resistor has a length L and an electrical resistance R1. A portion of the resistor is exposed to a laser radiation, wherein the portion includes a fraction F of the length L of the resistor. After the resistor has been exposed to the laser radiation, the resistor has an electrical resistance R2, wherein R2 is unequal to R1.
摘要翻译：一种改变电阻器电阻的方法。首先，提供电阻器，其中电阻器具有长度L和电阻R1。电阻器的一部分暴露于激光辐射，其中该部分包括电阻器长度L的分数F. 在电阻器暴露于激光辐射之后，电阻器具有电阻R2，其中R2不等于R1。

10. 发明授权

US06339022B1 Method of annealing copper metallurgy 失效
标题翻译：铜冶炼退火方法
公开(公告)号：US06339022B1
公开(公告)日：2002-01-15
申请号：US09475712
申请日：1999-12-30
申请人： Arne W. Ballantine , Edward C. Cooney, III , George A. Dunbar, III , Cheryl G. Faltermeier , Jeffrey D. Gilbert , Ronald D. Goldblatt , Nancy A. Greco , Stephen E. Greco , Frank V. Liucci , Glenn Robert Miller , Bruce A. Root , Andrew H. Simon , Anthony K. Stamper , Ronald A. Warren , David H. Yao
发明人： Arne W. Ballantine , Edward C. Cooney, III , George A. Dunbar, III , Cheryl G. Faltermeier , Jeffrey D. Gilbert , Ronald D. Goldblatt , Nancy A. Greco , Stephen E. Greco , Frank V. Liucci , Glenn Robert Miller , Bruce A. Root , Andrew H. Simon , Anthony K. Stamper , Ronald A. Warren , David H. Yao
IPC分类号： H01L2144
CPC分类号： H01L21/02074 , H01L21/3212 , H01L21/7684
摘要： A method for increasing the production yield of semiconductor devices having copper metallurgy planarized by a chemical-mechanical planarization process which includes a slurry that contains a conductor passivating agent, like benzotriazole, wherein a non-oxidizing anneal is used to remove any residue which might interfere with mechanical probing of conductive lands on the substrate prior to further metallization steps. The anneal may be performed by any of several techniques including a vacuum chamber, a standard furnace or by rapid thermal annealing.
摘要翻译：一种通过化学机械平面化方法提高具有铜冶金平面化的半导体器件的生产率的方法，该方法包括含有导体钝化剂（如苯并三唑）的浆料，其中使用非氧化退火来除去可能干扰的任何残余物在进一步的金属化步骤之前，在衬底上的导电焊盘的机械探测。退火可以通过几种技术中的任何一种进行，包括真空室，标准炉或快速热退火。

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