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    • 6. 发明授权
    • Submerged motor and pump assembly
    • 潜水电机和泵组件
    • US07513755B2
    • 2009-04-07
    • US10883229
    • 2004-07-01
    • Penrod GeisingerMark C. JohnsonJason L. AddinkScott D. KlopfensteinGregory E. Young
    • Penrod GeisingerMark C. JohnsonJason L. AddinkScott D. KlopfensteinGregory E. Young
    • F04B17/03F01D25/24F03B11/08
    • F04D29/605F04D13/086F04D29/183
    • An in-line motor and pump assembly is supported at the bottom of a fuel storage tank by a pipe and an internal concentric conduit for housing electrical conductors extending therewithin to the motor. An impeller, coaxial with the rotor of the motor, draws the fuel into an annular passageway surrounding the stator of the motor. Further passageways convey the fuel to an annular passageway defined between the pipe and the conduit for discharge external of the storage tank. A low pressure environment attendant the inflow of the fuel is used to channel fuel for lubrication and cooling purposes to a lower journal bearing and thrust bearing supporting a common shaft for the impeller and the motor. A high pressure environment attendant outflow of fuel is used to channel fuel for lubrication and cooling purposes to a journal bearing supporting the upper end of the shaft.
    • 在线电机和泵组件通过管道和内部同心导管支撑在燃料储罐的底部,用于容纳在其中延伸到电动机的电导体。 与电动机的转子同轴的叶轮将燃料吸入围绕电动机定子的环形通道中。 另外的通道将燃料传送到限定在管道和管道之间的环形通道,用于在储罐外部排放。 用于燃料流入的低压环境用于将燃料用于润滑和冷却目的,以将下轴颈轴承和推力轴承支撑在叶轮和电动机的公共轴上。 燃料的高压环境伴随的流出被用于将燃料用于润滑和冷却目的,用于支撑轴的上端的轴颈轴承。
    • 10. 发明授权
    • Integrated circuit test optimization using adaptive test pattern sampling algorithm
    • 使用自适应测试模式采样算法的集成电路测试优化
    • US08689066B2
    • 2014-04-01
    • US13172179
    • 2011-06-29
    • Matthew S. GradyMark C. JohnsonBradley D. PepperDean G. PercyJoseph C. Pranys
    • Matthew S. GradyMark C. JohnsonBradley D. PepperDean G. PercyJoseph C. Pranys
    • G01R31/28
    • G06F11/263G01R31/31835
    • A method of implementing integrated circuit device testing includes performing baseline testing of a first group of chips using a full set of test patterns, and for chip identified as failing, determining, a score for each test pattern in the full set. The score is indicative of an ability of the test pattern to uniquely identify a failing chip with respect to other test patterns. Following the baseline testing, streamlined testing on a second group of chips is performed, using a reduced set of the test patterns having highest average scores as determined by the baseline testing. Following the streamlined testing, full testing on a third group of chips is performed using the full set of test patterns, and updating the average score for each pattern. Further testing alternates between the streamlined testing and the full testing for additional groups of chips.
    • 实现集成电路设备测试的方法包括使用全套测试模式来执行第一组芯片的基线测试,以及对于被识别为故障的芯片,确定全集中每个测试模式的得分。 该分数表示测试图案相对于其他测试图案唯一地识别故障芯片的能力。 在基线测试之后,使用由基线测试确定的具有最高平均分数的测试模式的一组减少的集合来执行第二组芯片的简化测试。 在精简测试之后,使用完整的测试模式进行第三组芯片的全面测试,并更新每种模式的平均分数。 进一步的测试在简化的测试和对另外一组芯片的完整测试之间进行了交替。