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    • 4. 发明授权
    • Programmable read-only memory
    • 可编程只读存储器
    • US07529148B2
    • 2009-05-05
    • US11733319
    • 2007-04-10
    • Sunay ShahOlivier Karim Abed-meraimPatrick Zebedee
    • Sunay ShahOlivier Karim Abed-meraimPatrick Zebedee
    • G11C7/00
    • G11C17/16G11C2216/26
    • A programmable read-only memory comprises a memory cell or a plurality of such cells arranged as an array. Each memory cell comprises a transistor, such as a MOS TFT. An electronic switch allows the control electrode, such as the gate, to be substantially electrically isolated during a programming mode so that the gate is electrically floating during this mode. During the programming mode, a programming voltage is supplied across the main conductive path of the transistor, such as across the source-drain channel. The programming voltage is sufficiently large to fuse the main conduction path when the control electrode of the transistor is floating but is insufficient to fuse the main conduction path when the control electrode is not floating and is connected to a suitable defined voltage. The transistor therefore performs functions of memory cell selection while simultaneously acting as the fusible element and the arrangement requires fewer transistors which are capable of operating at the programming current required for fusing. The memory may therefore occupy a reduced area.
    • 可编程只读存储器包括一个存储单元或多个排列成阵列的这样的单元。 每个存储单元包括诸如MOS TFT的晶体管。 电子开关允许诸如栅极的控制电极在编程模式期间基本上电隔离,使得栅极在该模式期间是电浮置的。 在编程模式期间,跨越源极 - 漏极通道的晶体管的主导电路径提供编程电压。 当晶体管的控制电极浮动时,编程电压足够大以熔化主导通路径,但是当控制电极不浮动并连接到合适的限定电压时不足以熔化主导通路径。 因此,晶体管执行存储单元选择的功能,同时充当可熔元件,并且该布置需要更少的晶体管,这些晶体管能够在熔化所需的编程电流下工作。 因此,存储器可能占用减少的面积。
    • 5. 发明申请
    • BIPOLAR JUNCTION TRANSISTOR
    • 双极接头晶体管
    • US20120061802A1
    • 2012-03-15
    • US12878062
    • 2010-09-09
    • Gareth NICHOLASBenjamin James HadwenSunay Shah
    • Gareth NICHOLASBenjamin James HadwenSunay Shah
    • H01L29/73
    • H01L29/7317H01L29/0821H01L29/1008
    • A bipolar junction transistor includes a semiconductor island on an insulating substrate; an emitter and at least one of a collector and sub collector within the semiconductor island, the emitter and the at least one of the collector and the sub collector being of a first conductivity type; a base within the semiconductor island separating the emitter and the at least one of the collector and the sub collector, the base being of a second conductivity type; a base contact region within the semiconductor island, the base contact region being of the second conductivity type; and a connecting base region adjacent the base within the semiconductor island and connecting the base to the base contact region while not directly contacting the emitter, the connecting base region being of the second conductivity type with a doping concentration less than a doping concentration of the base contact region.
    • 双极结型晶体管包括绝缘基板上的半导体岛; 半导体岛内的发射极和集电极和副集电极中的至少一个,所述发射极和所述集电极和副集电极中的至少一个为第一导电型; 分离发射极和集电极和副集电极中的至少一个的半导体岛内的基极,基极为第二导电型; 半导体岛内的基极接触区域,第二导电类型的基极接触区域; 以及与所述半导体岛内的所述基极相邻的连接基极区域,并且在不直接接触所述发射极的同时将所述基极连接到所述基极接触区域,所述连接基极区域为所述第二导电型,其掺杂浓度小于所述基极的掺杂浓度 接触区域
    • 6. 发明申请
    • THIN FILM TRANSISTOR AND ACTIVE MATRIX DISPLAY
    • 薄膜晶体管和有源矩阵显示
    • US20110012125A1
    • 2011-01-20
    • US12933450
    • 2009-04-20
    • Gareth NicholasBenjamin James HadwenSunay Shah
    • Gareth NicholasBenjamin James HadwenSunay Shah
    • H01L33/00H01L29/786
    • H01L29/78609G02F2201/58H01L29/78615
    • A thin film transistor is formed in a semiconductor island on an insulating substrate. The transistor comprises a source (1502) and a drain (1504) of first conductivity type and a channel (1508) of a second opposite conductivity type. The channel is overlapped by one or more insulated gates (1510) and is provided with isolation diodes. Each isolation diode comprises a first region (1506) which is lightly doped and a second region (1512) which is heavily doped and of the second conductivity type. The diodes are not overlapped by the gate (1510). The first and second regions (1506, 1512) extend away from the channel (1508) by less than the length of the adjacent source or drain. The lightly doped region (1506) extends away from the source or drain and the heavily doped region (1512) extends away from the lightly doped region such that the first and second regions (1506, 1512) form a p-n junction with the adjacent source or drain in a direction orthogonal to the main conduction path of the transistor but not parallel to the main conduction path.
    • 薄膜晶体管形成在绝缘基板上的半导体岛中。 晶体管包括第一导电类型的源极(1502)和漏极(1504)和具有第二相反导电类型的沟道(1508)。 通道由一个或多个绝缘栅极(1510)重叠,并且设置有隔离二极管。 每个隔离二极管包括轻度掺杂的第一区域(1506)和重掺杂的第二导电类型的第二区域(1512)。 二极管不与栅极重叠(1510)。 第一和第二区域(1506,1512)远离通道(1508)延伸小于相邻源极或漏极的长度。 轻掺杂区域(1506)远离源极或漏极延伸,并且重掺杂区域(1512)远离轻掺杂区域延伸,使得第一和第二区域(1506,1512)与相邻源形成pn结,或 在与晶体管的主导通路正交的方向上漏极,但不平行于主导通路径。
    • 8. 发明申请
    • PRE-PROGRAMMING OF IN-PIXEL NON-VOLATILE MEMORY
    • 内像素非易失性存储器的预编程
    • US20120038597A1
    • 2012-02-16
    • US12853359
    • 2010-08-10
    • Michael P. COULSONSunay ShahBenjamin J. Hadwen
    • Michael P. COULSONSunay ShahBenjamin J. Hadwen
    • G09G5/00G09G3/36
    • G09G3/3659G09G2300/0857G09G2310/0205
    • A display device includes a liquid crystal display having a plurality of pixels, each pixel having a corresponding pixel electrode. Each pixel also includes a volatile memory (VM) cell and a non-volatile memory (NVM) cell. The VM cell includes a VM cell input for receiving data to be stored in the VM cell and a VM cell output for outputting data stored in the VM cell. The NVM cell includes an NVM program input operatively coupled to the VM cell output, and an NVM data output for providing data stored in the first NVM cell to the pixel electrode. The display device also includes programming logic operatively coupled to each of the plurality of pixels, wherein the programming logic is configured to substantially simultaneously program each pixel's first NVM cell with data provided by each pixel's VM cell.
    • 显示装置包括具有多个像素的液晶显示器,每个像素具有对应的像素电极。 每个像素还包括易失性存储器(VM)单元和非易失性存储器(NVM)单元。 VM单元包括用于接收要存储在VM单元中的数据的VM单元输入和用于输出存储在VM单元中的数据的VM单元输出。 NVM单元包括可操作地耦合到VM单元输出的NVM程序输入和用于将存储在第一NVM单元中的数据提供给像素电极的NVM数据输出。 显示设备还包括可操作地耦合到多个像素中的每一个的编程逻辑,其中编程逻辑被配置为基本上同时用每个像素的VM单元提供的数据对每个像素的第一NVM单元进行编程。
    • 9. 发明申请
    • METHOD OF AND APPARATUS FOR ACQUIRING AN IMAGE
    • 用于获取图像的方法和装置
    • US20110151928A1
    • 2011-06-23
    • US13060438
    • 2009-08-04
    • David James MontgomeryBenjamin James HadwenSunay ShahTamas Zeffer
    • David James MontgomeryBenjamin James HadwenSunay ShahTamas Zeffer
    • H04M1/02H04N5/335H04N5/225
    • G06K9/2036G06K7/1465
    • An apparatus for acquiring an image comprises a display (60), such as an LCD and backlight, for illuminating the object. A photosensor array (61) detects light reflected from the object. A controller (62) causes the display (60) and the photosensor array (61) to: illuminate the object (100); acquire (102) a first image (104) of the object; display a first illuminating pattern (106) for illuminating the object, which first illuminating pattern is derived (108) from the first image; and acquire (102) a second image (110) of the object illuminated by the first illuminating pattern (106). The controller (62) preferably causes the display (60) and the photosensor array (61) to: display a second illuminating pattern (112) for illuminating the object, which second illuminating pattern is derived (108) from at least the second image; and acquire a third image (114) of the object illuminated by the second illuminating pattern (112).
    • 用于获取图像的装置包括用于照亮对象的诸如LCD和背光的显示器(60)。 光电传感器阵列(61)检测从物体反射的光。 控制器(62)使显示器(60)和光电传感器阵列(61)照亮对象(100); 获取(102)所述对象的第一图像(104); 显示用于照亮所述物体的第一照明图案(106),从所述第一图像导出所述第一照明图案(108); 并且获取(102)由所述第一照明图案(106)照亮的所述物体的第二图像(110)。 控制器(62)优选地使显示器(60)和光电传感器阵列(61)从至少第二图像显示用于照亮对象的第二照明图案(112),该第二照明图案被导出(108); 并且获取由第二照明图案(112)照亮的物体的第三图像(114)。