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1. 发明授权

US07649538B1 Reconfigurable high performance texture pipeline with advanced filtering 有权
标题翻译：可重构的高性能纹理管道与先进的过滤
公开(公告)号：US07649538B1
公开(公告)日：2010-01-19
申请号：US11556674
申请日：2006-11-03
申请人： Alexander L. Minkin , Joel J. McCormack , Paul S. Heckbert , Michael J. M. Toksvig , Luke Y. Chang , Karim Abdalla , Bo Hong , John W. Berendsen , Walter Donovan , Emmett M. Kilgariff
发明人： Alexander L. Minkin , Joel J. McCormack , Paul S. Heckbert , Michael J. M. Toksvig , Luke Y. Chang , Karim Abdalla , Bo Hong , John W. Berendsen , Walter Donovan , Emmett M. Kilgariff
IPC分类号： G06T17/00 , G06T11/40 , G09G5/00 , G09G5/02 , G06K9/40 , G06K9/32 , G06K9/64
CPC分类号： G06T1/60 , G06F3/14 , G06T15/04 , G06T2200/28 , G09G5/026 , G09G5/22 , G09G5/363 , G09G5/393 , G09G5/395 , G09G2360/06 , G09G2360/121 , G09G2360/18
摘要： Circuits, methods, and apparatus that provide texture caches and related circuits that store and retrieve texels in a fast and efficient manner. One such texture circuit provides an increased number of bilerps for each pixel in a group of pixels, particularly when trilinear or aniso filtering is needed. For trilinear filtering, texels in a first and second level of detail are retrieved for a number of pixels during a clock cycle. When aniso filtering is performed, multiple bilerps can be retrieved for each of a number of pixels during one clock cycle.
摘要翻译：提供纹理缓存和相关电路的电路，方法和装置，以快速和有效的方式存储和检索纹素。一个这样的纹理电路为一组像素中的每个像素提供了更多数量的iler骨，特别是当需要三线性或茴香过滤时。对于三线性滤波，在一个时钟周期内针对多个像素检索第一和第二细节级别的纹素。当执行了茴香过滤时，可以在一个时钟周期内为多个像素中的每一个检索多个b骨。

2. 发明授权

US07884831B2 Reconfigurable high-performance texture pipeline with advanced filtering 有权
标题翻译：可重构高性能纹理管道，具有先进的过滤功能
公开(公告)号：US07884831B2
公开(公告)日：2011-02-08
申请号：US12689939
申请日：2010-01-19
申请人： Alexander L. Minkin , Joel J. McCormack , Paul S. Heckbert , Michael J. M. Toksvig , Luke Y. Chang , Karim Abdalla , Bo Hong , John W. Berendsen , Walter Donavan , Emmett M. Kilgariff
发明人： Alexander L. Minkin , Joel J. McCormack , Paul S. Heckbert , Michael J. M. Toksvig , Luke Y. Chang , Karim Abdalla , Bo Hong , John W. Berendsen , Walter Donavan , Emmett M. Kilgariff
IPC分类号： G06T17/00 , G06T11/40 , G09G5/00 , G09G5/02 , G06K9/40 , G06K9/32 , G06K9/64
CPC分类号： G06T1/60 , G06F3/14 , G06T15/04 , G06T2200/28 , G09G5/026 , G09G5/22 , G09G5/363 , G09G5/393 , G09G5/395 , G09G2360/06 , G09G2360/121 , G09G2360/18
摘要： Circuits, methods, and apparatus that provide texture caches and related circuits that store and retrieve texels in a fast and efficient manner. One such texture circuit provides an increased number of bilerps for each pixel in a group of pixels, particularly when trilinear or aniso filtering is needed. For trilinear filtering, texels in a first and second level of detail are retrieved for a number of pixels during a clock cycle. When aniso filtering is performed, multiple bilerps can be retrieved for each of a number of pixels during one clock cycle.
摘要翻译：提供纹理缓存和相关电路的电路，方法和装置，以快速和有效的方式存储和检索纹素。一个这样的纹理电路为一组像素中的每个像素提供了更多数量的iler骨，特别是当需要三线性或茴香过滤时。对于三线性滤波，在一个时钟周期内针对多个像素检索第一和第二细节级别的纹素。当执行了茴香过滤时，可以在一个时钟周期内为多个像素中的每一个检索多个b骨。

3. 发明授权

US07385607B2 Scalable shader architecture 有权
标题翻译：可扩展着色器架构
公开(公告)号：US07385607B2
公开(公告)日：2008-06-10
申请号：US10938042
申请日：2004-09-10
申请人： Rui M. Bastos , Karim M. Abdalla , Christian Rouet , Michael J. M. Toksvig , Johnny S. Rhoades , Roger L. Allen , John Douglas Tynefield, Jr. , Emmett M. Kilgariff , Gary M. Tarolli , Brian Cabral , Craig Michael Wittenbrink , Sean J. Treichler
发明人： Rui M. Bastos , Karim M. Abdalla , Christian Rouet , Michael J. M. Toksvig , Johnny S. Rhoades , Roger L. Allen , John Douglas Tynefield, Jr. , Emmett M. Kilgariff , Gary M. Tarolli , Brian Cabral , Craig Michael Wittenbrink , Sean J. Treichler
IPC分类号： G06F15/16 , G06F15/80 , G06T1/20
CPC分类号： G06T15/005
摘要： A scalable shader architecture is disclosed. In accord with that architecture, a shader includes multiple shader pipelines, each of which can perform processing operations on rasterized pixel data. Shader pipelines can be functionally removed as required, thus preventing a defective shader pipeline from causing a chip rejection. The shader includes a shader distributor that processes rasterized pixel data and then selectively distributes the processed rasterized pixel data to the various shader pipelines, beneficially in a manner that balances workloads. A shader collector formats the outputs of the various shader pipelines into proper order to form shaded pixel data. A shader instruction processor (scheduler) programs the individual shader pipelines to perform their intended tasks. Each shader pipeline has a shader gatekeeper that interacts with the shader distributor and with the shader instruction processor such that pixel data that passes through the shader pipelines is controlled and processed as required.
摘要翻译：公开了可扩展着色器架构。根据该架构，着色器包括多个着色器管线，每个着色器管线可以对光栅化像素数据执行处理操作。着色器管线可以根据需要进行功能删除，从而防止着色器流水线造成芯片排斥。着色器包括一个着色器分配器，用于处理光栅化的像素数据，然后有选择地将经处理的光栅化像素数据分配到各种着色器管道，有利于平衡工作负载。着色器收集器将各种着色器管线的输出格式化为正确的顺序，以形成阴影像素数据。着色器指令处理器（调度器）对各个着色器管线进行编程，以执行其预期任务。每个着色器管道具有与着色器分配器和着色器指令处理器交互的着色器网守，使得通过着色器管线的像素数据被根据需要被控制和处理。

4. 发明授权

US07595806B1 Method and system for implementing level of detail filtering in a cube mapping application 有权
标题翻译：在多维数据集映射应用程序中实现详细过滤级别的方法和系统
公开(公告)号：US07595806B1
公开(公告)日：2009-09-29
申请号：US10911462
申请日：2004-08-03
申请人： Michael J. M. Toksvig , William P. Newhall, Jr. , Paul S. Heckbert
发明人： Michael J. M. Toksvig , William P. Newhall, Jr. , Paul S. Heckbert
IPC分类号： G09G5/00
CPC分类号： G06T15/04 , G06T2210/36
摘要： A method for implementing LOD (level of detail) filtering in a cube mapping application. The method includes accessing a first sample and a second sample for a cube map. A cube map path is computed between the first sample and the second sample. A distance is computed between the first sample and the second sample, wherein the distance is measured using the cube map path. LOD filtering is then implemented by using the distance between the first sample and the second sample.
摘要翻译：在多维数据集映射应用程序中实现LOD（细节级别）过滤的方法。该方法包括访问立方体贴图的第一样本和第二样本。在第一个样本和第二个样本之间计算立方体贴图路径。在第一样品和第二样品之间计算距离，其中使用立方体贴图路径测量距离。然后通过使用第一个样品和第二个样品之间的距离来实现LOD滤波。

5. 发明授权

US07737988B1 Using font filtering engines for texture blitting 有权
标题翻译：使用字体过滤引擎进行纹理拼接
公开(公告)号：US07737988B1
公开(公告)日：2010-06-15
申请号：US11273767
申请日：2005-11-14
申请人： Michael J. M. Toksvig , Alexander L. Minkin , Walter E. Donovan
发明人： Michael J. M. Toksvig , Alexander L. Minkin , Walter E. Donovan
IPC分类号： G09G5/00
CPC分类号： G06T11/203
摘要： Systems and methods used for font filtering may also be used to perform texture blits. Texture data is read in blocks that are coarsely aligned. Font engines may be used to align the texture data as specified by a copy (blit) instruction to provide a finely aligned region of the texture data within a font filter footprint. The finely aligned region is then bilinearly filtered using a “nearest” mode to provide the bit aligned region of the texture map specified by the copy instruction.
摘要翻译：用于字体过滤的系统和方法也可用于执行纹理blits。纹理数据以粗略对齐的块读取。字体引擎可以用于对齐由复制（blit）指令指定的纹理数据，以在字体过滤器占用空间内提供纹理数据的精细对齐的区域。然后使用“最近”模式对精细对准的区域进行双线性滤波，以提供由复制指令指定的纹理图的位对齐区域。

6. 发明授权

US08441497B1 Interpolation of vertex attributes in a graphics processor 有权
标题翻译：在图形处理器中插入顶点属性
公开(公告)号：US08441497B1
公开(公告)日：2013-05-14
申请号：US11890838
申请日：2007-08-07
申请人： Edward A. Hutchins , Michael J. M. Toksvig
发明人： Edward A. Hutchins , Michael J. M. Toksvig
IPC分类号： G09G5/00 , G05G5/02 , G06K9/32
CPC分类号： G06T15/005 , G06T15/20
摘要： Vertex data can be accessed for a graphics primitive. The vertex data includes homogeneous coordinates for each vertex of the primitive. The homogeneous coordinates can be used to determine perspective-correct barycentric coordinates that are normalized by the area of the primitive. The normalized perspective-correct barycentric coordinates can be used to determine an interpolated value of an attribute for the pixel. These operations can be performed using adders and multipliers implemented in hardware.
摘要翻译：可以为图形原语访问顶点数据。顶点数据包括基元的每个顶点的均匀坐标。均匀坐标可用于确定通过原语区域归一化的透视校正重心坐标。可以使用归一化的透视校正重心坐标来确定像素的属性的内插值。这些操作可以使用在硬件中实现的加法器和乘法器执行。

7. 发明授权

US08068118B1 System and method for modifying a number of texture samples for anisotropic texture filtering 有权
标题翻译：用于修改多个纹理样本以进行各向异性纹理过滤的系统和方法
公开(公告)号：US08068118B1
公开(公告)日：2011-11-29
申请号：US12114662
申请日：2008-05-02
申请人： Michael J. M. Toksvig , William P. Newhall, Jr.
发明人： Michael J. M. Toksvig , William P. Newhall, Jr.
IPC分类号： G09G5/00
CPC分类号： G06T15/04
摘要： Systems and methods for modifying the number of texture samples used to produce an anisotropically filtered texture mapped pixel may improve texture mapping performance. When the number of texture samples is reduced, fewer texels are read and fewer filtering computations are needed to produce a texture value for an anisotropic footprint. The number of texture samples is reduced based on the mip map level weight. The number of texture samples may also be modified using specific parameters for the coarse and/or fine mip map levels. The spacing between the texture samples along the major axis of anisotropy may be modified to improve image quality or texture cache performance.
摘要翻译：用于修改用于产生各向异性过滤纹理映射像素的纹理样本数量的系统和方法可以改善纹理映射性能。当纹理样本的数量减少时，读取更少的纹素，并且需要较少的滤波计算来产生各向异性足迹的纹理值。基于mip映射级别权重减少纹理样本的数量。纹理样本的数量也可以使用粗略和/或精细的mip地图级别的特定参数进行修改。沿着各向异性长轴的纹理样本之间的间距可以被修改以改善图像质量或纹理缓存性能。

8. 发明授权

US07576751B2 Pixel center position displacement 有权
标题翻译：像素中心位置位移
公开(公告)号：US07576751B2
公开(公告)日：2009-08-18
申请号：US11532069
申请日：2006-09-14
申请人： Rui M. Bastos , Michael J. M. Toksvig , Karim M. Abdalla
发明人： Rui M. Bastos , Michael J. M. Toksvig , Karim M. Abdalla
IPC分类号： G09G5/00 , G06T11/20 , G06T15/00 , G06K9/36 , G06K9/40
CPC分类号： G06T3/40
摘要： A pixel center position that is not covered by a primitive covering a portion of the pixel is displaced to lie within a fragment formed by the intersection of the primitive and the pixel. X,y coordinates of a pixel center are adjusted to displace the pixel center position to lie within the fragment, affecting actual texture map coordinates or barycentric weights. Alternatively, a centroid sub-pixel sample position is determined based on coverage data for the pixel and a multisample mode. The centroid sub-pixel sample position is used to compute pixel or sub-pixel parameters for the fragment.
摘要翻译：未被覆盖像素的一部分的原图覆盖的像素中心位置被移位以位于由图元和像素的交点形成的片段内。调整像素中心的X，Y坐标以使像素中心位置位于片段内，影响实际纹理图坐标或重心权重。或者，基于像素的覆盖数据和多采样模式来确定质心子像素采样位置。质心子像素采样位置用于计算片段的像素或子像素参数。

9. 发明授权

US07369140B1 System, apparatus and method for subpixel shifting of sample positions to anti-alias computer-generated images 有权
标题翻译：将样本位置子像素移位到抗锯齿计算机生成的图像的系统，装置和方法
公开(公告)号：US07369140B1
公开(公告)日：2008-05-06
申请号：US11144996
申请日：2005-06-03
申请人： Gary C. King , Michael J. M. Toksvig
发明人： Gary C. King , Michael J. M. Toksvig
IPC分类号： G06F17/00 , G06T15/40 , G06T15/50 , G06T11/20
CPC分类号： G06T15/503 , G06T2200/12
摘要： A system, apparatus, and method are disclosed for modifying positions of sample positions for selectably oversampling pixels to anti-alias non-geometric portions of computer-generated images, such as texture, at least in part, by translating (e.g., shifting) shading sample positions relative to a frame of reference in which there is no relative motion between the geometries and the coverage sample positions. In one embodiment, an exemplary method determines whether a coverage sample position is covered by a geometric primitive. The method includes translating a shading sample position from an original shading sample position to the coverage sample position. This generally occurs if the geometry covers the coverage sample position to form a covered coverage sample position. Further, the method samples a shading value at the covered coverage sample positions for the pixel portion to anti-alias, for example, texture to reduce level of detail (“LOD”) artifacts.
摘要翻译：公开了一种系统，装置和方法，用于将用于可选择过采样像素的样本位置的位置修改为计算机生成的图像的抗混叠非几何部分，例如纹理，至少部分地通过平移（例如，移位）阴影相对于参考系的样本位置，其中几何和覆盖样本位置之间不存在相对运动。在一个实施例中，示例性方法确定覆盖样本位置是否被几何图元覆盖。该方法包括将着色样本位置从原始着色样本位置转换到覆盖样本位置。如果几何覆盖覆盖样本位置以形成覆盖的覆盖样本位置，则通常会发生这种情况。此外，该方法将用于像素部分的覆盖覆盖样本位置处的阴影值采样为抗混叠，例如纹理以降低细节水平（“LOD”）伪像。

10. 发明授权

US08780128B2 Contiguously packed data 有权
标题翻译：连续打包数据
公开(公告)号：US08780128B2
公开(公告)日：2014-07-15
申请号：US12002641
申请日：2007-12-17
申请人： Michael J. M. Toksvig , Justin Michael Mahan , Christopher L. Mills
发明人： Michael J. M. Toksvig , Justin Michael Mahan , Christopher L. Mills
IPC分类号： G09G5/36 , G06F12/00
CPC分类号： G06F12/0886 , G06F12/04 , G06T1/60
摘要： Data for data elements (e.g., pixels) can be stored in an addressable storage unit that can store a number of bits that is not a whole number multiple of the number of bits of data per data element. Similarly, a number of the data elements can be transferred per unit of time over a bus, where the width of the bus is not a whole number multiple of the number of bits of data per data element. Data for none of the data elements is stored in more than one of the storage units or transferred in more than one unit of time. Also, data for multiple data elements is packaged contiguously in the storage unit or across the width of the bus.
摘要翻译：可以将数据元素（例如，像素）的数据存储在可寻址存储单元中，该存储单元可以存储不是每个数据元素的数据位数的整数倍的位数。类似地，可以通过总线上的每单位时间传送多个数据元素，其中总线的宽度不是每个数据元素的数据位数的整数倍。没有数据元素的数据存储在多个存储单元中或以多于一个单位的时间传输。此外，用于多个数据元素的数据被连续地封装在存储单元中或跨越总线的宽度。

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