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1. 发明授权

US09921873B2 Controlling work distribution for processing tasks 有权
公开(公告)号：US09921873B2
公开(公告)日：2018-03-20
申请号：US13363350
申请日：2012-01-31
申请人： Lacky V. Shah , Karim M. Abdalla , Sean J. Treichler , Abraham B. de Waal
发明人： Lacky V. Shah , Karim M. Abdalla , Sean J. Treichler , Abraham B. de Waal
IPC分类号： G06F9/46 , G06F9/44 , G06F9/48 , G06F9/50
CPC分类号： G06F9/4881 , G06F9/4806 , G06F9/5011
摘要： A technique for controlling the distribution of compute task processing in a multi-threaded system encodes each processing task as task metadata (TMD) stored in memory. The TMD includes work distribution parameters specifying how the processing task should be distributed for processing. Scheduling circuitry selects a task for execution when entries of a work queue for the task have been written. The work distribution parameters may define a number of work queue entries needed before a cooperative thread array” (“CTA”) may be launched to process the work queue entries according to the compute task. The work distribution parameters may define a number of CTAs that are launched to process the same work queue entries. Finally, the work distribution parameters may define a step size that is used to update pointers to the work queue entries.

2. 发明授权

US09507638B2 Compute work distribution reference counters 有权
标题翻译：计算工作分配参考计数器
公开(公告)号：US09507638B2
公开(公告)日：2016-11-29
申请号：US13291369
申请日：2011-11-08
申请人： Philip Alexander Cuadra , Karim M. Abdalla , Jerome F. Duluk, Jr. , Luke Durant , Gerald F. Luiz , Timothy John Purcell , Lacky V. Shah
发明人： Philip Alexander Cuadra , Karim M. Abdalla , Jerome F. Duluk, Jr. , Luke Durant , Gerald F. Luiz , Timothy John Purcell , Lacky V. Shah
IPC分类号： G06F9/455 , G06F9/50
CPC分类号： G06F9/5022
摘要： One embodiment of the present invention sets forth a technique for managing the allocation and release of resources during multi-threaded program execution. Programmable reference counters are initialized to values that limit the amount of resources for allocation to tasks that share the same reference counter. Resource parameters are specified for each task to define the amount of resources allocated for consumption by each array of execution threads that is launched to execute the task. The resource parameters also specify the behavior of the array for acquiring and releasing resources. Finally, during execution of each thread in the array, an exit instruction may be configured to override the release of the resources that were allocated to the array. The resources may then be retained for use by a child task that is generated during execution of a thread.
摘要翻译：本发明的一个实施例提出了一种用于在多线程程序执行期间管理资源的分配和释放的技术。可编程参考计数器被初始化为限制用于分配给共享相同引用计数器的任务的资源量的值。为每个任务指定资源参数，以定义为执行任务启动的每个执行线程数组分配的消耗资源量。资源参数还指定数组用于获取和释放资源的行为。最后，在执行阵列中的每个线程时，可以将退出指令配置为覆盖分配给阵列的资源的释放。然后可以保留资源以供执行线程期间生成的子任务使用。

3. 发明授权

US08917271B2 Redistribution of generated geometric primitives 有权
标题翻译：生成的几何图元的再分配
公开(公告)号：US08917271B2
公开(公告)日：2014-12-23
申请号：US12897578
申请日：2010-10-04
申请人： Johnny S. Rhoades , Ziyad S. Hakura , Emmett M. Kilgariff , Dale L. Kirkland , Cynthia Ann Edgeworth Allison , Karl M. Wurstner , Karim M. Abdalla
发明人： Johnny S. Rhoades , Ziyad S. Hakura , Emmett M. Kilgariff , Dale L. Kirkland , Cynthia Ann Edgeworth Allison , Karl M. Wurstner , Karim M. Abdalla
IPC分类号： G06T15/50 , G06T17/20 , G06T15/00
CPC分类号： G06T15/005 , G06T17/20 , G06T2210/52
摘要： One embodiment of the present invention sets forth a technique for redistributing geometric primitives generated by tessellation and geometry shaders for per-vertex by multiple graphics pipelines. Geometric primitives that are generated in a first processing stage are collected and redistributed more evenly and in smaller batches to the multiple graphics pipelines for vertex processing in a second processing stage. The smaller batches do not exceed the resource limits of a graphics pipeline and the per-vertex processing workloads of the graphics pipelines in the second stage are balanced. Therefore, the performance of the tessellation and geometry shaders is improved.
摘要翻译：本发明的一个实施例提出了一种用于通过多个图形管线重新分配由每个顶点由镶嵌和几何着色器生成的几何图元的技术。在第一处理阶段中生成的几何图元在第二处理阶段被收集并且更均匀地并且以较小批次重新分布到多个图形流水线进行顶点处理。较小的批次不超过图形管道的资源限制，并且第二阶段中图形管道的每顶点处理工作负载平衡。因此，纹理和几何着色器的性能得到改善。

4. 发明申请

US20130198759A1 CONTROLLING WORK DISTRIBUTION FOR PROCESSING TASKS 有权
标题翻译：控制工作分配处理任务
公开(公告)号：US20130198759A1
公开(公告)日：2013-08-01
申请号：US13363350
申请日：2012-01-31
申请人： Lacky V. SHAH , Karim M. ABDALLA , Sean J. TREICHLER , Abraham B. DE WAAL
发明人： Lacky V. SHAH , Karim M. ABDALLA , Sean J. TREICHLER , Abraham B. DE WAAL
IPC分类号： G06F9/46
CPC分类号： G06F9/4881 , G06F9/4806 , G06F9/5011
摘要： A technique for controlling the distribution of compute task processing in a multi-threaded system encodes each processing task as task metadata (TMD) stored in memory. The TMD includes work distribution parameters specifying how the processing task should be distributed for processing. Scheduling circuitry selects a task for execution when entries of a work queue for the task have been written. The work distribution parameters may define a number of work queue entries needed before a cooperative thread array” (“CTA”) may be launched to process the work queue entries according to the compute task. The work distribution parameters may define a number of CTAS that are launched to process the same work queue entries. Finally, the work distribution parameters may define a step size that is used to update pointers to the work queue entries.
摘要翻译：用于控制多线程系统中的计算任务处理的分布的技术将每个处理任务编码为存储在存储器中的任务元数据（TMD）。 TMD包括指定如何分配处理任务以进行处理的工作分配参数。调度电路在写入任务的工作队列的条目时选择执行任务。工作分配参数可以定义在协作线程数组“（”CTA“）可以根据计算任务发起处理工作队列条目之前所需的工作队列条目数，工作分配参数可以定义多个CTAS，被启动以处理相同的工作队列条目。最后，工作分配参数可以定义用于更新指向工作队列条目的指针的步长。

5. 发明申请

US20110080404A1 Redistribution Of Generated Geometric Primitives 有权
标题翻译：生成的几何基元的再分配
公开(公告)号：US20110080404A1
公开(公告)日：2011-04-07
申请号：US12897578
申请日：2010-10-04
申请人： Johnny S. RHOADES , Ziyad S. Hakura , Emmett M. Kilgariff , Dale L. Kirkland , Cynthia Ann Edgeworth Allison , Karl M. Wurstner , Karim M. Abdalla
发明人： Johnny S. RHOADES , Ziyad S. Hakura , Emmett M. Kilgariff , Dale L. Kirkland , Cynthia Ann Edgeworth Allison , Karl M. Wurstner , Karim M. Abdalla
IPC分类号： G06T17/20
CPC分类号： G06T15/005 , G06T17/20 , G06T2210/52
摘要： One embodiment of the present invention sets forth a technique for redistributing geometric primitives generated by tessellation and geometry shaders for per-vertex by multiple graphics pipelines. Geometric primitives that are generated in a first processing stage are collected and redistributed more evenly and in smaller batches to the multiple graphics pipelines for vertex processing in a second processing stage. The smaller batches do not exceed the resource limits of a graphics pipeline and the per-vertex processing workloads of the graphics pipelines in the second stage are balanced. Therefore, the performance of the tessellation and geometry shaders is improved.
摘要翻译：本发明的一个实施例提出了一种用于通过多个图形管线重新分配由每个顶点由镶嵌和几何着色器生成的几何图元的技术。在第一处理阶段中生成的几何图元在第二处理阶段被收集并且更均匀地并且以较小批次重新分布到多个图形流水线进行顶点处理。较小的批次不超过图形管道的资源限制，并且第二阶段中图形管道的每顶点处理工作负载平衡。因此，纹理和几何着色器的性能得到改善。

6. 发明授权

US09710306B2 Methods and apparatus for auto-throttling encapsulated compute tasks 有权
公开(公告)号：US09710306B2
公开(公告)日：2017-07-18
申请号：US13442730
申请日：2012-04-09
申请人： Jerome F. Duluk, Jr. , Jesse David Hall , Philip Alexander Cuadra , Karim M. Abdalla
发明人： Jerome F. Duluk, Jr. , Jesse David Hall , Philip Alexander Cuadra , Karim M. Abdalla
IPC分类号： G06F9/46 , G06F9/48 , G06F9/50
CPC分类号： G06F9/4881 , G06F9/5016 , G06F2209/483
摘要： Systems and methods for auto-throttling encapsulated compute tasks. A device driver may configure a parallel processor to execute compute tasks in a number of discrete throttled modes. The device driver may also allocate memory to a plurality of different processing units in a non-throttled mode. The device driver may also allocate memory to a subset of the plurality of processing units in each of the throttling modes. Data structures defined for each task include a flag that instructs the processing unit whether the task may be executed in the non-throttled mode or in the throttled mode. A work distribution unit monitors each of the tasks scheduled to run on the plurality of processing units and determines whether the processor should be configured to run in the throttled mode or in the non-throttled mode.

7. 发明授权

US08984183B2 Signaling, ordering, and execution of dynamically generated tasks in a processing system 有权
标题翻译：在处理系统中信令，排序和执行动态生成的任务
公开(公告)号：US08984183B2
公开(公告)日：2015-03-17
申请号：US13329169
申请日：2011-12-16
申请人： Timothy John Purcell , Lacky V. Shah , Jerome F. Duluk, Jr. , Sean J. Treichler , Karim M. Abdalla , Philip Alexander Cuadra , Brian Pharris
发明人： Timothy John Purcell , Lacky V. Shah , Jerome F. Duluk, Jr. , Sean J. Treichler , Karim M. Abdalla , Philip Alexander Cuadra , Brian Pharris
IPC分类号： G06F3/00 , G06F9/46 , G06F9/48
CPC分类号： G06F9/4843
摘要： One embodiment of the present invention sets forth a technique for enabling the insertion of generated tasks into a scheduling pipeline of a multiple processor system allows a compute task that is being executed to dynamically generate a dynamic task and notify a scheduling unit of the multiple processor system without intervention by a CPU. A reflected notification signal is generated in response to a write request when data for the dynamic task is written to a queue. Additional reflected notification signals are generated for other events that occur during execution of a compute task, e.g., to invalidate cache entries storing data for the compute task and to enable scheduling of another compute task.
摘要翻译：本发明的一个实施例提出了一种用于使所生成的任务能够插入到多处理器系统的调度流水线中的技术，允许正在执行的计算任务动态生成动态任务并通知多处理器系统的调度单元没有CPU的干预。当将动态任务的数据写入队列时，响应于写入请求产生反映的通知信号。为在执行计算任务期间发生的其他事件生成附加的反映的通知信号，例如，使存储用于计算任务的数据的高速缓存条目无效并启用其他计算任务的调度。

8. 发明申请

US20130268942A1 METHODS AND APPARATUS FOR AUTO-THROTTLING ENCAPSULATED COMPUTE TASKS 有权
标题翻译：用于自动曲轴加密计算机任务的方法和装置
公开(公告)号：US20130268942A1
公开(公告)日：2013-10-10
申请号：US13442730
申请日：2012-04-09
申请人： Jerome F. DULUK, JR. , Jesse David Hall , Philip Alexander Cuadra , Karim M. Abdalla
发明人： Jerome F. DULUK, JR. , Jesse David Hall , Philip Alexander Cuadra , Karim M. Abdalla
IPC分类号： G06F9/46
CPC分类号： G06F9/4881 , G06F9/5016 , G06F2209/483
摘要： Systems and methods for auto-throttling encapsulated compute tasks. A device driver may configure a parallel processor to execute compute tasks in a number of discrete throttled modes. The device driver may also allocate memory to a plurality of different processing units in a non-throttled mode. The device driver may also allocate memory to a subset of the plurality of processing units in each of the throttling modes. Data structures defined for each task include a flag that instructs the processing unit whether the task may be executed in the non-throttled mode or in the throttled mode. A work distribution unit monitors each of the tasks scheduled to run on the plurality of processing units and determines whether the processor should be configured to run in the throttled mode or in the non-throttled mode.
摘要翻译：自动调节封装计算任务的系统和方法。设备驱动器可以配置并行处理器来执行多个离散节流模式中的计算任务。设备驱动器还可以以非节流模式将存储器分配给多个不同的处理单元。在每个节流模式中，设备驱动器还可以向多个处理单元的子集分配存储器。为每个任务定义的数据结构包括一个标志，指示处理单元是否可以在非节流模式或节流模式下执行任务。工作分配单元监视计划在多个处理单元上运行的任务，并且确定处理器是否应被配置为以节流模式或非节流模式运行。

9. 发明申请

US20130185728A1 SCHEDULING AND EXECUTION OF COMPUTE TASKS 有权
标题翻译：计划任务的安排和执行
公开(公告)号：US20130185728A1
公开(公告)日：2013-07-18
申请号：US13353150
申请日：2012-01-18
申请人： Karim M. Abdalla , Lacky V. Shah , Jerome F. Duluk, JR. , Timothy John Purcell , Tanmoy Mandal , Gentaro Hirota
发明人： Karim M. Abdalla , Lacky V. Shah , Jerome F. Duluk, JR. , Timothy John Purcell , Tanmoy Mandal , Gentaro Hirota
IPC分类号： G06F9/46
CPC分类号： G06F9/4881 , G06F9/4806 , G06F9/50 , G06F2209/483
摘要： One embodiment of the present invention sets forth a technique for assigning a compute task to a first processor included in a plurality of processors. The technique involves analyzing each compute task in a plurality of compute tasks to identify one or more compute tasks that are eligible for assignment to the first processor, where each compute task is listed in a first table and is associated with a priority value and an allocation order that indicates relative time at which the compute task was added to the first table. The technique further involves selecting a first task compute from the identified one or more compute tasks based on at least one of the priority value and the allocation order, and assigning the first compute task to the first processor for execution.
摘要翻译：本发明的一个实施例提出了一种用于将计算任务分配给包括在多个处理器中的第一处理器的技术。该技术涉及分析多个计算任务中的每个计算任务以识别符合分配给第一处理器的一个或多个计算任务，其中每个计算任务在第一表中列出并且与优先级值和分配指示将计算任务添加到第一个表的相对时间的顺序。该技术还包括基于优先级值和分配顺序中的至少一个从所识别的一个或多个计算任务中选择第一任务计算，以及将第一计算任务分配给第一处理器以供执行。

10. 发明申请

US20130185725A1 SCHEDULING AND EXECUTION OF COMPUTE TASKS 有权
标题翻译：计划任务的安排和执行
公开(公告)号：US20130185725A1
公开(公告)日：2013-07-18
申请号：US13353155
申请日：2012-01-18
申请人： Karim M. ABDALLA , Lacky V. Shah , Jerome F. Duluk, JR. , Timothy John Purcell , Tanmoy Mandal , Gentaro Hirota
发明人： Karim M. ABDALLA , Lacky V. Shah , Jerome F. Duluk, JR. , Timothy John Purcell , Tanmoy Mandal , Gentaro Hirota
IPC分类号： G06F9/46
CPC分类号： G06F9/505 , G06F2209/503
摘要： One embodiment of the present invention sets forth a technique for selecting a first processor included in a plurality of processors to receive work related to a compute task. The technique involves analyzing state data of each processor in the plurality of processors to identify one or more processors that have already been assigned one compute task and are eligible to receive work related to the one compute task, receiving, from each of the one or more processors identified as eligible, an availability value that indicates the capacity of the processor to receive new work, selecting a first processor to receive work related to the one compute task based on the availability values received from the one or more processors, and issuing, to the first processor via a cooperative thread array (CTA), the work related to the one compute task.
摘要翻译：本发明的一个实施例提出了一种用于选择包括在多个处理器中的第一处理器以接收与计算任务相关的工作的技术。该技术涉及分析多个处理器中的每个处理器的状态数据，以识别已经被分配了一个计算任务并且有资格接收与一个计算任务有关的工作的一个或多个处理器，从一个或多个处理器被识别为合格的处理器，指示处理器接收新工作的容量的可用性值，基于从一个或多个处理器接收的可用性值，选择第一处理器以接收与一个计算任务相关的工作，并发布到通过协作线程数组（CTA）的第一个处理器，与一个计算任务相关的工作。

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