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1. 发明授权

US07342463B2 Timer circuits and method 有权
标题翻译：定时器电路及方法
公开(公告)号：US07342463B2
公开(公告)日：2008-03-11
申请号：US11280516
申请日：2005-11-15
申请人： A. Paul Brokaw , Yuxin Li
发明人： A. Paul Brokaw , Yuxin Li
IPC分类号： H03K3/26
CPC分类号： H03K3/011 , H03K3/354 , H03K3/355
摘要： A timing circuit operates by applying an arbitrary voltage across a resistance, and using the resulting current to generate a charging current which charges and/or discharges a capacitance to an endpoint voltage. Additional circuitry is arranged such that the capacitance is charged and/or discharged until its voltage crosses a threshold which is proportional to one of the resistance's endpoint voltages, such that the capacitance's endpoint voltage tracks the resistance's endpoint voltage. Thus, the resistor voltage can vary with supply voltage or temperature, or the resistance value itself can vary, without materially affecting the timing relationships. The arbitrary voltage is preferably provided with a pair of diode-connected transistors connected in series with the resistance, so that a single transistor operated at the same current density as one of the diode-connected transistors establishes the threshold voltage and detects when the capacitor voltage reaches the threshold.
摘要翻译：定时电路通过在电阻上施加任意电压来工作，并且使用所得到的电流来产生将电容充电和/或放电到端点电压的充电电流。附加电路被布置成使得电容被充电和/或放电，直到其电压跨过与电阻的端点电压之一成比例的阈值，使得电容的端点电压跟踪电阻的端点电压。因此，电阻电压可以随电源电压或温度而变化，或者电阻值本身可以变化，而不会严重影响时序关系。任意电压优选地设置有与电阻串联连接的一对二极管连接的晶体管，使得以与二极管连接的晶体管中的一个相同的电流密度工作的单个晶体管建立阈值电压并且检测何时电容器电压达到门槛。

2. 发明授权

US08269478B2 Two-terminal voltage regulator with current-balancing current mirror 有权
标题翻译：两端稳压器，带电流平衡电流镜
公开(公告)号：US08269478B2
公开(公告)日：2012-09-18
申请号：US12157472
申请日：2008-06-10
申请人： Hio Leong Chao , A. Paul Brokaw
发明人： Hio Leong Chao , A. Paul Brokaw
IPC分类号： G05F3/16
CPC分类号： G05F3/30
摘要： A voltage regulator comprises first and second bipolar transistors operating at different current densities; a resistor is connected between their bases across which ΔVBE appears. A third bipolar transistor is connected such that the voltages at the bases of the first and third transistors are equal or differ by a PTAT amount. A current mirror is arranged to balance the collector current of one of the second and third transistors with an image of the collector current of the first transistor when the output node is at a unique operating point. The operating point includes both PTAT and CTAT components, the ratio of which can be established such that the operating point has a desired temperature characteristic. A transistor connected to the output node and driven by the output of the current mirror regulates the output voltage by negative feedback.
摘要翻译：电压调节器包括以不同电流密度工作的第一和第二双极晶体管; 一个电阻连接在它们的基极之间，并显示出Dgr; VBE。连接第三双极晶体管，使得第一和第三晶体管的基极处的电压等于或相差PTAT量。电流镜被布置成当输出节点处于唯一的工作点时，平衡第二和第三晶体管之一的集电极电流与第一晶体管的集电极电流的图像。操作点包括PTAT和CTAT组件，其比例可以被建立，使得工作点具有期望的温度特性。连接到输出节点并由电流镜的输出驱动的晶体管通过负反馈来调节输出电压。

3. 发明授权

US07847634B2 Error amplifier structures 有权
标题翻译：误差放大器结构
公开(公告)号：US07847634B2
公开(公告)日：2010-12-07
申请号：US12321708
申请日：2009-01-22
申请人： Jeffrey G. Barrow , A. Paul Brokaw
发明人： Jeffrey G. Barrow , A. Paul Brokaw
IPC分类号： H03F3/45
CPC分类号： H03F3/45475 , H03F3/347
摘要： Error amplifier structures are provided to generate an error signal in response to the difference between an input signal (e.g., a feedback current) and a reference signal (e.g., a bias current). Amplifier embodiments generally include a reference generator and a differencing amplifier. In at least one embodiment, the error generator is arranged to generate first and second bias voltages that correspond to the bias current. In at least one embodiment, the differencing amplifier is configured to provide a reference current to an output node in response to the first bias voltage, provide a feedback current to the output node in response to the second bias voltage, and generate an error current in response to a voltage at the output node. The error amplifier structures are suited for use in various systems such as negative switching regulators.
摘要翻译：提供误差放大器结构以响应于输入信号（例如，反馈电流）和参考信号（例如，偏置电流）之间的差异来产生误差信号。放大器实施例通常包括参考发生器和差分放大器。在至少一个实施例中，误差发生器被布置成产生对应于偏置电流的第一和第二偏置电压。在至少一个实施例中，差分放大器被配置为响应于第一偏置电压向输出节点提供参考电流，响应于第二偏置电压向输出节点提供反馈电流，并且产生误差电流响应于输出节点处的电压。误差放大器结构适用于各种系统，如负开关稳压器。

4. 发明授权

US07646243B2 Controlled transconductance differential stage 有权
标题翻译：控制跨导差分级
公开(公告)号：US07646243B2
公开(公告)日：2010-01-12
申请号：US12220430
申请日：2008-07-23
申请人： A. Paul Brokaw
发明人： A. Paul Brokaw
IPC分类号： H03F3/45
CPC分类号： H03F3/45179 , H03F2203/45288 , H03F2203/45292 , H03F2203/45352 , H03F2203/45366 , H03F2203/45374
摘要： A differential stage which uses a bias generator circuit to set the operating currents of the input stage FETs to make the incremental Gm primarily a function of a single resistor embedded in the biasing circuit, such that the input stage has a Gm which only gradually departs from nominal under overdrive, and continues to supply output currents which increase with an increasing differential input signal.
摘要翻译：差分级，其使用偏置发生器电路来设置输入级FET的工作电流，以使增量Gm主要是嵌入在偏置电路中的单个电阻器的功能，使得输入级具有仅逐渐离开的Gm 标称值在过驱动下，并继续提供随着差分输入信号增加而增加的输出电流。

5. 发明授权

US07495426B2 Temperature setpoint circuit with hysteresis 有权
标题翻译：带迟滞的温度设定电路
公开(公告)号：US07495426B2
公开(公告)日：2009-02-24
申请号：US11370155
申请日：2006-03-06
申请人： Chau C. Tran , A. Paul Brokaw
发明人： Chau C. Tran , A. Paul Brokaw
IPC分类号： G05F3/16
CPC分类号： G05D23/1904 , Y10S323/907
摘要： A temperature setpoint circuit comprises bipolar transistors Q1 and Q2 which receive currents I1 and I2 at their respective collectors and are operated at unequal current densities, with a resistance R1 connected between their bases such that the difference in their base-emitter voltages (ΔVbe) appears across R1. An additional PTAT current I3 is maintained in a constant ratio to I1 and I2 and provided to the collector of Q2 while Q2 is off, and is not provided while Q2 is on. The circuit is arranged such that Q2 is turned on and conducts a current equal to Ia when:ΔVbe=(kT/q)ln(NI1/Ia), where Ia=I2+I3, the temperature T at which ΔVbe=(kT/q)ln(NI1/Ia) being the circuit's setpoint temperature, such that the switching of current I3 provides hysteresis for the setpoint temperature which is approximately constant over temperature.
摘要翻译：温度设定点电路包括双极晶体管Q1和Q2，其双极晶体管Q1和Q2在其各自的集电极处接收电流I1和I2并以不相等的电流密度工作，电阻R1连接在它们的基极之间，使得其基极 - 发射极电压（DeltaVbe）的差异出现跨越R1。额定的PTAT电流I3以与I1和I2恒定的比例保持，并且在Q2关闭时提供给Q2的集电极，并且在Q2导通时不提供。电路被布置为使得当ΔVbe=（kT / q）ln（NI1 / Ia）时，Q2导通并导通等于Ia的电流，其中Ia = I2 + I3，DeltaVbe =（kT / q）ln（NI1 / Ia）是电路的设定点温度，使得电流I3的切换为温度近似恒定的设定点温度提供滞后。

6. 发明申请

US20080237630A1 Semiconductor switch 有权
标题翻译：半导体开关
公开(公告)号：US20080237630A1
公开(公告)日：2008-10-02
申请号：US12079841
申请日：2008-03-27
申请人： Jeffrey G. Barrow , Javier A. Salcedo , A. Paul Brokaw
发明人： Jeffrey G. Barrow , Javier A. Salcedo , A. Paul Brokaw
IPC分类号： H01L29/745
CPC分类号： H01L29/745 , H01L29/7408 , H01L29/7455
摘要： A semiconductor switch comprises a PNPN structure arranged to provide an SCR-like functionality, and a MOS gate structure, preferably integrated on a common substrate. The switch includes ohmic contacts for the MOS gate, and for the cathode and gate regions of the PNPN structure; the anode contact is intrinsic. A fixed voltage is typically applied to an external node. The MOS gate structure allows current to be conducted between the external node and the intrinsic anode when on, and the PNPN structure conducts the current from the anode to the cathode when an appropriate voltage is applied to the gate contact. Regenerative feedback keeps the switch on once it begins to conduct. The MOS gate inhibits the flow of current between the external node and anode—and thereby turns off the switch—when off. When on, the MOS gate's channel resistance serves as a ballast resistor.
摘要翻译：半导体开关包括被布置为提供类SCR功能的PNPN结构，以及优选地集成在公共基板上的MOS栅极结构。该开关包括用于MOS栅极的欧姆接触，以及用于PNPN结构的阴极和栅极区域; 阳极接触是固有的。固定电压通常被施加到外部节点。 MOS栅极结构允许在导通时在外部节点和本征阳极之间传导电流，并且当适当的电压施加到栅极触点时，PNPN结构将电流从阳极传导到阴极。再生反馈一旦开始进行就保持开关状态。 MOS门禁止外部节点和阳极之间的电流流动，从而在关闭时关闭开关。当导通时，MOS栅极的沟道电阻用作镇流电阻。

7. 发明授权

US07170334B2 Switched current temperature sensing circuit and method to correct errors due to beta and series resistance 有权
标题翻译：开关电流温度检测电路和纠正β和串联电阻误差的方法
公开(公告)号：US07170334B2
公开(公告)日：2007-01-30
申请号：US11170970
申请日：2005-06-29
申请人： Evaldo M. Miranda , A. Paul Brokaw
发明人： Evaldo M. Miranda , A. Paul Brokaw
IPC分类号： H01L35/00
CPC分类号： G01K7/01
摘要： A switched current temperature sensing circuit comprises a BJT arranged to conduct a forced emitter current IE of the form Ifixed+(Ifixed/β), such that the base current is given by Ifixed/β and the collector current is given by Ifixed+(Ifixed/β)−(Ifixed/β)=Ifixed. Base current Ifixed/β is mirrored to the emitter, and a current source provides current Ifixed, which is switched between at least a first value I and a second value N*I such that the BJT's base-emitter voltage has a first value Vbe1 when Ifixed=I and a second value Vbe2 when Ifixed=N*I, such that: ΔVbe12=Vbe1−Vbe2=(nFkT/q)(ln N), where nF is the BJT's emission coefficient, k is Boltzmann's constant, T is absolute temperature, and q is the electron charge.
摘要翻译：开关电流温度检测电路包括布置成传导形式为固定的固体的强制发射极电流I B的BJT（固定的/ ），使得基极电流由I固定 /β给出，并且集电极电流由I固定） - （I <固定 /β）= I固定。基极电流I <固定 /β被镜像到发射极，并且电流源提供电流I <固定，其在至少第一值I和第二值N之间切换 * I，使得当I固定 = I时，BJT的基极 - 发射极电压具有第一值V sub1n1，并且当I _{固定 = N * I，使得：<？in-line-formula description =“In-line Formulas”end =“lead”？> DeltaV = （ln N），<？in-line-formula description =“In-line-formula” 公式“end =”tail“？>其中n 是BJT的发射系数，k是玻耳兹曼常数，T是绝对温度，q是电子电荷。}

8. 发明授权

US07161432B2 Current mirror with low headroom requirement 有权
标题翻译：电流镜具有较低的净空要求
公开(公告)号：US07161432B2
公开(公告)日：2007-01-09
申请号：US11108990
申请日：2005-04-18
申请人： A. Paul Brokaw
发明人： A. Paul Brokaw
IPC分类号： H03F3/04
CPC分类号： G05F3/262 , H03F1/22 , H03F1/223 , H03F1/30 , H03F1/301 , H03F1/302 , H03F3/04 , H03F3/45475 , H03F2203/45676
摘要： A current mirror circuit includes a current input node for receiving an input current, an upper, cascoded current mirror, a lower current mirror, and a biasing means. In a FET implementation, the upper mirror includes first and second cascoded FETs which are connected together at the current input node, and third and fourth cascoded FETs connected to mirror the current conducted by the first and second FETs. The lower current mirror receives the mirrored current and mirrors it back to the upper mirror, thereby providing positive feedback. The net loop gain is between zero and one. When so arranged, the third and fourth FETs conduct a current which is proportional to an applied input current. The upper mirror transistors are biased such that the voltage at the current input node is substantially closer to the supply voltage than the voltages at the gates of the first and third FETs.
摘要翻译：电流镜电路包括用于接收输入电流的电流输入节点，上级并联电流镜，下电流镜和偏置装置。在FET实现中，上反射镜包括在电流输入节点处连接在一起的第一和第二并联FET，以及连接到第一和第二FET所传导的电流的第三和第四级联的FET。下电流镜接收镜像电流并将其反射回上镜，从而提供正反馈。净环路增益在零和一之间。当这样布置时，第三和第四FET导通与施加的输入电流成比例的电流。上反射镜晶体管被偏置，使得电流输入节点处的电压基本上比第一和第三FET的栅极处的电压更接近电源电压。

9. 发明授权

US06956727B1 High side current monitor with extended voltage range 有权
标题翻译：高边电流监视器具有扩展的电压范围
公开(公告)号：US06956727B1
公开(公告)日：2005-10-18
申请号：US10762647
申请日：2004-01-21
申请人： A. Paul Brokaw
发明人： A. Paul Brokaw
IPC分类号： G01R1/20 , G01R19/00 , H02H3/08
CPC分类号： G01R19/0023 , G01R1/203 , G01R19/0092
摘要： A high side current monitor circuit includes an op amp which is coupled across a sensing element which carries a current Isense and develops a shunt voltage Vsense. A feedback transistor driven by the op amp output conducts an output current Iout through a resistor to a current output node necessary to make the op amp inputs equal, such that Iout is proportional to Isense. Iout is conducted through a resistor to generate a ground-referred voltage proportional to Vsense. When the common mode voltage of Vsense is greater than the op amp's breakdown voltage, a discrete transistor is connected between the current output node and ground to stand off the voltage across the amp. The monitor circuit is arranged such that it can be powered with a limited fraction of the common mode voltage when used with a discrete transistor, and is self-biased when used without a discrete transistor.
摘要翻译：高边电流监视电路包括一个运算放大器，该运算放大器耦合在传感元件上，该感测元件承载电流检测信号，并产生分流电压V sense。由运算放大器输出驱动的反馈晶体管通过电阻将输出电流I OUT输出到使运算放大器输入相等所必需的电流输出节点，使得I OUT输出< 与I 成正比。 I 通过电阻器传导以产生与V 成比例的接地参考电压。当V 的共模电压大于运算放大器的击穿电压时，分立晶体管连接在电流输出节点和地之间，以抵消放大器两端的电压。监视器电路被布置成当与分立晶体管一起使用时可以以共模电压的有限部分供电，并且当不使用分立晶体管时使用自偏置。

10. 发明授权

US06225857B1 Non-inverting driver circuit for low-dropout voltage regulator 有权
标题翻译：用于低压差稳压器的同相驱动电路
公开(公告)号：US06225857B1
公开(公告)日：2001-05-01
申请号：US09499706
申请日：2000-02-08
申请人： A. Paul Brokaw
发明人： A. Paul Brokaw
IPC分类号： G05F110
CPC分类号： G05F1/575
摘要： A non-inverting driver circuit for an LDO pass device employs a level-shifting inverter stage followed by a normalizing inverter stage. The level-shifting stage converts the output common-referenced output of the error amplifier to a current, which is provided to the normalizing inverter. The normalizing stage is referred to the LDO input voltage, enabling its output signal to remain largely invariant with respect to changes in input voltage. The driver is preferably configured to have a low output impedance, so that when driving the high gate capacitance of a MOS pass device, the resulting pole is moved to a higher frequency than would be possible with a non-inverting driver having a high output impedance. With the driver being non-inverting and the low frequency pole moved higher, frequency compensating the regulator is simplified.
摘要翻译：用于LDO通过器件的非反相驱动器电路采用电平转换逆变器级，随后是归一化的反相器级。电平移位级将误差放大器的输出公共参考输出转换为提供给归一化反相器的电流。归一化阶段称为LDO输入电压，使得其输出信号相对于输入电压的变化保持很大的不变。驱动器优选地被配置为具有低输出阻抗，使得当驱动MOS通过器件的高栅极电容时，所得到的极移动到比具有高输出阻抗的非反相驱动器可能的频率更高的频率。随着驱动器是同相和低频极点移动得更高，频率补偿调节器被简化。

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