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    • 3. 发明申请
    • Timer circuits and method
    • 定时器电路及方法
    • US20070109062A1
    • 2007-05-17
    • US11280516
    • 2005-11-15
    • A. BrokawYuxin Li
    • A. BrokawYuxin Li
    • H03K3/26
    • H03K3/011H03K3/354H03K3/355
    • A timing circuit operates by applying an arbitrary voltage across a resistance, and using the resulting current to generate a charging current which charges and/or discharges a capacitance to an endpoint voltage. Additional circuitry is arranged such that the capacitance is charged and/or discharged until its voltage crosses a threshold which is proportional to one of the resistance's endpoint voltages, such that the capacitance's endpoint voltage tracks the resistance's endpoint voltage. Thus, the resistor voltage can vary with supply voltage or temperature, or the resistance value itself can vary, without materially affecting the timing relationships. The arbitrary voltage is preferably provided with a pair of diode-connected transistors connected in series with the resistance, so that a single transistor operated at the same current density as one of the diode-connected transistors establishes the threshold voltage and detects when the capacitor voltage reaches the threshold.
    • 定时电路通过在电阻上施加任意电压来工作,并且使用所得到的电流来产生将电容充电和/或放电到端点电压的充电电流。 附加电路被布置成使得电容被充电和/或放电,直到其电压跨过与电阻的端点电压之一成比例的阈值,使得电容的端点电压跟踪电阻的端点电压。 因此,电阻电压可以随电源电压或温度而变化,或者电阻值本身可以变化,而不会严重影响时序关系。 任意电压优选地设置有与电阻串联连接的一对二极管连接的晶体管,使得以与二极管连接的晶体管中的一个相同的电流密度工作的单个晶体管建立阈值电压并且检测何时电容器电压 达到门槛。
    • 4. 发明申请
    • SWITCHED NOISE FILTER CIRCUIT FOR A DC-DC CONVERTER
    • 用于DC-DC转换器的开关噪声滤波电路
    • US20050156582A1
    • 2005-07-21
    • US10762650
    • 2004-01-21
    • Richard RedlYuxin LiGabor Reizik
    • Richard RedlYuxin LiGabor Reizik
    • H02M3/156G05F1/40
    • H02M3/156H02M1/44
    • A switched noise filter circuit for DC-DC converters which use the instantaneous output voltage to establish the converter's duty ratio. The converter cycles the switching element on and off for time intervals Ton and Toff, respectively. A switching control circuit includes a filter capacitance connected between the feedback node and ground, and a comparator which compares a feedback voltage Vfb with a fixed voltage Vref; at least one of Ton and Toff is a “modulated” interval which is terminated when Vfb crosses Vref due to the discharge of the filter capacitance. A switched noise filter circuit applies an offset voltage to Vfb during at least one of Ton and Toff, with the offset voltage disconnected from Vfb by the beginning of the modulated interval or shortly thereafter. When the offset voltage is properly applied, the effect of extraneous electromagnetic noise coupled into Vfb is reduced.
    • 用于DC-DC转换器的开关噪声滤波器电路,其使用瞬时输出电压来建立转换器的占空比。 转换器分别对开关元件的开/关时间间隔T<和<<<>分开。 开关控制电路包括连接在反馈节点和地之间的滤波电容,以及比较器,其将反馈电压V bias与固定电压V ref进行比较; 在T< / SUB>和T< off>之间的至少一个是“调制的”间隔,当V SUB>由于滤波电容的放电。 开关噪声滤波器电路在至少一个T< / SUB>和T>关闭之间向偏移电压施加偏移电压,其中偏移电压从 在调制间隔开始之后或不久之后, 当适当地施加偏移电压时,耦合到V 的外部电磁噪声的影响减小。
    • 6. 发明申请
    • ARCHITECTURE TO FACILITATE REUSE IN MULTIPLE APPLICATIONS
    • 建立多种应用程序中的重用
    • US20120210096A1
    • 2012-08-16
    • US13024474
    • 2011-02-10
    • Yuxin LiMartin J. Kulas
    • Yuxin LiMartin J. Kulas
    • G06F12/06
    • G06F13/1663
    • A method includes generating, from a representation of a first integrated circuit, a representation of a second integrated circuit. The representation of the first integrated circuit includes a plurality of representations of operative memory channel interfaces including a representation of a first operative memory channel physical interface. The representation of the second integrated circuit includes a representation of a pseudo-memory channel physical interface and at least a representation of a second operative memory channel physical interface. The generating includes replacing an instantiation of a first circuit of the representation of the first operative memory channel physical interface with an instantiation of a second circuit. The instantiation of the second circuit is a representation of a circuit that is logically equivalent to a first circuit represented by the instantiation of the first circuit.
    • 一种方法包括从第一集成电路的表示生成第二集成电路的表示。 第一集成电路的表示包括多个操作存储器通道接口的表示,包括第一操作存储器通道物理接口的表示。 第二集成电路的表示包括伪存储器通道物理接口的表示和至少第二操作存储器通道物理接口的表示。 该生成包括用第二电路的实例替换第一操作存储器通道物理接口的表示的第一电路的实例化。 第二电路的实例是在逻辑上等同于由第一电路的实例表示的第一电路的电路的表示。