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1. 发明专利

KR20210027785A KR20210027785A - Electronic device for measuring bio-signals 审中-公开
公开(公告)号：KR20210027785A
公开(公告)日：2021-03-11
申请号：KR1020190108649A
申请日：2019-09-03
申请人： 삼성전자주식회사
发明人： 이진철 , 남민혁 , 이영욱 , 송형일 , 최춘식 , 김승년 , 윤용상
IPC分类号： A61B5/28 , A61B5/00
CPC分类号： A61B5/259 , A61B5/25 , A61B5/333 , A61B5/339 , A61B5/68 , A61B2560/0443 , A61B2562/16
摘要： 다양한 실시 예에 따르면, 사용자의 신체에 적어도 일부가 부착되어 사용자의 생체 신호를 획득하는 패드 모듈, 및 패드 모듈을 통해 전달되는 사용자의 생체 신호를 기록하는 메인 모듈을 포함하고, 패드 모듈은, 복수의 제1 전극부, 및 제1 하우징을 포함하며, 메인 모듈은, 복수의 제2 전극부, 제2 하우징, 및 복수의 자성체를 포함하는 생체 신호 측정용 전자 장치가 개시된다. 이 외에도 명세서를 통해 파악되는 다양한 실시 예가 가능하다.

2. 发明公开

KR1020080047166A 박막 트랜지스터 기판의 제조 방법 无效
标题翻译：制造薄膜晶体管基板的方法
公开(公告)号：KR1020080047166A
公开(公告)日：2008-05-28
申请号：KR1020060117183
申请日：2006-11-24
申请人： 삼성전자주식회사
发明人： 이우근 , 이영욱
IPC分类号： H01L29/786
CPC分类号： H01L27/1288 , G02F1/136286
摘要： A method for fabricating a TFT substrate is provided to increase the aperture ratio of an LCD by decreasing the area occupied by a thin film transistor. A semiconductor layer(40) and a data conduction layer(60) are sequentially formed on an insulation substrate(10). A photoresist layer is formed on the data conduction layer. A part of the photoresist layer corresponding to a channel part of the semiconductor layer is removed in a thickness direction to form a photoresist layer pattern(100). The photoresist layer pattern is etched back by using oxygen plasma(110). The data conduction layer is etched to form a data interconnection by using the photoresist layer pattern as an etch mask.
摘要翻译：提供一种用于制造TFT基板的方法，通过减小薄膜晶体管占据的面积来增加LCD的开口率。半导体层（40）和数据传导层（60）依次形成在绝缘基板（10）上。在数据传导层上形成光致抗蚀剂层。对应于半导体层的通道部分的光致抗蚀剂层的一部分在厚度方向上去除以形成光致抗蚀剂层图案（100）。通过使用氧等离子体（110）来蚀刻光致抗蚀剂层图案。通过使用光致抗蚀剂层图案作为蚀刻掩模来蚀刻数据传导层以形成数据互连。

3. 发明公开

KR1020080043097A 표시 장치 无效
标题翻译：显示设备
公开(公告)号：KR1020080043097A
公开(公告)日：2008-05-16
申请号：KR1020060111707
申请日：2006-11-13
申请人： 삼성전자주식회사
发明人： 이영욱 , 이우근 , 전경숙 , 차연희 , 김종인
IPC分类号： G02F1/133 , G09G3/36 , G09G3/20 , G02F1/1343
CPC分类号： G02F1/136286 , G02F1/13306 , H01L27/124 , H01L29/41733
摘要： A display device is provided to restrain kickback effect even if a mask is misaligned and to thereby improve the display quality. A display device includes a plurality of gate lines(22), a plurality of data lines(42), a plurality of thin film transistors, a plurality of pixel electrodes(72), a plurality of dummy gate lines(26), and a compensation capacitor. The gate lines receive gate on/off voltage. The data lines are insulated from the gate lines. Each of the thin film transistors includes a gate electrode(24) connected to a corresponding gate line, a drain electrode(45) connected to a corresponding data line, and a source electrode(62) formed apart from the drain electrode. The pixel electrodes are connected to the source electrodes, respectively. The dummy gate lines receive kickback compensation voltage having a phase opposite to the gate on/off voltage. The compensation capacitor includes a dummy gate electrode connected to a dummy gate lines and a dummy source electrode(64) insulated from the dummy gate electrode and connected to a corresponding pixel electrode.
摘要翻译：提供一种显示装置，以便即使掩模未对准来抑制反冲效果，从而提高显示质量。显示装置包括多个栅极线（22），多个数据线（42），多个薄膜晶体管，多个像素电极（72），多个虚拟栅极线（26）和补偿电容器。栅极线接收栅极导通/截止电压。数据线与栅极线绝缘。每个薄膜晶体管包括连接到对应的栅极线的栅电极（24），连接到对应数据线的漏电极（45）和与漏电极分开形成的源电极（62）。像素电极分别连接到源电极。虚拟栅极线接收具有与栅极导通/截止电压相反的相位的反冲补偿电压。补偿电容器包括连接到虚拟栅极线的伪栅电极和与虚拟栅电极绝缘并连接到相应的像素电极的虚拟源电极（64）。

4. 发明公开

KR1020060131018A 박막 트랜지스터 표시판, 그 제조 방법 및 이를 포함하는액정 표시 장치 无效
标题翻译：薄膜晶体管阵列，其制造方法和包括其的液晶显示器
公开(公告)号：KR1020060131018A
公开(公告)日：2006-12-20
申请号：KR1020050050842
申请日：2005-06-14
申请人： 삼성전자주식회사
发明人： 이영욱 , 김시열 , 김성진
IPC分类号： G02F1/136
CPC分类号： G02F1/136286 , G02F2001/136231 , G02F2001/13625 , G02F2001/136295
摘要： A thin film transistor substrate, a method for manufacturing the same, and an LCD comprising the same are provided to widen the viewing angle and lower the driving voltage, by disposing a pixel electrode to overlap a common electrode above a substrate. A gate line having a gate electrode(124) is formed on a substrate(110), wherein the gate line is composed of three conductive layers. A common electrode(131) of a transparent conductor is formed on the substrate. A gate insulating layer(140) is formed on the gate line and the common electrode. A semiconductor layer(151) is formed on the gate insulating layer. A data line(161) having a source electrode(163) and a drain electrode facing the source electrode are formed on the semiconductor layer. A plurality of pixel electrodes(191) are connected to the drain electrode and overlap the common electrode. In the gate line, a first conductive layer is formed of the same material as the common electrode, a second conductive layer is formed of a fire-resistant metal material, and a third conductive layer is formed of aluminum.
摘要翻译：提供薄膜晶体管基板及其制造方法以及包括该薄膜晶体管的薄膜晶体管基板的LCD以及包含该薄膜晶体管基板的液晶显示器，通过设置与基板上方的公共电极重叠的像素电极来扩大视角并降低驱动电压。具有栅极（124）的栅极线形成在基板（110）上，其中栅极线由三个导电层构成。在基板上形成透明导体的公共电极（131）。栅极绝缘层（140）形成在栅极线和公共电极上。在栅极绝缘层上形成半导体层（151）。在半导体层上形成具有源电极（163）和面对源电极的漏电极的数据线（161）。多个像素电极（191）连接到漏电极并与公共电极重叠。在栅极线中，第一导电层由与公共电极相同的材料形成，第二导电层由耐火金属材料形成，第三导电层由铝形成。

5. 发明公开

KR1020060123997A 박막 트랜지스터 표시판, 그 제조 방법 및 이를 포함하는액정 표시 장치 无效
标题翻译：薄膜晶体管阵列，其制造方法和包括其的液晶显示器
公开(公告)号：KR1020060123997A
公开(公告)日：2006-12-05
申请号：KR1020050045686
申请日：2005-05-30
申请人： 삼성전자주식회사
发明人： 이영욱 , 김시열 , 김성진
IPC分类号： G02F1/136
CPC分类号： G02F1/1362 , G02F1/136286 , G02F2001/136231 , G02F2201/12
摘要： A thin film transistor substrate, a method for manufacturing the same, and an LCD comprising the same are provided to reduce the number of manufacturing processes, by forming a semiconductor pattern, an ohmic contact pattern, and a data line using a single slit mask. A gate line having a gate electrode(124) is formed on a substrate(110). A common electrode(131) of a transparent conductor is formed on the substrate. A gate insulating layer(140), a semiconductor layer(150), and a conductive layer(170) are sequentially deposited on the gate line and the common electrode. The conductive layer and the semiconductor layer are etched to form a data line having a source electrode, a drain electrode facing the source electrode, and a semiconductor pattern below the data line and the drain electrode. A pixel electrode, which is connected to the drain electrode, is formed. The pixel electrode overlaps a portion of the common electrode.
摘要翻译：提供薄膜晶体管基板及其制造方法以及包括该薄膜晶体管基板的LCD，通过使用单个狭缝掩模形成半导体图案，欧姆接触图案和数据线来减少制造工艺的数量。具有栅极（124）的栅极线形成在基板（110）上。在基板上形成透明导体的公共电极（131）。栅极绝缘层（140），半导体层（150）和导电层（170）依次淀积在栅极线和公共电极上。蚀刻导电层和半导体层以形成具有源电极，面对源电极的漏电极和数据线和漏电极下方的半导体图案的数据线。形成与漏电极连接的像素电极。像素电极与公共电极的一部分重叠。

6. 发明公开

KR1020060031386A 플라스마 식각 장치 无效
标题翻译：等离子体蚀刻装置
公开(公告)号：KR1020060031386A
公开(公告)日：2006-04-12
申请号：KR1020040080394
申请日：2004-10-08
申请人： 삼성전자주식회사
发明人： 이영욱 , 오민석 , 최희환 , 김상갑
IPC分类号： H01L21/3065 , C23F4/00
CPC分类号： H01L21/67069 , H01J37/32568
摘要： 본 발명에 따른 플라즈마 식각 장치는 챔버, 챔버의 상부에 부착되어 있는 상부 전극, 상부 전극과 대향하며 절연되어 있는 복수개의 소전극으로 이루어지는 하부 전극, 상, 하부 전극에 전압을 인가하기 위한 전력 발생부, 챔버에 식각 기체를 주입하는 유입부, 챔버에 식각 기체를 배기하는 배기부를 포함하고, 이웃하는 소전극의 가장자리는 절연체를 사이에 두고 중첩한다.
건식식각, 균일성, 플라스마, 전극

7. 发明公开

KR1020090080286A 기판의 평탄화 방법, 어레이 기판 및 이 평탄화 방법을이용한 어레이 기판의 제조 방법 无效
标题翻译：方法平面化基板，阵列基板和使用该方法制造阵列基板的方法
公开(公告)号：KR1020090080286A
公开(公告)日：2009-07-24
申请号：KR1020080006160
申请日：2008-01-21
申请人： 삼성전자주식회사
发明人： 박정민 , 정두희 , 이희국 , 이영욱
IPC分类号： H01L29/786 , H01L21/304
CPC分类号： H01L21/2686 , H01L21/31058 , H01L27/1248 , H01L29/78636 , H01L27/1214
摘要： A method for planarizing a substrate, an array substrate, and a method for manufacturing the same array substrate using a planarization method are provided to prevent a tangling effect of a succeeding layer formed on a metal electrode at a lateral surface of a metal line and a stepped part of a base substrate. An organic layer is formed to cover a metal line(12) which is formed on a base substrate(11). The organic layer is removed to expose the metal line. An auxiliary planarization layer is formed to planarize a surface of the base substrate including the metal line. A curing process is performed to cure the auxiliary planarization layer in order to shift the auxiliary planarization layer facing a lateral surface of the metal line to a lateral surface of the metal line. A planarization layer(13c) is formed by attaching the auxiliary planarization layer on the lateral surface of the metal line.
摘要翻译：提供一种平面化基板，阵列基板和使用平面化方法制造相同阵列基板的方法的方法，以防止在金属线的侧表面上形成在金属电极上的后续层的缠结效应和台阶部分基底。形成有机层以覆盖形成在基底基板（11）上的金属线（12）。去除有机层以露出金属线。形成辅助平坦化层以使包括金属线的基底基板的表面平坦化。执行固化处理以固化辅助平坦化层，以将面向金属线的侧表面的辅助平坦化层移动到金属线的侧表面。通过在金属线的侧面上附着辅助平坦化层来形成平坦化层（13c）。

8. 发明公开

KR1020080030877A 액정표시장치 无效
标题翻译：液晶显示装置
公开(公告)号：KR1020080030877A
公开(公告)日：2008-04-07
申请号：KR1020060097421
申请日：2006-10-02
申请人： 삼성전자주식회사
发明人： 이영욱 , 이우근 , 조의식 , 차연희
IPC分类号： G02F1/1343
CPC分类号： G02F1/1362 , G02F1/136286 , G02F1/1368 , G02F2001/136218 , G02F2001/13629
摘要： An LCD(Liquid Crystal Display) is provided to form a shield electrode and apply a higher voltage than a common voltage to the shield electrode, thereby reducing image sticking. An LCD includes a first substrate(111), a second substrate(211) and a liquid crystal layer(300). The second substrate includes a common electrode(251) to which a common voltage is applied. The liquid crystal layer is interposed between the first and second substrates. The first substrate includes a data line(141), an insulating layer(151) formed on the data line and a shield electrode(165) formed on the insulating layer along the data line. A voltage higher than the common voltage is applied to the shield electrode.
摘要翻译：提供LCD（液晶显示器）以形成屏蔽电极，并向屏蔽电极施加比公共电压更高的电压，从而减少图像残留。 LCD包括第一基板（111），第二基板（211）和液晶层（300）。第二基板包括施加公共电压的公共电极（251）。液晶层介于第一和第二基板之间。第一基板包括数据线（141），形成在数据线上的绝缘层（151）和沿数据线形成在绝缘层上的屏蔽电极（165）。将高于公共电压的电压施加到屏蔽电极。

9. 发明公开

KR1020080004005A 박막 트랜지스터 기판의 제조 방법 无效
标题翻译：薄膜晶体管基板制造方法
公开(公告)号：KR1020080004005A
公开(公告)日：2008-01-09
申请号：KR1020060062424
申请日：2006-07-04
申请人： 삼성전자주식회사
发明人： 이영욱 , 이우근 , 오화열 , 차연희 , 박정인
IPC分类号： G02F1/136
CPC分类号： G02F1/136 , G03F1/144 , H01L27/124 , H01L29/786 , H01L51/56
摘要： A method of fabricating a thin film transistor substrate is provided to reduce a channel length between a source electrode and a drain electrode of a thin film transistor through a single slit mask having a notch. A gate pattern including a gate line and a gate electrode(20) is formed. A gate insulating layer(30), an active layer(40), an ohmic-contact layer(45) and a data metal layer are formed on the gate pattern. A channel of a thin film transistor and a data pattern including a source electrode(60), a drain electrode(70) and a data line(50) are formed at the data metal layer by using a single slit mask including a notch. A passivation layer and a pixel electrode(100) connected with the drain electrode are formed on the data pattern. The forming of the channel of the thin film transistor and the data pattern includes forming photoresist on the data metal layer, exposing the photoresist by using the single slit mask, and etching the data metal layer without a patterned photoresist pattern.
摘要翻译：提供一种制造薄膜晶体管衬底的方法，通过具有缺口的单个狭缝掩模来减小薄膜晶体管的源电极和漏电极之间的沟道长度。形成包括栅极线和栅电极（20）的栅极图案。在栅极图案上形成栅绝缘层（30），有源层（40），欧姆接触层（45）和数据金属层。通过使用包括凹口的单个狭缝掩模，在数据金属层上形成薄膜晶体管的沟道和包括源极（60），漏极（70）和数据线（50）的数据图案。在数据图形上形成钝化层和与漏电极连接的像素电极（100）。薄膜晶体管的通道的形成和数据图形包括在数据金属层上形成光致抗蚀剂，通过使用单个狭缝掩模曝光光致抗蚀剂，并且在没有图案化的光致抗蚀剂图案的情况下蚀刻数据金属层。

10. 发明公开

KR1020070063969A 박막 트랜지스터 표시판 및 그 제조 방법 无效
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：KR1020070063969A
公开(公告)日：2007-06-20
申请号：KR1020050124428
申请日：2005-12-16
申请人： 삼성전자주식회사
发明人： 이영욱
IPC分类号： G02F1/136
CPC分类号： G02F1/134309 , G02F2001/134381 , G02F2201/128
摘要： A thin film transistor substrate and a method for manufacturing the same are provided to prevent the disconnection of a data line, increase the aperture ratio of a pixel region, and realize low voltage driving. A gate line having a gate electrode(124) is formed on a substrate. A gate insulating layer is formed on the gate line. A data line(171) crosses the gate line. A drain electrode(175) is separated from the data line. A pixel electrode(191) is disposed on the gate insulating layer, and electrically connected to the drain electrode. A passivation layer is formed on the pixel electrode. Common electrodes(131) are formed on the passivation layer correspondingly to the pixel electrode. The common electrodes are formed of a transparent conductor. The common electrodes form electric field with the pixel electrode.
摘要翻译：提供薄膜晶体管基板及其制造方法，以防止数据线断开，增加像素区域的开口率，实现低电压驱动。具有栅极（124）的栅极线形成在基板上。在栅极线上形成栅极绝缘层。数据线（171）越过栅极线。漏电极（175）与数据线分离。像素电极（191）设置在栅极绝缘层上，并与漏电极电连接。在像素电极上形成钝化层。公共电极（131）对应于像素电极形成在钝化层上。公共电极由透明导体形成。公共电极与像素电极形成电场。

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