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1. 发明授权

US08912070B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08912070B2
公开(公告)日：2014-12-16
申请号：US13812500
申请日：2012-10-12
申请人： Xiaolong Ma , Huaxiang Yin , Zuozhen Fu
发明人： Xiaolong Ma , Huaxiang Yin , Zuozhen Fu
IPC分类号： H01L27/108
CPC分类号： H01L29/78 , H01L21/26506 , H01L29/0895 , H01L29/161 , H01L29/165 , H01L29/41783 , H01L29/456 , H01L29/66356 , H01L29/66477 , H01L29/66659 , H01L29/7391 , H01L29/7835 , H01L29/7848
摘要： The present invention discloses a method for manufacturing a semiconductor device, comprising: forming a gate stack structure on a substrate; forming a drain region in the substrate on one side of the gate stack structure; and forming a source region made of GeSn in the substrate on the other side of the gate stack structure; wherein the forming the source region made of GeSn comprises: implanting precursors in the substrate on the other side of the gate stack structure; and performing a laser rapid annealing such that the precursors react to produce GeSn alloy, thereby to constitute a source region; and wherein the step of implanting precursors further comprises: performing a pre-amorphization ion implantation, so as to form an amorphized region in the substrate; and implanting Sn in the amorphized region.
摘要翻译：本发明公开了一种制造半导体器件的方法，包括：在衬底上形成栅叠层结构; 在所述栅极堆叠结构的一侧上的所述衬底中形成漏区; 以及在所述栅堆叠结构的另一侧的所述衬底中形成由GeSn制成的源区; 其中形成由GeSn制成的源极区域包括：在所述栅极堆叠结构的另一侧上的衬底中注入前体; 并进行激光快速退火，使得前体反应生成GeSn合金，从而构成源极区; 并且其中植入前体的步骤还包括：进行前非晶化离子注入，以在所述基底中形成非晶化区域; 并将Sn注入到非晶化区域中。

2. 发明授权

US08889519B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08889519B2
公开(公告)日：2014-11-18
申请号：US13812499
申请日：2012-10-12
申请人： Xiaolong Ma , Huaxiang Yin , Zuozhen Fu
发明人： Xiaolong Ma , Huaxiang Yin , Zuozhen Fu
IPC分类号： H01L21/336 , H01L29/66 , H01L29/78 , H01L29/161 , H01L21/02 , H01L21/265 , H01L29/10 , H01L29/165 , H01L21/268 , H01L29/51
CPC分类号： H01L29/66477 , H01L21/02381 , H01L21/0245 , H01L21/02452 , H01L21/02532 , H01L21/02535 , H01L21/02675 , H01L21/26506 , H01L21/268 , H01L29/1054 , H01L29/161 , H01L29/165 , H01L29/517 , H01L29/665 , H01L29/66575 , H01L29/66651 , H01L29/66659 , H01L29/78 , H01L29/7848
摘要： The present invention discloses a semiconductor device, comprising: a substrate, a gate stack structure on the substrate, source and drain regions in the substrate on both sides of the gate stack structure, and a channel region between the source and drain regions in the substrate, characterized in that at least one of the source and drain regions comprises a GeSn alloy. In accordance with the semiconductor device and method for manufacturing the same of the present invention, GeSn stressed source and drain regions with high concentration of Sn is formed by implanting precursors and performing a laser rapid annealing, thus the device carrier mobility of the channel region is effectively enhanced and the device drive capability is further improved.
摘要翻译：本发明公开了一种半导体器件，包括：衬底，衬底上的栅极堆叠结构，栅极堆叠结构两侧的衬底中的源极和漏极区域以及衬底中的源极和漏极区域之间的沟道区域其特征在于源区和漏区中的至少一个包括GeSn合金。根据本发明的半导体器件及其制造方法，通过注入前体并进行激光快速退火形成GeSn应力的高浓度Sn的源区和漏极区，因此沟道区的器件载流子迁移率为有效提高了设备驱动能力。

3. 发明申请

US20130241004A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20130241004A1
公开(公告)日：2013-09-19
申请号：US13520618
申请日：2012-04-11
申请人： Huaxiang Yin , Zuozhen Fu , Qiuxia Xu , Chao Zhao , Dapeng Chen
发明人： Huaxiang Yin , Zuozhen Fu , Qiuxia Xu , Chao Zhao , Dapeng Chen
IPC分类号： H01L27/088 , H01L21/8236
CPC分类号： H01L21/823807 , H01L21/823842 , H01L29/4966 , H01L29/517 , H01L29/518 , H01L29/66545 , H01L29/7845
摘要： The present invention discloses a semiconductor device, comprising substrates, a plurality of gate stack structures on the substrate, a plurality of gate spacer structures on both sides of each gate stack structure, a plurality of source and drain regions in the substrate on both sides of each gate spacer structure, the plurality of gate spacer structures comprising a plurality of first gate stack structures and a plurality of second gate stack structures, wherein each of the first gate stack structures comprises a first gate insulating layer, a first work function metal layer, a second work function metal diffusion blocking layer, and a gate filling layer; Each of the second gate stack structures comprises a second gate insulating layer, a first work function metal layer, a second work function metal layer, and a gate filling layer, characterized in that the first work function metal layer has a first stress, and the gate filling layer has a second stress. Two metal gate layers of different types and/or intensity of stress are formed, respectively, thus different stresses are applied to the channel regions of different MOSFETs effectively and accurately, the device carrier mobility is enhanced simply and efficiently, and the device performance is also enhanced.
摘要翻译：本发明公开了一种半导体器件，包括衬底，衬底上的多个栅极堆叠结构，在每个栅极堆叠结构的两侧上的多个栅极间隔结构，在衬底的两侧的多个源极和漏极区域每个栅极间隔结构，所述多个栅极间隔结构包括多个第一栅极堆叠结构和多个第二栅极堆叠结构，其中所述第一栅极堆叠结构中的每一个包括第一栅极绝缘层，第一功函数金属层，第二功函数金属扩散阻挡层和栅极填充层; 每个第二栅极堆叠结构包括第二栅极绝缘层，第一功函数金属层，第二功函数金属层和栅极填充层，其特征在于，第一功函数金属层具有第一应力，并且栅极填充层具有第二应力。形成不同类型和/或应力强度的两个金属栅极层，从而有效且准确地对不同MOSFET的沟道区域施加不同的应力，简单高效地提高器件载流子迁移率，器件性能也是增强。

4. 发明授权

US09384986B2 Dual-metal gate CMOS devices and method for manufacturing the same 有权
标题翻译：双金属栅极CMOS器件及其制造方法
公开(公告)号：US09384986B2
公开(公告)日：2016-07-05
申请号：US14396845
申请日：2012-05-17
申请人： Huaxiang Yin , Zuozhen Fu , Qiuxia Xu , Dapeng Chen
发明人： Huaxiang Yin , Zuozhen Fu , Qiuxia Xu , Dapeng Chen
IPC分类号： H01L21/28 , H01L29/66 , H01L21/8238 , H01L21/8234 , H01L27/092 , H01L29/51
CPC分类号： H01L21/28088 , H01L21/28 , H01L21/28008 , H01L21/28026 , H01L21/28044 , H01L21/28079 , H01L21/82345 , H01L21/823842 , H01L27/092 , H01L27/0928 , H01L29/517 , H01L29/66515 , H01L29/66545
摘要： A method for manufacturing a dual metal CMOS device comprising: forming a first type metal work function modulation layer in the first gate trench and the second gate trench; forming a second type work function metal diffusion source layer in the first gate trench and the second gate trench; forming a heat isolation layer that shields the region of the first type device; and thermally annealing the regions where the first type device and the second type device are located.
摘要翻译：一种用于制造双金属CMOS器件的方法，包括：在所述第一栅极沟槽和所述第二栅极沟槽中形成第一类型金属功函数调制层; 在所述第一栅极沟槽和所述第二栅极沟槽中形成第二类型功函数金属扩散源层; 形成屏蔽所述第一类型装置的区域的热隔离层; 并对第一类型器件和第二类型器件所在的区域进行热退火。

5. 发明申请

US20140057418A1 METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20140057418A1
公开(公告)日：2014-02-27
申请号：US13812502
申请日：2012-10-12
申请人： Xiaolong Ma , Huaxiang Yin , Zuozhen Fu
发明人： Xiaolong Ma , Huaxiang Yin , Zuozhen Fu
IPC分类号： H01L21/02 , H01L29/12
CPC分类号： H01L21/0257 , H01L21/0237 , H01L21/0245 , H01L21/02452 , H01L21/02521 , H01L21/02532 , H01L21/02535 , H01L21/02612 , H01L21/02614 , H01L21/02617 , H01L21/02639 , H01L21/268 , H01L29/1054 , H01L29/12
摘要： The present invention discloses a method for manufacturing a high mobility material layer, comprising: forming a plurality of precursors in/on a substrate; and performing a pulse laser processing such that the plurality of precursors react with each other to produce a high mobility material layer. Furthermore, the present invention also provides a method for manufacturing a semiconductor device, comprising: forming a buffer layer on an insulating substrate; forming a first high mobility material layer on the buffer layer using the method for manufacturing the high mobility material layer; forming a second high mobility material layer on the first high mobility material layer using the method for manufacturing the high mobility material layer; and forming trench isolations and defining active regions in the first and second high mobility material layers.
摘要翻译：本发明公开了一种高迁移率材料层的制造方法，其特征在于，包括：在基板内/内形成多个前体; 并进行脉冲激光处理使得多个前体彼此反应以产生高迁移率材料层。此外，本发明还提供一种半导体器件的制造方法，包括：在绝缘基板上形成缓冲层; 使用高迁移率材料层的制造方法在缓冲层上形成第一高迁移率材料层; 使用所述高迁移率材料层的制造方法在所述第一高迁移率材料层上形成第二高迁移率材料层; 以及形成沟槽隔离并在第一和第二高迁移率材料层中限定有源区。

6. 发明申请

US20140048765A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20140048765A1
公开(公告)日：2014-02-20
申请号：US13812500
申请日：2012-10-12
申请人： Xiaolong Ma , Huaxiang Yin , Zuozhen Fu
发明人： Xiaolong Ma , Huaxiang Yin , Zuozhen Fu
IPC分类号： H01L29/78 , H01L29/66
CPC分类号： H01L29/78 , H01L21/26506 , H01L29/0895 , H01L29/161 , H01L29/165 , H01L29/41783 , H01L29/456 , H01L29/66356 , H01L29/66477 , H01L29/66659 , H01L29/7391 , H01L29/7835 , H01L29/7848
摘要： The present invention discloses a semiconductor device, comprising: a substrate, a gate stack structure on the substrate, source and drain regions in the substrate on both sides of the gate stack structure, and a channel region between the source and drain regions in the substrate, characterized in that the source region in the source and drain regions comprises GeSn alloy, and a tunnel dielectric layer is optionally comprised between the GeSn alloy of the source region and the channel region. In accordance with the semiconductor device and method for manufacturing the same of the present invention, GeSn alloy having a narrow band gap is formed by implanting precursors and performing a laser rapid annealing, the on-state current of TFET is effectively enhanced, accordingly it has an important application prospect in a high performance low power consumption application.
摘要翻译：本发明公开了一种半导体器件，包括：衬底，衬底上的栅极堆叠结构，栅极堆叠结构两侧的衬底中的源极和漏极区域以及衬底中的源极和漏极区域之间的沟道区域其特征在于源极和漏极区中的源极区包括GeSn合金，并且隧道电介质层任选地包含在源极区的GeSn合金和沟道区之间。根据本发明的半导体器件及其制造方法，通过注入前体并进行激光快速退火来形成具有窄带隙的GeSn合金，有效地提高了TFET的通态电流，因此具有在高性能低功耗应用中的重要应用前景。

7. 发明申请

US20140017906A1 METHOD FOR FORMING TIN BY PVD 有权
标题翻译： PVD方法
公开(公告)号：US20140017906A1
公开(公告)日：2014-01-16
申请号：US13695191
申请日：2012-07-26
申请人： Zuozhen Fu , Huaxiang Yin , Jiang Yan
发明人： Zuozhen Fu , Huaxiang Yin , Jiang Yan
IPC分类号： H01L21/02
CPC分类号： H01L21/02186 , C23C14/0641 , C23C14/18 , C23C14/34 , C23C14/54 , H01L21/2855
摘要： A method for forming titanium nitride by PVD is disclosed, comprising: generating ions of a noble gas by glow discharge under a vacuum condition that a nitrogen gas and the noble gas are supplied; nitriding a surface of a wafer and a surface of a titanium target with the nitrogen gas; bombarding the surface of the titanium target with the ions of the noble gas after they are accelerated in an electric field so that titanium ions and titanium nitride are sputtered; and forming a titanium nitride layer by depositing titanium nitride on the surface of the wafer in a magnetic field, while titanium ions are injected into the surface of the wafer so that stress is introduced into the titanium nitride layer, wherein non-crystallization fraction of the titanium nitride layer and stress in the titanium nitride layer are increased by increasing kinetic energy of titanium ions which are injected into the surface of the wafer. In the method for forming titanium nitride by PVD according to the present disclosure, kinetic energy of titanium ions which are injected into the surface of the wafer is increased by controlling process parameters so that non-crystallization fraction of the titanium nitride layer and stress in the titanium nitride layer are increased.
摘要翻译：公开了一种通过PVD形成氮化钛的方法，包括：在供给氮气和惰性气体的真空条件下，通过辉光放电产生惰性气体的离子; 用氮气氮化晶片的表面和钛靶的表面; 在电场加速后，用惰性气体的离子轰击钛靶的表面，从而溅射钛离子和氮化钛; 以及通过在磁场中在晶片的表面上沉积氮化钛而形成氮化钛层，同时将钛离子注入晶片的表面，使得应力被引入到氮化钛层中，其中非晶化部分通过提高注入到晶片表面的钛离子的动能来增加氮化钛层和氮化钛层中的应力。在根据本公开的通过PVD形成氮化钛的方法中，通过控制工艺参数来增加注入晶片表面的钛离子的动能，使得氮化钛层的非结晶部分和应力在氮化钛层增加。

8. 发明申请

US20150102416A1 DUAL-METAL GATE CMOS DEVICES AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：双金属门CMOS器件及其制造方法
公开(公告)号：US20150102416A1
公开(公告)日：2015-04-16
申请号：US14396845
申请日：2012-05-17
申请人： Huaxiang Yin , Zuozhen Fu , Qiuxia Xu , Dapeng Chen
发明人： Huaxiang Yin , Zuozhen Fu , Qiuxia Xu , Dapeng Chen
IPC分类号： H01L21/8234 , H01L29/51 , H01L27/092
CPC分类号： H01L21/28088 , H01L21/28 , H01L21/28008 , H01L21/28026 , H01L21/28044 , H01L21/28079 , H01L21/82345 , H01L21/823842 , H01L27/092 , H01L27/0928 , H01L29/517 , H01L29/66515 , H01L29/66545
摘要： A method for manufacturing a dual metal CMOS device comprising: forming a first type metal work function modulation layer in the first gate trench and the second gate trench; forming a second type work function metal diffusion source layer in the first gate trench and the second gate trench; forming a heat isolation layer that shields the region of the first type device; and thermally annealing the regions where the first type device and the second type device are located.
摘要翻译：一种用于制造双金属CMOS器件的方法，包括：在所述第一栅极沟槽和所述第二栅极沟槽中形成第一类型金属功函数调制层; 在所述第一栅极沟槽和所述第二栅极沟槽中形成第二类型功函数金属扩散源层; 形成屏蔽所述第一类型装置的区域的热隔离层; 并对第一类型器件和第二类型器件所在的区域进行热退火。

9. 发明授权

US08994119B2 Semiconductor device with gate stacks having stress and method of manufacturing the same 有权
标题翻译：具有应力的栅极堆叠的半导体器件及其制造方法
公开(公告)号：US08994119B2
公开(公告)日：2015-03-31
申请号：US13520618
申请日：2012-04-11
申请人： Huaxiang Yin , Zuozhen Fu , Qiuxia Xu , Chao Zhao , Dapeng Chen
发明人： Huaxiang Yin , Zuozhen Fu , Qiuxia Xu , Chao Zhao , Dapeng Chen
IPC分类号： H01L27/088 , H01L21/8236 , H01L21/8238 , H01L29/49 , H01L29/78 , H01L29/51 , H01L29/66
CPC分类号： H01L21/823807 , H01L21/823842 , H01L29/4966 , H01L29/517 , H01L29/518 , H01L29/66545 , H01L29/7845
摘要： The present invention discloses a semiconductor device, comprising substrates, a plurality of gate stack structures on the substrate, a plurality of gate spacer structures on both sides of each gate stack structure, a plurality of source and drain regions in the substrate on both sides of each gate spacer structure, the plurality of gate spacer structures comprising a plurality of first gate stack structures and a plurality of second gate stack structures, wherein each of the first gate stack structures comprises a first gate insulating layer, a first work function metal layer, a second work function metal diffusion blocking layer, and a gate filling layer; Each of the second gate stack structures comprises a second gate insulating layer, a first work function metal layer, a second work function metal layer, and a gate filling layer, characterized in that the first work function metal layer has a first stress, and the gate filling layer has a second stress. Two metal gate layers of different types and/or intensity of stress are formed, respectively, thus different stresses are applied to the channel regions of different MOSFETs effectively and accurately, the device carrier mobility is enhanced simply and efficiently, and the device performance is also enhanced.
摘要翻译：本发明公开了一种半导体器件，包括衬底，衬底上的多个栅极堆叠结构，在每个栅极堆叠结构的两侧上的多个栅极间隔结构，在衬底的两侧的多个源极和漏极区域每个栅极间隔结构，所述多个栅极间隔结构包括多个第一栅极堆叠结构和多个第二栅极堆叠结构，其中所述第一栅极堆叠结构中的每一个包括第一栅极绝缘层，第一功函数金属层，第二功函数金属扩散阻挡层和栅极填充层; 每个第二栅极堆叠结构包括第二栅极绝缘层，第一功函数金属层，第二功函数金属层和栅极填充层，其特征在于，第一功函数金属层具有第一应力，并且栅极填充层具有第二应力。形成不同类型和/或应力强度的两个金属栅极层，从而有效且准确地对不同MOSFET的沟道区域施加不同的应力，简化高效地提高器件载流子迁移率，器件性能也增强。

10. 发明授权

US08802578B2 Method for forming tin by PVD 有权
标题翻译：用PVD形成锡的方法
公开(公告)号：US08802578B2
公开(公告)日：2014-08-12
申请号：US13695191
申请日：2012-07-26
申请人： Zuozhen Fu , Huaxiang Yin , Jiang Yan
发明人： Zuozhen Fu , Huaxiang Yin , Jiang Yan
IPC分类号： H01L21/203 , H01L21/02 , C23C14/34 , C23C14/54 , C23C14/06 , C23C14/18
CPC分类号： H01L21/02186 , C23C14/0641 , C23C14/18 , C23C14/34 , C23C14/54 , H01L21/2855
摘要： A method for forming titanium nitride by PVD is disclosed, comprising: generating ions of a noble gas by glow discharge under a vacuum condition that a nitrogen gas and the noble gas are supplied; nitriding a surface of a wafer and a surface of a titanium target with the nitrogen gas; bombarding the surface of the titanium target with the ions of the noble gas after they are accelerated in an electric field so that titanium ions and titanium nitride are sputtered; and forming a titanium nitride layer by depositing titanium nitride on the surface of the wafer in a magnetic field, while titanium ions are injected into the surface of the wafer so that stress is introduced into the titanium nitride layer, wherein non-crystallization fraction of the titanium nitride layer and stress in the titanium nitride layer are increased by increasing kinetic energy of titanium ions which are injected into the surface of the wafer. In the method for forming titanium nitride by PVD according to the present disclosure, kinetic energy of titanium ions which are injected into the surface of the wafer is increased by controlling process parameters so that non-crystallization fraction of the titanium nitride layer and stress in the titanium nitride layer are increased.
摘要翻译：公开了一种通过PVD形成氮化钛的方法，包括：在供给氮气和惰性气体的真空条件下通过辉光放电产生惰性气体的离子; 用氮气氮化晶片的表面和钛靶的表面; 在惰性气体的离子在电场中加速之后，用钛离子轰击钛靶的表面，从而溅射钛离子和氮化钛; 以及通过在磁场表面上沉积氮化钛而形成氮化钛层，同时将钛离子注入到晶片的表面中，使得应力被引入到氮化钛层中，其中非晶化部分通过提高注入到晶片表面的钛离子的动能来增加氮化钛层和氮化钛层中的应力。在根据本公开的通过PVD形成氮化钛的方法中，通过控制工艺参数来增加注入晶片表面的钛离子的动能，使得氮化钛层的非结晶部分和应力在氮化钛层增加。

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