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    • 2. 发明申请
    • Method for manufacturing vertical structure light emitting diode
    • 垂直结构发光二极管的制造方法
    • US20070099317A1
    • 2007-05-03
    • US11522407
    • 2006-09-18
    • Yung RyuHae Hwang
    • Yung RyuHae Hwang
    • H01L21/00
    • H01L33/0079H01L33/62H01L33/64H01L2924/0002H01L2933/0075H01L2924/00
    • A method for manufacturing a vertical light emitting diode of the invention allows an easier process of individually separating chips. A light emitting structure is formed on a growth substrate having a plurality of device areas and at least one device isolation area. The light emitting structure has an n-type clad layer, an active layer and a p-type clad layer sequentially formed therein. Corresponding p-type electrodes are formed on the light emitting structure on the device areas. A glass substrate having through holes perforated therein is provided on the p-electrodes so that the through holes are disposed corresponding to the p-electrodes. Also, the through holes are plated with a metal material to form patterns of a plating layer on the p-electrodes. Then, the growth substrate is removed to form n-electrodes on the n-type clad layer. The glass substrate is removed via etching.
    • 本发明的垂直发光二极管的制造方法能够容易地分离芯片。 在具有多个器件区域和至少一个器件隔离区域的生长衬底上形成发光结构。 发光结构具有依次形成的n型覆盖层,有源层和p型覆盖层。 相应的p型电极形成在器件区域上的发光结构上。 在p电极上设置有在其上穿孔的玻璃基板,使得贯通孔对应于p电极。 此外,通孔用金属材料镀覆以在p电极上形成电镀层的图案。 然后,去除生长衬底以在n型覆盖层上形成n电极。 通过蚀刻去除玻璃基板。
    • 3. 发明申请
    • Light emitting diode package
    • 发光二极管封装
    • US20070090382A1
    • 2007-04-26
    • US11543232
    • 2006-10-05
    • Yung Ryu
    • Yung Ryu
    • H01L33/00
    • H01L33/486H01L33/505H01L33/52H01L2224/48091H01L2224/48247H01L2224/48465H01L2933/0041H01L2924/00014H01L2924/00
    • A light emitting diode package is provided. A package body has a mounting part surrounded by side walls and lead electrodes on a bottom surface of the mounting part. A light emitting diode chip is mounted on the bottom surface of the mounting part and electrically connected to the lead electrodes. A resin encapsulant is filled in the mounting part to encapsulate the light emitting diode chip. At least one residual resin storage is formed on a top surface of a corresponding one of the side walls to guide and accommodate a residual resin for forming the encapsulant of a preset height. Further, a storing groove is formed on the top surface of the corresponding side wall and a guiding groove is formed to guide the residual resin to the storing groove. This produces the light emitting diode package with uniform color distribution regardless of a liquid resin amount injected.
    • 提供发光二极管封装。 封装体具有由安装部的底面上的侧壁和引线电极包围的安装部。 发光二极管芯片安装在安装部分的底表面上并电连接到引线电极。 树脂密封剂填充在安装部分中以封装发光二极管芯片。 在对应的一个侧壁的顶表面上形成至少一个残留树脂储存器,以引导和容纳用于形成预定高度的密封剂的残留树脂。 此外,在对应的侧壁的顶表面上形成有一个存储槽,并且形成一个引导槽,以将残留的树脂引导到存储槽。 无论注入的液体树脂量如何,都能产生具有均匀颜色分布的发光二极管封装。
    • 4. 发明申请
    • Method for manufacturing vertically structured light emitting diode
    • 制造垂直结构发光二极管的方法
    • US20070077673A1
    • 2007-04-05
    • US11541674
    • 2006-10-03
    • Hae HwangYung RyuDa ShimSe Ahn
    • Hae HwangYung RyuDa ShimSe Ahn
    • H01L21/00
    • H01L33/0079H01L33/62H01L2924/0002H01L2924/00
    • There is provided a method for manufacturing a vertically structured LED capable of performing a chip separation process with ease. In the method, a light-emitting structure is formed on a growth substrate having a plurality of device regions and at least one device isolation region, wherein the light-emitting structure has an n-type clad layer, an active layer and a p-type clad layer which are disposed on the growth substrate in sequence. A p-electrode is formed on the light-emitting structure. Thereafter, a first plating layer is formed on the p-electrode such that it connects the plurality of device isolation regions. A pattern of a second plating layer is formed on the first plating layer of the device region. The growth substrate is removed, and an n-electrode is then formed on the n-type clad layer.
    • 提供了一种制造能够容易地进行芯片分离处理的垂直结构的LED的方法。 在该方法中,在具有多个器件区域和至少一个器件隔离区域的生长衬底上形成发光结构,其中,所述发光结构体具有n型覆盖层,有源层和p- 型覆盖层依次设置在生长基板上。 在发光结构上形成p电极。 此后,在p电极上形成第一镀层,使得它连接多个器件隔离区。 在器件区域的第一镀层上形成第二镀层的图案。 去除生长衬底,然后在n型覆盖层上形成n电极。
    • 7. 发明申请
    • Nitride semiconductor LED improved in lighting efficiency and fabrication method thereof
    • 氮化物半导体LED的照明效率提高和制造方法
    • US20060208264A1
    • 2006-09-21
    • US11439127
    • 2006-05-24
    • Yung RyuKee YangBang OhJin ParkYoung Kim
    • Yung RyuKee YangBang OhJin ParkYoung Kim
    • H01L33/00H01L27/15H01L29/167H01L31/12
    • H01L33/007
    • A nitride semiconductor LED improved in lighting efficiency and a fabrication method thereof, in which an n-doped semiconductor layer is formed on a substrate. An active layer is formed on the n-doped semiconductor layer to expose at least a partial area of the n-doped semiconductor layer. A p-doped semiconductor layer is formed on the active layer. A p+-doped semiconductor layer is formed on the p-doped semiconductor layer. An n+-doped semiconductor layer is formed in at least a partial upper region of the p+-doped semiconductor layer via n-dopant ion implantation. The n+-doped semiconductor layer cooperates with an underlying partial region of the p+-doped semiconductor layer to realize a reverse bias tunneling junction. Also, an upper n-doped semiconductor layer is formed on the n+-doped semiconductor layer to realize lateral current spreading. The invention can improve lighting efficiency by using the reverse bias tunneling junction and/or the lateral current spreading.
    • 提高了照明效率的氮化物半导体LED及其制造方法,其中在衬底上形成n掺杂半导体层。 在n掺杂半导体层上形成有源层,以露出n掺杂半导体层的至少一部分区域。 在有源层上形成p掺杂半导体层。 在p掺杂半导体层上形成p +掺杂的半导体层。 通过n掺杂剂离子注入在p +掺杂的半导体层的至少部分上部区域中形成n +掺杂的半导体层。 n +掺杂的半导体层与p +掺杂的半导体层的下面的部分区域配合以实现反向偏压隧道结。 此外,在n +掺杂的半导体层上形成上部n掺杂半导体层,以实现横向电流扩展。 本发明可以通过使用反向偏置隧道结和/或横向电流扩展来提高照明效率。
    • 8. 发明申请
    • Nitride semiconductor LED improved in lighting efficiency and fabrication method thereof
    • 氮化物半导体LED的照明效率提高和制造方法
    • US20050208686A1
    • 2005-09-22
    • US10875321
    • 2004-06-25
    • Yung RyuKee YangBang OhJin ParkYoung Kim
    • Yung RyuKee YangBang OhJin ParkYoung Kim
    • H01L21/00H01L29/76H01L29/94H01L31/062H01L31/113H01L31/119H01L33/06H01L33/12H01L33/32H01L33/42
    • H01L33/007
    • A nitride semiconductor LED improved in lighting efficiency and a fabrication method thereof, in which an n-doped semiconductor layer is formed on a substrate. An active layer is formed on the n-doped semiconductor layer to expose at least a partial area of the n-doped semiconductor layer. A p-doped semiconductor layer is formed on the active layer. A p+-doped semiconductor layer is formed on the p-doped semiconductor layer. An n+-doped semiconductor layer is formed in at least a partial upper region of the p+-doped semiconductor layer via n-dopant ion implantation. The n+-doped semiconductor layer cooperates with an underlying partial region of the p+-doped semiconductor layer to realize a reverse bias tunneling junction. Also, an upper n-doped semiconductor layer is formed on the n+-doped semiconductor layer to realize lateral current spreading. The invention can improve lighting efficiency by using the reverse bias tunneling junction and/or the lateral current spreading.
    • 提高了照明效率的氮化物半导体LED及其制造方法,其中在衬底上形成n掺杂半导体层。 在n掺杂半导体层上形成有源层,以露出n掺杂半导体层的至少一部分区域。 在有源层上形成p掺杂半导体层。 在p掺杂半导体层上形成p +掺杂的半导体层。 通过n掺杂剂离子注入在p +掺杂的半导体层的至少部分上部区域中形成n +掺杂的半导体层。 n +掺杂的半导体层与p +掺杂的半导体层的下面的部分区域配合以实现反向偏压隧道结。 此外,在n +掺杂的半导体层上形成上部n掺杂半导体层,以实现横向电流扩展。 本发明可以通过使用反向偏置隧道结和/或横向电流扩展来提高照明效率。