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1. 发明授权

US5750436A Thermal processing method and apparatus therefor 失效
公开(公告)号：US5750436A
公开(公告)日：1998-05-12
申请号：US485506
申请日：1995-06-07
申请人： Kenichi Yamaga , Yuichi Mikata , Akihito Yamamoto
发明人： Kenichi Yamaga , Yuichi Mikata , Akihito Yamamoto
IPC分类号： C23C16/34 , C23C16/44 , C23C16/455 , C23C16/54 , C23C16/56 , H01L21/31 , H01L21/316
CPC分类号： C23C16/4409 , C23C16/345 , C23C16/455 , C23C16/54 , C23C16/56
摘要： An Si.sub.3 N.sub.4 layer is formed on a surface of a wafer, which is an object to be processed, at a high temperature of, for example, 780.degree. C., using a vertical thermal processing apparatus having a reaction tube of a double-wall structure comprising an inner tube and an outer tube in which a predetermined reduced-pressure status is maintained within the reaction tube while a reaction gas comprising, for example, SiH.sub.2 Cl.sub.2 and NH.sub.3 is made to flow from an inner side to an outer side of the inner tube by the action of a first gas supply pipe and first exhaust pipe provided in the thermal processing apparatus. Next, the temperature in the interior of the reaction tube is raised to, for example, 1000.degree. C., a reaction gas comprising, for example, H.sub.2 O vapor and HCl is made to flow from the outer side to the inner side of the inner tube by the action of a second gas supply pipe and second exhaust pipe, and an SiO.sub.2 layer is formed by the oxidation of the surface of the Si.sub.3 N.sub.4 layer formed on the surface of the wafer, under normal-pressure conditions. The use of a combined chamber enables the implementation of film formation and either oxidation or diffusion processing without having to remove the object to be processed from the reaction tube, and thus prevents the intrusion of a natural oxide layer or the incorporation of particles into a thin film structure of, for example, SiO.sub.2 and Si.sub.3 N.sub.4 layers used as a multi-layer insulating film for devices such as DRAMs.

2. 发明授权

US5252133A Vertically oriented CVD apparatus including gas inlet tube having gas injection holes 失效
标题翻译：包括具有气体注入孔的气体入口管的垂直取向的CVD装置
公开(公告)号：US5252133A
公开(公告)日：1993-10-12
申请号：US809122
申请日：1991-12-18
申请人： Shinji Miyazaki , Yuichi Mikata , Takahiko Moriya , Reiji Niino , Motohiko Nishimura
发明人： Shinji Miyazaki , Yuichi Mikata , Takahiko Moriya , Reiji Niino , Motohiko Nishimura
IPC分类号： H01L21/31 , C23C16/44 , C23C16/455 , C30B25/14 , H01L21/205 , H01L21/22 , C23C16/00
CPC分类号： C23C16/455 , C23C16/45578 , C30B25/14
摘要： A vertically oriented CVD apparatus comprises a reaction chamber, a boat means vertically placed in the reaction chamber to horizontally support a plurality of semiconductor substrates, and a gas inlet tube including a plurality of gas injection holes along a longitudinal axis thereof and extending along a longitudinal side of the boat means to introduce a reaction gas into the reaction chamber. In the structure, a direction of each of the gas injection holes is set at an angle .theta. with respect to a reference line given by a straight line connecting a center of the gas inlet tube to a center of one of the semiconductor wafers, the angle .theta. being defined by 0.degree.

3. 发明授权

US06383897B2 Apparatus for manufacturing a semiconductor device in a CVD reactive chamber 失效
标题翻译：用于在CVD反应室中制造半导体器件的装置
公开(公告)号：US06383897B2
公开(公告)日：2002-05-07
申请号：US09769473
申请日：2001-01-26
申请人： Yuichi Mikata
发明人： Yuichi Mikata
IPC分类号： H01L2120
CPC分类号： C23C16/4405 , C23C16/44 , C23C16/4412 , H01L21/02532 , H01L21/0262
摘要： In a method of producing a semiconductor apparatus, when a thin film is formed on a semiconductor substrate in the CVD reactive chamber by the CVD method, a remaining region is provided where a gas for film formation remains to a proximity of a surface of the semiconductor substrate, and a CVD thin film is provided on the substrate by decomposing only the gas for film formation existing in the remaining region without supplying an additional gas from the outside of the remaining region to the remaining region. With the method, when the thin film is formed on the substrate by the CVD method, the thin film is efficiently deposited on the substrate in a reactive chamber by efficiently using a reactive gas for film formation introduced into a CVD reactive chamber, to thereby reduce cost of forming the thin film remarkably.
摘要翻译：在制造半导体装置的方法中，当通过CVD方法在CVD反应室中的半导体衬底上形成薄膜时，提供剩余区域，其中用于成膜的气体保持在半导体的表面附近基板和CVD薄膜通过仅分解存在于其余区域中的成膜用气体而不从剩余区域的外部供给另外的气体到其余区域而在基板上设置。利用该方法，当通过CVD方法在基板上形成薄膜时，通过有效地使用引入到CVD反应室中的成膜反应气体将薄膜有效地沉积在反应室中的基板上，从而减少显着地形成薄膜的成本。

4. 发明授权

US06211081B1 Method of manufacturing a semiconductor device in a CVD reactive chamber 失效
标题翻译：在CVD反应室中制造半导体器件的方法
公开(公告)号：US06211081B1
公开(公告)日：2001-04-03
申请号：US08826146
申请日：1997-03-27
申请人： Yuichi Mikata
发明人： Yuichi Mikata
IPC分类号： C23C1644
CPC分类号： C23C16/4405 , C23C16/44 , C23C16/4412 , H01L21/02532 , H01L21/0262
摘要： In a method of producing a semiconductor apparatus, when a thin film is formed on a semiconductor substrate in the CVD reactive chamber by the CVD method, a remaining region is provided where a gas for film formation remains to a proximity of a surface of the semiconductor substrate, and a CVD thin film is provided on the substrate by decomposing only the gas for film formation existing in the remaining region without supplying an additional gas from the outside of the remaining region to the remaining region. With the method, when the thin film is formed on the substrate by the CVD method, the thin film is efficiently deposited on the substrate in a reactive chamber by efficiently using a reactive gas for film formation introduced into a CVD reactive chamber, to thereby reduce cost of forming the thin film remarkably.
摘要翻译：在制造半导体装置的方法中，当通过CVD方法在CVD反应室中的半导体衬底上形成薄膜时，提供剩余区域，其中用于成膜的气体保持在半导体的表面附近基板和CVD薄膜通过仅分解存在于其余区域中的成膜用气体而不从剩余区域的外部供给另外的气体到其余区域而在基板上设置。利用该方法，当通过CVD方法在基板上形成薄膜时，通过有效地使用引入到CVD反应室中的成膜反应气体将薄膜有效地沉积在反应室中的基板上，从而减少显着地形成薄膜的成本。

5. 发明授权

US06188838B1 Apparatus for heat treating a semiconductor wafer to reduce stress 失效
标题翻译：用于热处理半导体晶片以减少应力的装置
公开(公告)号：US06188838B1
公开(公告)日：2001-02-13
申请号：US09240669
申请日：1999-02-02
申请人： Yuichi Mikata , Akihito Yamamoto
发明人： Yuichi Mikata , Akihito Yamamoto
IPC分类号： F26B330
CPC分类号： H01L21/67309 , C30B31/14 , H01L21/67103 , H01L21/68721 , H01L21/68735 , H01L21/68785 , Y10S438/931
摘要： A susceptor in a semiconductor wafer heat treatment apparatus holds a wafer such that the wafer is made flat at a heat treatment temperature. In particular, the susceptor is constituted by an elastic platy member which is convex upward with respect to the direction of the gravity. Therefore, when the wafer is subjected to a high-temperature heat treatment, a crystal defect in the wafer can be suppressed.
摘要翻译：半导体晶片热处理装置中的感受体保持晶片，使得晶片在热处理温度下平坦化。特别地，感受体由相对于重力方向向上凸起的弹性板状构件构成。因此，当对晶片进行高温热处理时，可以抑制晶片中的晶体缺陷。

6. 发明授权

US5484484A Thermal processing method and apparatus therefor 失效
标题翻译：热处理方法及其设备
公开(公告)号：US5484484A
公开(公告)日：1996-01-16
申请号：US269039
申请日：1994-06-30
申请人： Kenichi Yamaga , Yuichi Mikata , Akihito Yamamoto
发明人： Kenichi Yamaga , Yuichi Mikata , Akihito Yamamoto
IPC分类号： C23C16/34 , C23C16/44 , C23C16/455 , C23C16/54 , C23C16/56 , C23C16/00
CPC分类号： C23C16/4409 , C23C16/345 , C23C16/455 , C23C16/54 , C23C16/56
摘要： An Si.sub.3 N.sub.4 layer is formed on a surface of a wafer, which is an object to be processed, at a high temperature of, for example, 780.degree. C., using a vertical thermal processing apparatus having a reaction tube of a double-wall structure comprising an inner tube and an outer tube in which a predetermined reduced-pressure status is maintained within the reaction tube while a reaction gas comprising, for example, SiH.sub.2 Cl.sub.2 and NH.sub.3 is made to flow from an inner side to an outer side of the inner tube by the action of a first gas supply pipe and first exhaust pipe provided in the thermal processing apparatus. Next, the temperature in the interior of the reaction tube is raised to, for example, 1000.degree. C., a reaction gas comprising, for example, H.sub.2 O vapor and HCl is made to flow from the outer side to the inner side of the inner tube by the action of a second gas supply pipe and second exhaust pipe, and an SiO.sub.2 layer is formed by the oxidation of the surface of the Si.sub.3 N.sub.4 layer formed on the surface of the wafer, under normal-pressure conditions. The use of a combined chamber enables the implementation of film formation and either oxidation or diffusion processing without having to remove the object to be processed from the reaction tube, and thus prevents the intrusion of a natural oxide layer or the incorporation of particles into a thin film structure of, for example, SiO.sub.2 and Si.sub.3 N.sub.4 layers used as a multi-layer insulating film for devices such as DRAMs.
摘要翻译：使用具有双壁结构的反应管的垂直热处理装置，在作为被处理物的晶片的表面上，例如在780℃的高温下形成Si 3 N 4层包括内管和外管，其中在反应管内保持预定的减压状态，同时使包括例如SiH 2 Cl 2和NH 3的反应气体从内管的内侧流到外管通过设置在热处理装置中的第一气体供给管和第一排气管的作用。接下来，将反应管内部的温度升高至例如1000℃，由例如H 2 O蒸气和HCl构成的反应气体从内侧的内侧流向内侧通过第二气体供给管和第二排气管的作用，通过在常压条件下氧化形成在晶片表面上的Si 3 N 4层的表面形成SiO 2层。使用组合室能够实现成膜和氧化或扩散处理，而不必从反应管中除去待处理的物体，从而防止天然氧化物层的侵入或将颗粒引入薄的例如用作用于诸如DRAM的器件的多层绝缘膜的SiO 2和Si 3 N 4层的膜结构。

7. 发明授权

US07344805B2 Mask and method for producing thereof and a semiconductor device using the same 失效
标题翻译：掩模及其制造方法和使用其的半导体器件
公开(公告)号：US07344805B2
公开(公告)日：2008-03-18
申请号：US10741932
申请日：2003-12-18
申请人： Hiroshi Kumano , Yuichi Mikata
发明人： Hiroshi Kumano , Yuichi Mikata
IPC分类号： G03F1/00
CPC分类号： G03F1/20 , H01J2237/0453 , H01J2237/31711 , H01J2237/31794
摘要： A mask is provided wherein the mask has: a plate-like member having a mask pattern area and at least one pn junction; and a current supplying area which supplies a current to the pn junction, and a Peltier effect is caused by supplying a current to the pn junction, thereby enabling the temperature of the mask pattern area to be controlled. When this mask is used, reliable formation of an ion implanted region is enabled without forming a resist pattern.
摘要翻译：提供了一种掩模，其中掩模具有：具有掩模图案区域和至少一个pn结的板状部件; 以及向pn结提供电流的电流供给区域，并且通过向pn结提供电流而引起珀尔帖效应，从而能够控制掩模图案区域的温度。当使用该掩模时，无需形成抗蚀剂图案就能够可靠地形成离子注入区域。

8. 发明授权

US5893760A Method of heat treating a semiconductor wafer to reduce stress 失效
标题翻译：对半导体晶片进行热处理以减少应力的方法
公开(公告)号：US5893760A
公开(公告)日：1999-04-13
申请号：US829700
申请日：1997-03-26
申请人： Yuichi Mikata , Akihito Yamamoto
发明人： Yuichi Mikata , Akihito Yamamoto
IPC分类号： H01L21/683 , C30B31/14 , H01L21/00 , H01L21/02 , H01L21/205 , H01L21/22 , H01L21/31 , H01L21/324 , H01L21/673 , H01L21/687 , H01L41/08
CPC分类号： H01L21/67309 , C30B31/14 , H01L21/67103 , H01L21/68721 , H01L21/68735 , H01L21/68785 , Y10S438/931
摘要： A susceptor in a semiconductor wafer heat treatment apparatus holds a wafer such that the wafer is made flat at a heat treatment temperature. In particular, the susceptor is constituted by an elastic platy member which is convex upward with respect to the direction of the gravity. Therefore, when the wafer is subjected to a high-temperature heat treatment, a crystal defect in the wafer can be suppressed.
摘要翻译：半导体晶片热处理装置中的感受体保持晶片，使得晶片在热处理温度下平坦化。特别地，感受体由相对于重力方向向上凸起的弹性板状构件构成。因此，当对晶片进行高温热处理时，可以抑制晶片中的晶体缺陷。

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