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1. 发明授权

US08373481B2 Spur reduction technique for sampling PLL's 有权
标题翻译：用于采样PLL的减速技术
公开(公告)号：US08373481B2
公开(公告)日：2013-02-12
申请号：US12973353
申请日：2010-12-20
申请人： Xiang Gao , Ahmad Bahai , Mounir Bohsali , Ali Djabbari , Eric Klumperink , Bram Nauta , Gerard Socci
发明人： Xiang Gao , Ahmad Bahai , Mounir Bohsali , Ali Djabbari , Eric Klumperink , Bram Nauta , Gerard Socci
IPC分类号： H03L7/06
CPC分类号： H03L7/091 , H03L7/07 , H03L7/0802 , H03L7/0812
摘要： Control circuitry and method of controlling for a sampling phase lock loop (PLL). By controlling the duty cycle of a sampling control signal, in accordance with the PLL reference and output signals, spurious output signals from the sampling PLL being controlled can be reduced.
摘要翻译：控制电路和控制采样锁相环（PLL）的方法。通过控制采样控制信号的占空比，根据PLL参考和输出信号，可以减少来自被控制的采样PLL的杂散输出信号。

2. 发明授权

US08395427B1 Low power and low spur sampling PLL 有权
标题翻译：低功耗和低杂散采样PLL
公开(公告)号：US08395427B1
公开(公告)日：2013-03-12
申请号：US12973323
申请日：2010-12-20
申请人： Xiang Gao , Ahmad Bahai , Mounir Bohsali , Ali Djabbari , Eric Klumperink , Bram Nauta , Gerard Socci
发明人： Xiang Gao , Ahmad Bahai , Mounir Bohsali , Ali Djabbari , Eric Klumperink , Bram Nauta , Gerard Socci
IPC分类号： H03L7/06
CPC分类号： H03L7/091
摘要： Control circuitry and method of controlling for a sampling phase lock loop (PLL). By controlling the duty cycle of one or more sampling control signals, power consumption by the reference signal buffer and spurious output signals from the sampling PLL being controlled can be reduced.
摘要翻译：控制电路和控制采样锁相环（PLL）的方法。通过控制一个或多个采样控制信号的占空比，可以减少参考信号缓冲器的功率消耗和被控制的采样PLL的杂散输出信号。

3. 发明申请

US20120154003A1 SPUR REDUCTION TECHNIQUE FOR SAMPLING PLL'S 有权
标题翻译：用于采样PLL的减少技术
公开(公告)号：US20120154003A1
公开(公告)日：2012-06-21
申请号：US12973353
申请日：2010-12-20
申请人： Xiang Gao , Ahmad Bahai , Mounir Bohsali , Ali Djabbari , Eric Klumperink , Bram Nauta , Gerard Socci
发明人： Xiang Gao , Ahmad Bahai , Mounir Bohsali , Ali Djabbari , Eric Klumperink , Bram Nauta , Gerard Socci
IPC分类号： H03L7/091
CPC分类号： H03L7/091 , H03L7/07 , H03L7/0802 , H03L7/0812
摘要： Control circuitry and method of controlling for a sampling phase lock loop (PLL). By controlling the duty cycle of a sampling control signal, in accordance with the PLL reference and output signals, spurious output signals from the sampling PLL being controlled can be reduced.
摘要翻译：控制电路和控制采样锁相环（PLL）的方法。通过控制采样控制信号的占空比，根据PLL参考和输出信号，可以减少来自被控制的采样PLL的杂散输出信号。

4. 发明授权

US07863993B1 Oscillator for providing oscillation signal with controllable frequency 有权
标题翻译：用于提供具有可控频率的振荡信号的振荡器
公开(公告)号：US07863993B1
公开(公告)日：2011-01-04
申请号：US12206448
申请日：2008-09-08
申请人： Mounir Bohsali , Ali Kiaei , Gerard Socci , Masood Yousefi , Ali Djabbari , Ahmad Bahai
发明人： Mounir Bohsali , Ali Kiaei , Gerard Socci , Masood Yousefi , Ali Djabbari , Ahmad Bahai
IPC分类号： H03B5/36 , H03C3/22
CPC分类号： H03B5/366 , H03B5/368 , H03B2200/0008 , H03B2200/004 , H03B2200/005
摘要： An oscillator, including amplifier circuitry and resonant circuitry, for providing an oscillation signal with a controllable frequency while maintaining a substantially constant steady state magnitude. Controllable reactive circuitry, included as part of the amplifier circuitry, has a reactance which can be controlled such that the resistive components of the amplifier circuitry and resonant circuitry impedances remain substantially equal. When in the form of serially coupled, controllable capacitances, the controllable reactive circuitry is controlled such that a ratio of changes in the controllable capacitances is approximately equal to a negative ratio of the capacitance values.
摘要翻译：包括放大器电路和谐振电路的振荡器，用于在保持基本恒定的稳态幅度的同时提供具有可控频率的振荡信号。作为放大器电路的一部分包括的可控无功电路具有可以被控制的电抗，使得放大器电路和谐振电路阻抗的电阻分量保持基本相等。当以串联耦合的可控电容的形式，可控电抗被控制使得可控电容的变化比大致等于电容值的负比。

5. 发明申请

US20100039840A1 AC-TO-DC VOLTAGE CONVERSION AND CHARGING CIRCUITRY 有权
标题翻译： AC-TO-DC电压转换和充电电路
公开(公告)号：US20100039840A1
公开(公告)日：2010-02-18
申请号：US12192633
申请日：2008-08-15
申请人： Ahmad Bahai , Ali Djabbari , Qingguo Liu , Jianhui Zhang
发明人： Ahmad Bahai , Ali Djabbari , Qingguo Liu , Jianhui Zhang
IPC分类号： H02J1/10
CPC分类号： H02J7/022 , H02J7/345 , H02M1/4208 , H02M3/1582 , H02M2001/0006 , H02M2001/007 , Y02B40/90 , Y02B70/126
摘要： Voltage conversion and charging circuitry and method for converting an alternating current (AC) voltage to a direct current (DC) voltage for charging an energy storage element (e.g., battery or supercapacitor). An output capacitance, which is initially charged quickly for use in the slower charging of a battery, also maintains the charge on an input capacitance which provides power for the charging control circuitry during such charging process. In accordance with a preferred embodiment, the DC charging current is substantially constant during a first time interval following which the DC charging power is substantially constant during a second time interval.
摘要翻译：电压转换和充电电路以及用于将交流（AC）电压转换为直流（DC）电压以对能量存储元件（例如，电池或超级电容器）进行充电的方法。最初为电池的较慢充电而快速充电的输出电容也在输入电容中保持电荷，该输入电容在充电过程中为充电控制电路提供电力。根据优选实施例，在第一时间间隔期间，DC充电电流基本上是恒定的，随后DC充电功率在第二时间间隔内基本上是恒定的。

6. 发明授权

US07977921B2 AC-to-DC voltage conversion and charging circuitry 有权
标题翻译： AC到DC电压转换和充电电路
公开(公告)号：US07977921B2
公开(公告)日：2011-07-12
申请号：US12192633
申请日：2008-08-15
申请人： Ahmad Bahai , Ali Djabbari , Qingguo Liu , Jianhui Zhang
发明人： Ahmad Bahai , Ali Djabbari , Qingguo Liu , Jianhui Zhang
IPC分类号： H02J7/04 , H02J7/16
CPC分类号： H02J7/022 , H02J7/345 , H02M1/4208 , H02M3/1582 , H02M2001/0006 , H02M2001/007 , Y02B40/90 , Y02B70/126
摘要： Voltage conversion and charging circuitry and method for converting an alternating current (AC) voltage to a direct current (DC) voltage for charging an energy storage element (e.g., battery or supercapacitor). An output capacitance, which is initially charged quickly for use in the slower charging of a battery, also maintains the charge on an input capacitance which provides power for the charging control circuitry during such charging process. In accordance with a preferred embodiment, the DC charging current is substantially constant during a first time interval following which the DC charging power is substantially constant during a second time interval.
摘要翻译：电压转换和充电电路以及用于将交流（AC）电压转换为直流（DC）电压以对能量存储元件（例如，电池或超级电容器）进行充电的方法。最初为电池的较慢充电而快速充电的输出电容也在输入电容中保持电荷，该输入电容在充电过程中为充电控制电路提供电力。根据优选实施例，在第一时间间隔期间，DC充电电流基本上是恒定的，随后DC充电功率在第二时间间隔内基本上是恒定的。

7. 发明申请

US20090045848A1 PHASE-FREQUENCY DETECTOR WITH HIGH JITTER TOLERANCE 审中-公开
标题翻译：具有高耐久性的相位检测器
公开(公告)号：US20090045848A1
公开(公告)日：2009-02-19
申请号：US11839018
申请日：2007-08-15
申请人： Ali Kiaei , Gerard G. Socci , Ali Djabbari , Ahmad Bahai
发明人： Ali Kiaei , Gerard G. Socci , Ali Djabbari , Ahmad Bahai
IPC分类号： H03D13/00 , G01R29/00
CPC分类号： H03D13/00
摘要： A phase-frequency detection system and method for enhancing performance of the frequency detector in a phase-frequency detection system. Filtering of the frequency detector inputs makes operation of the frequency detector more robust in the presence of intersymbol interference within the incoming data signal and other non-ideal characteristics such as noise and crosstalk.
摘要翻译：一种用于增强频率检测系统中的频率检测器的性能的相位频率检测系统和方法。频率检测器输入的滤波使得频率检测器的操作在输入数据信号和其它非理想特性（例如噪声和串扰）存在码间干扰的情况下更加鲁棒。

8. 发明授权

US07864969B1 Adaptive amplifier circuitry for microphone array 有权
标题翻译：用于麦克风阵列的自适应放大器电路
公开(公告)号：US07864969B1
公开(公告)日：2011-01-04
申请号：US11307930
申请日：2006-02-28
申请人： Wei Ma , Ahmad Bahai
发明人： Wei Ma , Ahmad Bahai
IPC分类号： H04R3/00
CPC分类号： H04R3/005 , H04R3/02 , H04R2410/01 , H04R2430/23
摘要： Adaptive amplifier circuitry for a microphone array with alternative operating modes. In one mode, background noise is reduced when the speaker is in a near field position and a relatively quiet environment. In another mode, the microphone signals are amplified, with speech being boosted more than background noise, when the speaker moves from a near field position to a far field position.
摘要翻译：具有可选操作模式的麦克风阵列的自适应放大器电路。在一种模式中，当扬声器处于近场位置和相对安静的环境时，背景噪声降低。在另一种模式中，当扬声器从近场位置移动到远场位置时，麦克风信号被放大，语音被提升大于背景噪声。

9. 发明申请

US20080297386A1 SIGMA-DELTA MODULATOR WITH DAC RESOLUTION LESS THAN ADC RESOLUTION 有权
标题翻译：具有DAC分辨率低于ADC分辨率的SIGMA-DELTA调制器
公开(公告)号：US20080297386A1
公开(公告)日：2008-12-04
申请号：US11754442
申请日：2007-05-29
申请人： Franco Maloberti , Masood Yousefi , Ahmad Bahai
发明人： Franco Maloberti , Masood Yousefi , Ahmad Bahai
IPC分类号： H03M3/00
CPC分类号： H03M3/428 , H03M3/454
摘要： A sigma-delta modulator is provided with a feedback digital-to-analog converter having less resolution than the quantizer, while providing a reduced length output word, requiring minimal additional internal processing, and shaping of the truncation error by an effective noise transfer function greater than the order of the host sigma-delta modulator.
摘要翻译： Σ-Δ调制器具有反馈数模转换器，其具有比量化器更低的分辨率，同时提供减小长度的输出字，需要最小额外的内部处理，并通过有效噪声传递函数对截断误差进行整形比主机Σ-Δ调制器的顺序。

10. 发明授权

US07017127B1 Method and system for enabling energy efficient wireless connectivity 有权
标题翻译：实现节能无线连接的方法和系统
公开(公告)号：US07017127B1
公开(公告)日：2006-03-21
申请号：US10453475
申请日：2003-06-02
申请人： Ahmad Bahai
发明人： Ahmad Bahai
IPC分类号： G06F17/50
CPC分类号： G06F17/5063 , G06F17/505 , G06F2217/78
摘要： The invention is directed to a system and method that enables several different factors associated with the implementation of a particular wireless application to be considered in the design of an energy efficient wireless connectivity solution for an integrated circuit. Factors regarding the implementation of wireless communication, such as spectral efficiency, number of transistors available in an integrated circuit to process the signal, actual travel distance to be covered by the signal and application processing of data included in the signal are considered when designing the arrangement of analog and digital circuits for a particular wireless application.
摘要翻译：本发明涉及一种系统和方法，其能够在集成电路的能量效率无线连接解决方案的设计中考虑与特定无线应用的实施相关联的几个不同因素。在设计布置时考虑无线通信的实现的因素，例如频谱效率，用于处理信号的集成电路中可用的晶体管数量，由信号覆盖的实际行进距离和包括在信号中的数据的应用处理用于特定无线应用的模拟和数字电路。

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